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18 #define GET_INSTRINFO_CTOR_DTOR
19 #include "LoongArchGenInstrInfo.inc"
29 if (LoongArch::GPRRegClass.
contains(DstReg, SrcReg)) {
38 if (LoongArch::FPR32RegClass.
contains(DstReg, SrcReg)) {
39 Opc = LoongArch::FMOV_S;
40 }
else if (LoongArch::FPR64RegClass.
contains(DstReg, SrcReg)) {
41 Opc = LoongArch::FMOV_D;
This is an optimization pass for GlobalISel generic memory operations.
return AArch64::GPR64RegClass contains(Reg)
LoongArchInstrInfo(LoongArchSubtarget &STI)
const MachineInstrBuilder & addReg(Register RegNo, unsigned flags=0, unsigned SubReg=0) const
Add a new virtual register operand.
MachineBasicBlock MachineBasicBlock::iterator MBBI
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
MachineBasicBlock MachineBasicBlock::iterator DebugLoc DL
void copyPhysReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, const DebugLoc &DL, MCRegister DstReg, MCRegister SrcReg, bool KillSrc) const override
Should compile to something r4 addze r3 instead we get
unsigned getKillRegState(bool B)
MachineInstrBuilder BuildMI(MachineFunction &MF, const DebugLoc &DL, const MCInstrDesc &MCID)
Builder interface. Specify how to create the initial instruction itself.
Wrapper class representing physical registers. Should be passed by value.