LLVM  9.0.0svn
FunctionLoweringInfo.cpp
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1 //===-- FunctionLoweringInfo.cpp ------------------------------------------===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // This implements routines for translating functions from LLVM IR into
10 // Machine IR.
11 //
12 //===----------------------------------------------------------------------===//
13 
15 #include "llvm/CodeGen/Analysis.h"
27 #include "llvm/IR/DataLayout.h"
28 #include "llvm/IR/DerivedTypes.h"
29 #include "llvm/IR/Function.h"
30 #include "llvm/IR/Instructions.h"
31 #include "llvm/IR/IntrinsicInst.h"
32 #include "llvm/IR/LLVMContext.h"
33 #include "llvm/IR/Module.h"
34 #include "llvm/Support/Debug.h"
39 #include <algorithm>
40 using namespace llvm;
41 
42 #define DEBUG_TYPE "function-lowering-info"
43 
44 /// isUsedOutsideOfDefiningBlock - Return true if this instruction is used by
45 /// PHI nodes or outside of the basic block that defines it, or used by a
46 /// switch or atomic instruction, which may expand to multiple basic blocks.
48  if (I->use_empty()) return false;
49  if (isa<PHINode>(I)) return true;
50  const BasicBlock *BB = I->getParent();
51  for (const User *U : I->users())
52  if (cast<Instruction>(U)->getParent() != BB || isa<PHINode>(U))
53  return true;
54 
55  return false;
56 }
57 
59  // For the users of the source value being used for compare instruction, if
60  // the number of signed predicate is greater than unsigned predicate, we
61  // prefer to use SIGN_EXTEND.
62  //
63  // With this optimization, we would be able to reduce some redundant sign or
64  // zero extension instruction, and eventually more machine CSE opportunities
65  // can be exposed.
66  ISD::NodeType ExtendKind = ISD::ANY_EXTEND;
67  unsigned NumOfSigned = 0, NumOfUnsigned = 0;
68  for (const User *U : V->users()) {
69  if (const auto *CI = dyn_cast<CmpInst>(U)) {
70  NumOfSigned += CI->isSigned();
71  NumOfUnsigned += CI->isUnsigned();
72  }
73  }
74  if (NumOfSigned > NumOfUnsigned)
75  ExtendKind = ISD::SIGN_EXTEND;
76 
77  return ExtendKind;
78 }
79 
81  SelectionDAG *DAG) {
82  Fn = &fn;
83  MF = &mf;
85  RegInfo = &MF->getRegInfo();
87  unsigned StackAlign = TFI->getStackAlignment();
88 
89  // Check whether the function can return without sret-demotion.
92 
93  GetReturnInfo(CC, Fn->getReturnType(), Fn->getAttributes(), Outs, *TLI,
94  mf.getDataLayout());
96  TLI->CanLowerReturn(CC, *MF, Fn->isVarArg(), Outs, Fn->getContext());
97 
98  // If this personality uses funclets, we need to do a bit more work.
100  EHPersonality Personality = classifyEHPersonality(
101  Fn->hasPersonalityFn() ? Fn->getPersonalityFn() : nullptr);
102  if (isFuncletEHPersonality(Personality)) {
103  // Calculate state numbers if we haven't already.
104  WinEHFuncInfo &EHInfo = *MF->getWinEHFuncInfo();
105  if (Personality == EHPersonality::MSVC_CXX)
106  calculateWinCXXEHStateNumbers(&fn, EHInfo);
107  else if (isAsynchronousEHPersonality(Personality))
108  calculateSEHStateNumbers(&fn, EHInfo);
109  else if (Personality == EHPersonality::CoreCLR)
110  calculateClrEHStateNumbers(&fn, EHInfo);
111 
112  // Map all BB references in the WinEH data to MBBs.
113  for (WinEHTryBlockMapEntry &TBME : EHInfo.TryBlockMap) {
114  for (WinEHHandlerType &H : TBME.HandlerArray) {
115  if (const AllocaInst *AI = H.CatchObj.Alloca)
116  CatchObjects.insert({AI, {}}).first->second.push_back(
117  &H.CatchObj.FrameIndex);
118  else
119  H.CatchObj.FrameIndex = INT_MAX;
120  }
121  }
122  }
123  if (Personality == EHPersonality::Wasm_CXX) {
124  WasmEHFuncInfo &EHInfo = *MF->getWasmEHFuncInfo();
125  calculateWasmEHInfo(&fn, EHInfo);
126  }
127 
128  // Initialize the mapping of values to registers. This is only set up for
129  // instruction values that are used outside of the block that defines
130  // them.
131  for (const BasicBlock &BB : *Fn) {
132  for (const Instruction &I : BB) {
133  if (const AllocaInst *AI = dyn_cast<AllocaInst>(&I)) {
134  Type *Ty = AI->getAllocatedType();
135  unsigned Align =
137  AI->getAlignment());
138 
139  // Static allocas can be folded into the initial stack frame
140  // adjustment. For targets that don't realign the stack, don't
141  // do this if there is an extra alignment requirement.
142  if (AI->isStaticAlloca() &&
143  (TFI->isStackRealignable() || (Align <= StackAlign))) {
144  const ConstantInt *CUI = cast<ConstantInt>(AI->getArraySize());
145  uint64_t TySize = MF->getDataLayout().getTypeAllocSize(Ty);
146 
147  TySize *= CUI->getZExtValue(); // Get total allocated size.
148  if (TySize == 0) TySize = 1; // Don't create zero-sized stack objects.
149  int FrameIndex = INT_MAX;
150  auto Iter = CatchObjects.find(AI);
151  if (Iter != CatchObjects.end() && TLI->needsFixedCatchObjects()) {
152  FrameIndex = MF->getFrameInfo().CreateFixedObject(
153  TySize, 0, /*Immutable=*/false, /*isAliased=*/true);
154  MF->getFrameInfo().setObjectAlignment(FrameIndex, Align);
155  } else {
156  FrameIndex =
157  MF->getFrameInfo().CreateStackObject(TySize, Align, false, AI);
158  }
159 
161  // Update the catch handler information.
162  if (Iter != CatchObjects.end()) {
163  for (int *CatchObjPtr : Iter->second)
164  *CatchObjPtr = FrameIndex;
165  }
166  } else {
167  // FIXME: Overaligned static allocas should be grouped into
168  // a single dynamic allocation instead of using a separate
169  // stack allocation for each one.
170  if (Align <= StackAlign)
171  Align = 0;
172  // Inform the Frame Information that we have variable-sized objects.
173  MF->getFrameInfo().CreateVariableSizedObject(Align ? Align : 1, AI);
174  }
175  }
176 
177  // Look for inline asm that clobbers the SP register.
178  if (isa<CallInst>(I) || isa<InvokeInst>(I)) {
179  ImmutableCallSite CS(&I);
180  if (isa<InlineAsm>(CS.getCalledValue())) {
181  unsigned SP = TLI->getStackPointerRegisterToSaveRestore();
183  std::vector<TargetLowering::AsmOperandInfo> Ops =
184  TLI->ParseConstraints(Fn->getParent()->getDataLayout(), TRI, CS);
185  for (TargetLowering::AsmOperandInfo &Op : Ops) {
186  if (Op.Type == InlineAsm::isClobber) {
187  // Clobbers don't have SDValue operands, hence SDValue().
188  TLI->ComputeConstraintToUse(Op, SDValue(), DAG);
189  std::pair<unsigned, const TargetRegisterClass *> PhysReg =
190  TLI->getRegForInlineAsmConstraint(TRI, Op.ConstraintCode,
191  Op.ConstraintVT);
192  if (PhysReg.first == SP)
194  }
195  }
196  }
197  }
198 
199  // Look for calls to the @llvm.va_start intrinsic. We can omit some
200  // prologue boilerplate for variadic functions that don't examine their
201  // arguments.
202  if (const auto *II = dyn_cast<IntrinsicInst>(&I)) {
203  if (II->getIntrinsicID() == Intrinsic::vastart)
204  MF->getFrameInfo().setHasVAStart(true);
205  }
206 
207  // If we have a musttail call in a variadic function, we need to ensure we
208  // forward implicit register parameters.
209  if (const auto *CI = dyn_cast<CallInst>(&I)) {
210  if (CI->isMustTailCall() && Fn->isVarArg())
212  }
213 
214  // Mark values used outside their block as exported, by allocating
215  // a virtual register for them.
217  if (!isa<AllocaInst>(I) || !StaticAllocaMap.count(cast<AllocaInst>(&I)))
219 
220  // Decide the preferred extend type for a value.
222  }
223  }
224 
225  // Create an initial MachineBasicBlock for each LLVM BasicBlock in F. This
226  // also creates the initial PHI MachineInstrs, though none of the input
227  // operands are populated.
228  for (const BasicBlock &BB : *Fn) {
229  // Don't create MachineBasicBlocks for imaginary EH pad blocks. These blocks
230  // are really data, and no instructions can live here.
231  if (BB.isEHPad()) {
232  const Instruction *PadInst = BB.getFirstNonPHI();
233  // If this is a non-landingpad EH pad, mark this function as using
234  // funclets.
235  // FIXME: SEH catchpads do not create EH scope/funclets, so we could avoid
236  // setting this in such cases in order to improve frame layout.
237  if (!isa<LandingPadInst>(PadInst)) {
238  MF->setHasEHScopes(true);
239  MF->setHasEHFunclets(true);
241  }
242  if (isa<CatchSwitchInst>(PadInst)) {
243  assert(&*BB.begin() == PadInst &&
244  "WinEHPrepare failed to remove PHIs from imaginary BBs");
245  continue;
246  }
247  if (isa<FuncletPadInst>(PadInst))
248  assert(&*BB.begin() == PadInst && "WinEHPrepare failed to demote PHIs");
249  }
250 
252  MBBMap[&BB] = MBB;
253  MF->push_back(MBB);
254 
255  // Transfer the address-taken flag. This is necessary because there could
256  // be multiple MachineBasicBlocks corresponding to one BasicBlock, and only
257  // the first one should be marked.
258  if (BB.hasAddressTaken())
259  MBB->setHasAddressTaken();
260 
261  // Mark landing pad blocks.
262  if (BB.isEHPad())
263  MBB->setIsEHPad();
264 
265  // Create Machine PHI nodes for LLVM PHI nodes, lowering them as
266  // appropriate.
267  for (const PHINode &PN : BB.phis()) {
268  if (PN.use_empty())
269  continue;
270 
271  // Skip empty types
272  if (PN.getType()->isEmptyTy())
273  continue;
274 
275  DebugLoc DL = PN.getDebugLoc();
276  unsigned PHIReg = ValueMap[&PN];
277  assert(PHIReg && "PHI node does not have an assigned virtual register!");
278 
279  SmallVector<EVT, 4> ValueVTs;
280  ComputeValueVTs(*TLI, MF->getDataLayout(), PN.getType(), ValueVTs);
281  for (EVT VT : ValueVTs) {
282  unsigned NumRegisters = TLI->getNumRegisters(Fn->getContext(), VT);
284  for (unsigned i = 0; i != NumRegisters; ++i)
285  BuildMI(MBB, DL, TII->get(TargetOpcode::PHI), PHIReg + i);
286  PHIReg += NumRegisters;
287  }
288  }
289  }
290 
291  if (isFuncletEHPersonality(Personality)) {
292  WinEHFuncInfo &EHInfo = *MF->getWinEHFuncInfo();
293 
294  // Map all BB references in the WinEH data to MBBs.
295  for (WinEHTryBlockMapEntry &TBME : EHInfo.TryBlockMap) {
296  for (WinEHHandlerType &H : TBME.HandlerArray) {
297  if (H.Handler)
298  H.Handler = MBBMap[H.Handler.get<const BasicBlock *>()];
299  }
300  }
301  for (CxxUnwindMapEntry &UME : EHInfo.CxxUnwindMap)
302  if (UME.Cleanup)
303  UME.Cleanup = MBBMap[UME.Cleanup.get<const BasicBlock *>()];
304  for (SEHUnwindMapEntry &UME : EHInfo.SEHUnwindMap) {
305  const auto *BB = UME.Handler.get<const BasicBlock *>();
306  UME.Handler = MBBMap[BB];
307  }
308  for (ClrEHUnwindMapEntry &CME : EHInfo.ClrEHUnwindMap) {
309  const auto *BB = CME.Handler.get<const BasicBlock *>();
310  CME.Handler = MBBMap[BB];
311  }
312  }
313 
314  else if (Personality == EHPersonality::Wasm_CXX) {
315  WasmEHFuncInfo &EHInfo = *MF->getWasmEHFuncInfo();
316  // Map all BB references in the WinEH data to MBBs.
318  for (auto &KV : EHInfo.EHPadUnwindMap) {
319  const auto *Src = KV.first.get<const BasicBlock *>();
320  const auto *Dst = KV.second.get<const BasicBlock *>();
321  NewMap[MBBMap[Src]] = MBBMap[Dst];
322  }
323  EHInfo.EHPadUnwindMap = std::move(NewMap);
324  }
325 }
326 
327 /// clear - Clear out all the function-specific state. This returns this
328 /// FunctionLoweringInfo to an empty state, ready to be used for a
329 /// different function.
331  MBBMap.clear();
332  ValueMap.clear();
333  VirtReg2Value.clear();
334  StaticAllocaMap.clear();
335  LiveOutRegInfo.clear();
336  VisitedBBs.clear();
337  ArgDbgValues.clear();
339  ByValArgFrameIndexMap.clear();
340  RegFixups.clear();
343  StatepointSpillMaps.clear();
344  PreferredExtendType.clear();
345 }
346 
347 /// CreateReg - Allocate a single virtual register for the given type.
351 }
352 
353 /// CreateRegs - Allocate the appropriate number of virtual registers of
354 /// the correctly promoted or expanded types. Assign these registers
355 /// consecutive vreg numbers and return the first assigned number.
356 ///
357 /// In the case that the given value has struct or array type, this function
358 /// will assign registers for each member or element.
359 ///
362 
363  SmallVector<EVT, 4> ValueVTs;
364  ComputeValueVTs(*TLI, MF->getDataLayout(), Ty, ValueVTs);
365 
366  unsigned FirstReg = 0;
367  for (unsigned Value = 0, e = ValueVTs.size(); Value != e; ++Value) {
368  EVT ValueVT = ValueVTs[Value];
369  MVT RegisterVT = TLI->getRegisterType(Ty->getContext(), ValueVT);
370 
371  unsigned NumRegs = TLI->getNumRegisters(Ty->getContext(), ValueVT);
372  for (unsigned i = 0; i != NumRegs; ++i) {
373  unsigned R = CreateReg(RegisterVT);
374  if (!FirstReg) FirstReg = R;
375  }
376  }
377  return FirstReg;
378 }
379 
380 /// GetLiveOutRegInfo - Gets LiveOutInfo for a register, returning NULL if the
381 /// register is a PHI destination and the PHI's LiveOutInfo is not valid. If
382 /// the register's LiveOutInfo is for a smaller bit width, it is extended to
383 /// the larger bit width by zero extension. The bit width must be no smaller
384 /// than the LiveOutInfo's existing bit width.
386 FunctionLoweringInfo::GetLiveOutRegInfo(unsigned Reg, unsigned BitWidth) {
387  if (!LiveOutRegInfo.inBounds(Reg))
388  return nullptr;
389 
390  LiveOutInfo *LOI = &LiveOutRegInfo[Reg];
391  if (!LOI->IsValid)
392  return nullptr;
393 
394  if (BitWidth > LOI->Known.getBitWidth()) {
395  LOI->NumSignBits = 1;
396  LOI->Known = LOI->Known.zext(BitWidth, false /* => any extend */);
397  }
398 
399  return LOI;
400 }
401 
402 /// ComputePHILiveOutRegInfo - Compute LiveOutInfo for a PHI's destination
403 /// register based on the LiveOutInfo of its operands.
405  Type *Ty = PN->getType();
406  if (!Ty->isIntegerTy() || Ty->isVectorTy())
407  return;
408 
409  SmallVector<EVT, 1> ValueVTs;
410  ComputeValueVTs(*TLI, MF->getDataLayout(), Ty, ValueVTs);
411  assert(ValueVTs.size() == 1 &&
412  "PHIs with non-vector integer types should have a single VT.");
413  EVT IntVT = ValueVTs[0];
414 
415  if (TLI->getNumRegisters(PN->getContext(), IntVT) != 1)
416  return;
417  IntVT = TLI->getTypeToTransformTo(PN->getContext(), IntVT);
418  unsigned BitWidth = IntVT.getSizeInBits();
419 
420  unsigned DestReg = ValueMap[PN];
422  return;
423  LiveOutRegInfo.grow(DestReg);
424  LiveOutInfo &DestLOI = LiveOutRegInfo[DestReg];
425 
426  Value *V = PN->getIncomingValue(0);
427  if (isa<UndefValue>(V) || isa<ConstantExpr>(V)) {
428  DestLOI.NumSignBits = 1;
429  DestLOI.Known = KnownBits(BitWidth);
430  return;
431  }
432 
433  if (ConstantInt *CI = dyn_cast<ConstantInt>(V)) {
434  APInt Val = CI->getValue().zextOrTrunc(BitWidth);
435  DestLOI.NumSignBits = Val.getNumSignBits();
436  DestLOI.Known.Zero = ~Val;
437  DestLOI.Known.One = Val;
438  } else {
439  assert(ValueMap.count(V) && "V should have been placed in ValueMap when its"
440  "CopyToReg node was created.");
441  unsigned SrcReg = ValueMap[V];
443  DestLOI.IsValid = false;
444  return;
445  }
446  const LiveOutInfo *SrcLOI = GetLiveOutRegInfo(SrcReg, BitWidth);
447  if (!SrcLOI) {
448  DestLOI.IsValid = false;
449  return;
450  }
451  DestLOI = *SrcLOI;
452  }
453 
454  assert(DestLOI.Known.Zero.getBitWidth() == BitWidth &&
455  DestLOI.Known.One.getBitWidth() == BitWidth &&
456  "Masks should have the same bit width as the type.");
457 
458  for (unsigned i = 1, e = PN->getNumIncomingValues(); i != e; ++i) {
459  Value *V = PN->getIncomingValue(i);
460  if (isa<UndefValue>(V) || isa<ConstantExpr>(V)) {
461  DestLOI.NumSignBits = 1;
462  DestLOI.Known = KnownBits(BitWidth);
463  return;
464  }
465 
466  if (ConstantInt *CI = dyn_cast<ConstantInt>(V)) {
467  APInt Val = CI->getValue().zextOrTrunc(BitWidth);
468  DestLOI.NumSignBits = std::min(DestLOI.NumSignBits, Val.getNumSignBits());
469  DestLOI.Known.Zero &= ~Val;
470  DestLOI.Known.One &= Val;
471  continue;
472  }
473 
474  assert(ValueMap.count(V) && "V should have been placed in ValueMap when "
475  "its CopyToReg node was created.");
476  unsigned SrcReg = ValueMap[V];
478  DestLOI.IsValid = false;
479  return;
480  }
481  const LiveOutInfo *SrcLOI = GetLiveOutRegInfo(SrcReg, BitWidth);
482  if (!SrcLOI) {
483  DestLOI.IsValid = false;
484  return;
485  }
486  DestLOI.NumSignBits = std::min(DestLOI.NumSignBits, SrcLOI->NumSignBits);
487  DestLOI.Known.Zero &= SrcLOI->Known.Zero;
488  DestLOI.Known.One &= SrcLOI->Known.One;
489  }
490 }
491 
492 /// setArgumentFrameIndex - Record frame index for the byval
493 /// argument. This overrides previous frame index entry for this argument,
494 /// if any.
496  int FI) {
497  ByValArgFrameIndexMap[A] = FI;
498 }
499 
500 /// getArgumentFrameIndex - Get frame index for the byval argument.
501 /// If the argument does not have any assigned frame index then 0 is
502 /// returned.
504  auto I = ByValArgFrameIndexMap.find(A);
505  if (I != ByValArgFrameIndexMap.end())
506  return I->second;
507  LLVM_DEBUG(dbgs() << "Argument does not have assigned frame index!\n");
508  return INT_MAX;
509 }
510 
512  const Value *CPI, const TargetRegisterClass *RC) {
514  auto I = CatchPadExceptionPointers.insert({CPI, 0});
515  unsigned &VReg = I.first->second;
516  if (I.second)
517  VReg = MRI.createVirtualRegister(RC);
518  assert(VReg && "null vreg in exception pointer table!");
519  return VReg;
520 }
521 
522 unsigned
524  const Value *Val) {
525  auto Key = std::make_pair(MBB, Val);
526  auto It = SwiftErrorVRegDefMap.find(Key);
527  // If this is the first use of this swifterror value in this basic block,
528  // create a new virtual register.
529  // After we processed all basic blocks we will satisfy this "upwards exposed
530  // use" by inserting a copy or phi at the beginning of this block.
531  if (It == SwiftErrorVRegDefMap.end()) {
532  auto &DL = MF->getDataLayout();
534  auto VReg = MF->getRegInfo().createVirtualRegister(RC);
535  SwiftErrorVRegDefMap[Key] = VReg;
537  return VReg;
538  } else return It->second;
539 }
540 
542  const MachineBasicBlock *MBB, const Value *Val, unsigned VReg) {
543  SwiftErrorVRegDefMap[std::make_pair(MBB, Val)] = VReg;
544 }
545 
546 std::pair<unsigned, bool>
549  auto It = SwiftErrorVRegDefUses.find(Key);
550  if (It == SwiftErrorVRegDefUses.end()) {
551  auto &DL = MF->getDataLayout();
553  unsigned VReg = MF->getRegInfo().createVirtualRegister(RC);
554  SwiftErrorVRegDefUses[Key] = VReg;
555  return std::make_pair(VReg, true);
556  }
557  return std::make_pair(It->second, false);
558 }
559 
560 std::pair<unsigned, bool>
563  auto It = SwiftErrorVRegDefUses.find(Key);
564  if (It == SwiftErrorVRegDefUses.end()) {
565  unsigned VReg = getOrCreateSwiftErrorVReg(MBB, Val);
566  SwiftErrorVRegDefUses[Key] = VReg;
567  return std::make_pair(VReg, true);
568  }
569  return std::make_pair(It->second, false);
570 }
571 
572 const Value *
574  if (VirtReg2Value.empty()) {
575  SmallVector<EVT, 4> ValueVTs;
576  for (auto &P : ValueMap) {
577  ValueVTs.clear();
579  P.first->getType(), ValueVTs);
580  unsigned Reg = P.second;
581  for (EVT VT : ValueVTs) {
582  unsigned NumRegisters = TLI->getNumRegisters(Fn->getContext(), VT);
583  for (unsigned i = 0, e = NumRegisters; i != e; ++i)
584  VirtReg2Value[Reg++] = P.first;
585  }
586  }
587  }
588  return VirtReg2Value.lookup(Vreg);
589 }
void clear()
Definition: ValueMap.h:151
bool isVarArg() const
isVarArg - Return true if this function takes a variable number of arguments.
Definition: Function.h:176
MBBOrBasicBlock Handler
Definition: WinEHFuncInfo.h:82
constexpr char Align[]
Key for Kernel::Arg::Metadata::mAlign.
SmallVector< WinEHHandlerType, 1 > HandlerArray
Definition: WinEHFuncInfo.h:76
GCNRegPressure max(const GCNRegPressure &P1, const GCNRegPressure &P2)
This class represents an incoming formal argument to a Function.
Definition: Argument.h:29
MBBOrBasicBlock Cleanup
Definition: WinEHFuncInfo.h:42
This class represents lattice values for constants.
Definition: AllocatorList.h:23
unsigned getCatchPadExceptionPointerVReg(const Value *CPI, const TargetRegisterClass *RC)
void setIsEHPad(bool V=true)
Indicates the block is a landing pad.
SmallVector< SEHUnwindMapEntry, 4 > SEHUnwindMap
Definition: WinEHFuncInfo.h:97
virtual const TargetRegisterInfo * getRegisterInfo() const
getRegisterInfo - If register information is available, return it.
void setHasEHFunclets(bool V)
static bool isVirtualRegister(unsigned Reg)
Return true if the specified register number is in the virtual register namespace.
unsigned Reg
virtual const TargetLowering * getTargetLowering() const
const AllocaInst * Alloca
Definition: WinEHFuncInfo.h:65
LLVMContext & getContext() const
All values hold a context through their type.
Definition: Value.cpp:709
virtual const TargetRegisterClass * getRegClassFor(MVT VT) const
Return the register class that should be used for the specified value type.
unsigned const TargetRegisterInfo * TRI
A debug info location.
Definition: DebugLoc.h:33
APInt zextOrTrunc(unsigned width) const
Zero extend or truncate to width.
Definition: APInt.cpp:875
bool isVectorTy() const
True if this is an instance of VectorType.
Definition: Type.h:229
DenseMap< const Value *, unsigned > CatchPadExceptionPointers
Track virtual registers created for exception pointers.
bool CanLowerReturn
CanLowerReturn - true iff the function&#39;s return value can be lowered to registers.
unsigned getBitWidth() const
Get the bit width of this value.
Definition: KnownBits.h:39
T get() const
Returns the value of the specified pointer type.
Definition: PointerUnion.h:205
void setCurrentSwiftErrorVReg(const MachineBasicBlock *MBB, const Value *, unsigned)
Set the swifterror virtual register in the SwiftErrorVRegDefMap for this basic block.
int CreateStackObject(uint64_t Size, unsigned Alignment, bool isSpillSlot, const AllocaInst *Alloca=nullptr, uint8_t ID=0)
Create a new statically sized stack object, returning a nonnegative identifier to represent it...
NodeType
ISD::NodeType enum - This enum defines the target-independent operators for a SelectionDAG.
Definition: ISDOpcodes.h:38
void set(const Function &Fn, MachineFunction &MF, SelectionDAG *DAG)
set - Initialize this FunctionLoweringInfo with the given Function and its associated MachineFunction...
unsigned getBitWidth() const
Return the number of bits in the APInt.
Definition: APInt.h:1508
LLVMContext & getContext() const
Return the LLVMContext in which this type was uniqued.
Definition: Type.h:129
MBBOrBasicBlock Handler
Holds the __except or __finally basic block.
Definition: WinEHFuncInfo.h:57
MVT getRegisterType(MVT VT) const
Return the type of registers that this ValueType will eventually require.
std::pair< unsigned, bool > getOrCreateSwiftErrorVRegDefAt(const Instruction *)
Get or create the swifterror value virtual register for a def of a swifterror by an instruction...
std::pair< iterator, bool > insert(const std::pair< KeyT, ValueT > &KV)
Definition: DenseMap.h:221
static bool isUsedOutsideOfDefiningBlock(const Instruction *I)
isUsedOutsideOfDefiningBlock - Return true if this instruction is used by PHI nodes or outside of the...
void clear()
clear - Removes all bits from the bitvector. Does not change capacity.
Definition: BitVector.h:366
const DataLayout & getDataLayout() const
Get the data layout for the module&#39;s target platform.
Definition: Module.cpp:369
const HexagonInstrInfo * TII
void calculateSEHStateNumbers(const Function *ParentFn, WinEHFuncInfo &FuncInfo)
ValTy * getCalledValue() const
Return the pointer to function that is being called.
Definition: CallSite.h:104
bool isIntegerTy() const
True if this is an instance of IntegerType.
Definition: Type.h:196
This class defines information used to lower LLVM code to legal SelectionDAG operators that the targe...
int getArgumentFrameIndex(const Argument *A)
getArgumentFrameIndex - Get frame index for the byval argument.
Key
PAL metadata keys.
unsigned getSizeInBits() const
Return the size of the specified value type in bits.
Definition: ValueTypes.h:291
Type * getType() const
All values are typed, get the type of this value.
Definition: Value.h:244
void setHasMustTailInVarArgFunc(bool B)
const LiveOutInfo * GetLiveOutRegInfo(unsigned Reg)
GetLiveOutRegInfo - Gets LiveOutInfo for a register, returning NULL if the register is a PHI destinat...
DenseMap< BBOrMBB, BBOrMBB > EHPadUnwindMap
This contains information for each constraint that we are lowering.
DenseSet< unsigned > RegsWithFixups
static ISD::NodeType getPreferredExtendForValue(const Value *V)
AttributeList getAttributes() const
Return the attribute list for this Function.
Definition: Function.h:223
bool hasPersonalityFn() const
Check whether this function has a personality function.
Definition: Function.h:707
virtual const TargetInstrInfo * getInstrInfo() const
void setHasOpaqueSPAdjustment(bool B)
MachineBasicBlock * CreateMachineBasicBlock(const BasicBlock *bb=nullptr)
CreateMachineBasicBlock - Allocate a new MachineBasicBlock.
void ComputeValueVTs(const TargetLowering &TLI, const DataLayout &DL, Type *Ty, SmallVectorImpl< EVT > &ValueVTs, SmallVectorImpl< uint64_t > *Offsets=nullptr, uint64_t StartingOffset=0)
ComputeValueVTs - Given an LLVM IR type, compute a sequence of EVTs that represent all the individual...
Definition: Analysis.cpp:119
const DataLayout & getDataLayout() const
Return the DataLayout attached to the Module associated to this MF.
TargetInstrInfo - Interface to description of machine instruction set.
void clear()
clear - Clear out all the function-specific state.
Similar to CxxUnwindMapEntry, but supports SEH filters.
Definition: WinEHFuncInfo.h:46
MachineInstrBuilder BuildMI(MachineFunction &MF, const DebugLoc &DL, const MCInstrDesc &MCID)
Builder interface. Specify how to create the initial instruction itself.
void setHasEHScopes(bool V)
#define P(N)
Type * getReturnType() const
Returns the type of the ret val.
Definition: Function.h:168
SmallVector< ClrEHUnwindMapEntry, 4 > ClrEHUnwindMap
Definition: WinEHFuncInfo.h:98
DenseMap< unsigned, const Value * > VirtReg2Value
VirtReg2Value map is needed by the Divergence Analysis driven instruction selection.
uint64_t getZExtValue() const
Return the constant as a 64-bit unsigned integer value after it has been zero extended as appropriate...
Definition: Constants.h:148
unsigned const MachineRegisterInfo * MRI
Machine Value Type.
LLVM Basic Block Representation.
Definition: BasicBlock.h:57
PointerIntPair - This class implements a pair of a pointer and small integer.
The instances of the Type class are immutable: once they are created, they are never changed...
Definition: Type.h:45
const TargetSubtargetInfo & getSubtarget() const
getSubtarget - Return the subtarget for which this machine code is being compiled.
KnownBits zext(unsigned BitWidth, bool ExtendedBitsAreKnownZero) const
Extends the underlying known Zero and One bits.
Definition: KnownBits.h:120
MachineFrameInfo & getFrameInfo()
getFrameInfo - Return the frame info object for the current function.
std::pair< unsigned, bool > getOrCreateSwiftErrorVRegUseAt(const Instruction *, const MachineBasicBlock *, const Value *)
#define H(x, y, z)
Definition: MD5.cpp:57
unsigned getPrefTypeAlignment(Type *Ty) const
Returns the preferred stack/global alignment for the specified type.
Definition: DataLayout.cpp:759
EHPersonality classifyEHPersonality(const Value *Pers)
See if the given exception handling personality function is one that we understand.
union llvm::WinEHHandlerType::@194 CatchObj
The CatchObj starts out life as an LLVM alloca and is eventually turned frame index.
void calculateClrEHStateNumbers(const Function *Fn, WinEHFuncInfo &FuncInfo)
DenseMap< const Instruction *, StatepointSpillMap > StatepointSpillMaps
Maps gc.statepoint instructions to their corresponding StatepointSpillMap instances.
LLVMContext & getContext() const
getContext - Return a reference to the LLVMContext associated with this function. ...
Definition: Function.cpp:196
virtual MVT getPointerTy(const DataLayout &DL, uint32_t AS=0) const
Return the pointer type for the given address space, defaults to the pointer type from the data layou...
SmallPtrSet< const BasicBlock *, 4 > VisitedBBs
VisitedBBs - The set of basic blocks visited thus far by instruction selection.
Extended Value Type.
Definition: ValueTypes.h:33
TargetRegisterInfo base class - We assume that the target defines a static array of TargetRegisterDes...
size_t size() const
Definition: SmallVector.h:52
Value * getIncomingValue(unsigned i) const
Return incoming value number x.
void ComputePHILiveOutRegInfo(const PHINode *)
ComputePHILiveOutRegInfo - Compute LiveOutInfo for a PHI&#39;s destination register based on the LiveOutI...
unsigned getStackAlignment() const
getStackAlignment - This method returns the number of bytes to which the stack pointer must be aligne...
MachineBasicBlock * MBB
MBB - The current block.
MBBOrBasicBlock Handler
Definition: WinEHFuncInfo.h:69
SmallVector< unsigned, 50 > StatepointStackSlots
StatepointStackSlots - A list of temporary stack slots (frame indices) used to spill values at a stat...
unsigned first
void GetReturnInfo(CallingConv::ID CC, Type *ReturnType, AttributeList attr, SmallVectorImpl< ISD::OutputArg > &Outs, const TargetLowering &TLI, const DataLayout &DL)
Given an LLVM IR type and return type attributes, compute the return value EVTs and flags...
void calculateWinCXXEHStateNumbers(const Function *ParentFn, WinEHFuncInfo &FuncInfo)
Analyze the IR in ParentFn and it&#39;s handlers to build WinEHFuncInfo, which describes the state number...
SmallVector< CxxUnwindMapEntry, 4 > CxxUnwindMap
Definition: WinEHFuncInfo.h:95
See the file comment.
Definition: ValueMap.h:85
This is the shared class of boolean and integer constants.
Definition: Constants.h:83
bool isFuncletEHPersonality(EHPersonality Pers)
Returns true if this is a personality function that invokes handler funclets (which must return to it...
DenseMap< std::pair< const MachineBasicBlock *, const Value * >, unsigned > SwiftErrorVRegDefMap
A map from swifterror value in a basic block to the virtual register it is currently represented by...
DenseMap< unsigned, unsigned > RegFixups
RegFixups - Registers which need to be replaced after isel is done.
CallingConv::ID getCallingConv() const
getCallingConv()/setCallingConv(CC) - These method get and set the calling convention of this functio...
Definition: Function.h:212
This is used to represent a portion of an LLVM function in a low-level Data Dependence DAG representa...
Definition: SelectionDAG.h:221
This is a &#39;vector&#39; (really, a variable-sized array), optimized for the case when the array is small...
Definition: SmallVector.h:841
SmallVector< MachineInstr *, 8 > ArgDbgValues
ArgDbgValues - A list of DBG_VALUE instructions created during isel for function arguments that are i...
Module.h This file contains the declarations for the Module class.
Information about stack frame layout on the target.
int CreateFixedObject(uint64_t Size, int64_t SPOffset, bool IsImmutable, bool isAliased=false)
Create a new object at a fixed location on the stack.
DenseMap< std::pair< const MachineBasicBlock *, const Value * >, unsigned > SwiftErrorVRegUpwardsUse
A list of upward exposed vreg uses that need to be satisfied by either a copy def or a phi node at th...
const WinEHFuncInfo * getWinEHFuncInfo() const
getWinEHFuncInfo - Return information about how the current function uses Windows exception handling...
unsigned getNumIncomingValues() const
Return the number of incoming edges.
unsigned CreateRegs(Type *Ty)
CreateRegs - Allocate the appropriate number of virtual registers of the correctly promoted or expand...
raw_ostream & dbgs()
dbgs() - This returns a reference to a raw_ostream for debugging messages.
Definition: Debug.cpp:132
SmallVector< WinEHTryBlockMapEntry, 4 > TryBlockMap
Definition: WinEHFuncInfo.h:96
Class for arbitrary precision integers.
Definition: APInt.h:69
iterator_range< user_iterator > users()
Definition: Value.h:399
void setHasAddressTaken()
Set this block to reflect that it potentially is the target of an indirect branch.
ANY_EXTEND - Used for integer types. The high bits are undefined.
Definition: ISDOpcodes.h:495
MachineRegisterInfo - Keep track of information for virtual and physical registers, including vreg register classes, use/def chains for registers, etc.
const WasmEHFuncInfo * getWasmEHFuncInfo() const
getWasmEHFuncInfo - Return information about how the current function uses Wasm exception handling...
DenseMap< const Value *, ISD::NodeType > PreferredExtendType
Record the preferred extend type (ISD::SIGN_EXTEND or ISD::ZERO_EXTEND) for a value.
uint64_t getTypeAllocSize(Type *Ty) const
Returns the offset in bytes between successive objects of the specified type, including alignment pad...
Definition: DataLayout.h:461
MachineRegisterInfo * RegInfo
MachineRegisterInfo & getRegInfo()
getRegInfo - Return information about the registers currently in use.
DenseMap< const Argument *, int > ByValArgFrameIndexMap
ByValArgFrameIndexMap - Keep track of frame indices for byval arguments.
const MCInstrDesc & get(unsigned Opcode) const
Return the machine instruction descriptor that corresponds to the specified instruction opcode...
Definition: MCInstrInfo.h:44
Establish a view to a call site for examination.
Definition: CallSite.h:892
#define I(x, y, z)
Definition: MD5.cpp:58
virtual const TargetFrameLowering * getFrameLowering() const
BitVector DescribedArgs
Bitvector with a bit set if corresponding argument is described in ArgDbgValues.
const Value * getValueFromVirtualReg(unsigned Vreg)
This method is called from TargetLowerinInfo::isSDNodeSourceOfDivergence to get the Value correspondi...
unsigned CreateReg(MVT VT)
CreateReg - Allocate a single virtual register for the given type.
DenseMap< const AllocaInst *, int > StaticAllocaMap
StaticAllocaMap - Keep track of frame indices for fixed sized allocas in the entry block...
void calculateWasmEHInfo(const Function *F, WasmEHFuncInfo &EHInfo)
unsigned getNumRegisters(LLVMContext &Context, EVT VT) const
Return the number of registers that this ValueType will eventually require.
bool isStackRealignable() const
isStackRealignable - This method returns whether the stack can be realigned.
size_type count(const KeyT &Val) const
Return 1 if the specified key is in the map, 0 otherwise.
Definition: ValueMap.h:157
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
bool isAsynchronousEHPersonality(EHPersonality Pers)
Returns true if this personality function catches asynchronous exceptions.
unsigned getNumSignBits() const
Computes the number of leading bits of this APInt that are equal to its sign bit. ...
Definition: APInt.h:1619
Module * getParent()
Get the module that this global value is contained inside of...
Definition: GlobalValue.h:565
LLVM Value Representation.
Definition: Value.h:72
Constant * getPersonalityFn() const
Get the personality function associated with this function.
Definition: Function.cpp:1306
void push_back(MachineBasicBlock *MBB)
llvm::DenseMap< PointerIntPair< const Instruction *, 1, bool >, unsigned > SwiftErrorVRegDefUses
A map from instructions that define/use a swifterror value to the virtual register that represents th...
DenseMap< const BasicBlock *, MachineBasicBlock * > MBBMap
MBBMap - A mapping from LLVM basic blocks to their machine code entry.
const TargetLowering * TLI
Conversion operators.
Definition: ISDOpcodes.h:489
#define LLVM_DEBUG(X)
Definition: Debug.h:122
void setArgumentFrameIndex(const Argument *A, int FI)
setArgumentFrameIndex - Record frame index for the byval argument.
Unlike LLVM values, Selection DAG nodes may return multiple values as the result of a computation...
int CreateVariableSizedObject(unsigned Alignment, const AllocaInst *Alloca)
Notify the MachineFrameInfo object that a variable sized object has been created. ...
void setObjectAlignment(int ObjectIdx, unsigned Align)
setObjectAlignment - Change the alignment of the specified stack object.
EVT getTypeToTransformTo(LLVMContext &Context, EVT VT) const
For types supported by the target, this is an identity function.
bool use_empty() const
Definition: Value.h:322
unsigned createVirtualRegister(const TargetRegisterClass *RegClass, StringRef Name="")
createVirtualRegister - Create and return a new virtual register in the function with the specified r...
This file describes how to lower LLVM code to machine code.
const BasicBlock * getParent() const
Definition: Instruction.h:66
an instruction to allocate memory on the stack
Definition: Instructions.h:59
unsigned InitializeRegForValue(const Value *V)
unsigned getOrCreateSwiftErrorVReg(const MachineBasicBlock *, const Value *)
Get or create the swifterror value virtual register in SwiftErrorVRegDefMap for this basic block...