LLVM 19.0.0git
WebAssemblyExplicitLocals.cpp
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1//===-- WebAssemblyExplicitLocals.cpp - Make Locals Explicit --------------===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8///
9/// \file
10/// This file converts any remaining registers into WebAssembly locals.
11///
12/// After register stackification and register coloring, convert non-stackified
13/// registers into locals, inserting explicit local.get and local.set
14/// instructions.
15///
16//===----------------------------------------------------------------------===//
17
19#include "WebAssembly.h"
27#include "llvm/CodeGen/Passes.h"
28#include "llvm/Support/Debug.h"
30using namespace llvm;
31
32#define DEBUG_TYPE "wasm-explicit-locals"
33
34namespace {
35class WebAssemblyExplicitLocals final : public MachineFunctionPass {
36 StringRef getPassName() const override {
37 return "WebAssembly Explicit Locals";
38 }
39
40 void getAnalysisUsage(AnalysisUsage &AU) const override {
41 AU.setPreservesCFG();
44 }
45
46 bool runOnMachineFunction(MachineFunction &MF) override;
47
48public:
49 static char ID; // Pass identification, replacement for typeid
50 WebAssemblyExplicitLocals() : MachineFunctionPass(ID) {}
51};
52} // end anonymous namespace
53
54char WebAssemblyExplicitLocals::ID = 0;
55INITIALIZE_PASS(WebAssemblyExplicitLocals, DEBUG_TYPE,
56 "Convert registers to WebAssembly locals", false, false)
57
59 return new WebAssemblyExplicitLocals();
60}
61
62static void checkFrameBase(WebAssemblyFunctionInfo &MFI, unsigned Local,
63 unsigned Reg) {
64 // Mark a local for the frame base vreg.
65 if (MFI.isFrameBaseVirtual() && Reg == MFI.getFrameBaseVreg()) {
67 dbgs() << "Allocating local " << Local << "for VReg "
68 << Register::virtReg2Index(Reg) << '\n';
69 });
70 MFI.setFrameBaseLocal(Local);
71 }
72}
73
74/// Return a local id number for the given register, assigning it a new one
75/// if it doesn't yet have one.
76static unsigned getLocalId(DenseMap<unsigned, unsigned> &Reg2Local,
77 WebAssemblyFunctionInfo &MFI, unsigned &CurLocal,
78 unsigned Reg) {
79 auto P = Reg2Local.insert(std::make_pair(Reg, CurLocal));
80 if (P.second) {
81 checkFrameBase(MFI, CurLocal, Reg);
82 ++CurLocal;
83 }
84 return P.first->second;
85}
86
87/// Get the appropriate drop opcode for the given register class.
88static unsigned getDropOpcode(const TargetRegisterClass *RC) {
89 if (RC == &WebAssembly::I32RegClass)
90 return WebAssembly::DROP_I32;
91 if (RC == &WebAssembly::I64RegClass)
92 return WebAssembly::DROP_I64;
93 if (RC == &WebAssembly::F32RegClass)
94 return WebAssembly::DROP_F32;
95 if (RC == &WebAssembly::F64RegClass)
96 return WebAssembly::DROP_F64;
97 if (RC == &WebAssembly::V128RegClass)
98 return WebAssembly::DROP_V128;
99 if (RC == &WebAssembly::FUNCREFRegClass)
100 return WebAssembly::DROP_FUNCREF;
101 if (RC == &WebAssembly::EXTERNREFRegClass)
102 return WebAssembly::DROP_EXTERNREF;
103 if (RC == &WebAssembly::EXNREFRegClass)
104 return WebAssembly::DROP_EXNREF;
105 llvm_unreachable("Unexpected register class");
106}
107
108/// Get the appropriate local.get opcode for the given register class.
109static unsigned getLocalGetOpcode(const TargetRegisterClass *RC) {
110 if (RC == &WebAssembly::I32RegClass)
111 return WebAssembly::LOCAL_GET_I32;
112 if (RC == &WebAssembly::I64RegClass)
113 return WebAssembly::LOCAL_GET_I64;
114 if (RC == &WebAssembly::F32RegClass)
115 return WebAssembly::LOCAL_GET_F32;
116 if (RC == &WebAssembly::F64RegClass)
117 return WebAssembly::LOCAL_GET_F64;
118 if (RC == &WebAssembly::V128RegClass)
119 return WebAssembly::LOCAL_GET_V128;
120 if (RC == &WebAssembly::FUNCREFRegClass)
121 return WebAssembly::LOCAL_GET_FUNCREF;
122 if (RC == &WebAssembly::EXTERNREFRegClass)
123 return WebAssembly::LOCAL_GET_EXTERNREF;
124 if (RC == &WebAssembly::EXNREFRegClass)
125 return WebAssembly::LOCAL_GET_EXNREF;
126 llvm_unreachable("Unexpected register class");
127}
128
129/// Get the appropriate local.set opcode for the given register class.
130static unsigned getLocalSetOpcode(const TargetRegisterClass *RC) {
131 if (RC == &WebAssembly::I32RegClass)
132 return WebAssembly::LOCAL_SET_I32;
133 if (RC == &WebAssembly::I64RegClass)
134 return WebAssembly::LOCAL_SET_I64;
135 if (RC == &WebAssembly::F32RegClass)
136 return WebAssembly::LOCAL_SET_F32;
137 if (RC == &WebAssembly::F64RegClass)
138 return WebAssembly::LOCAL_SET_F64;
139 if (RC == &WebAssembly::V128RegClass)
140 return WebAssembly::LOCAL_SET_V128;
141 if (RC == &WebAssembly::FUNCREFRegClass)
142 return WebAssembly::LOCAL_SET_FUNCREF;
143 if (RC == &WebAssembly::EXTERNREFRegClass)
144 return WebAssembly::LOCAL_SET_EXTERNREF;
145 if (RC == &WebAssembly::EXNREFRegClass)
146 return WebAssembly::LOCAL_SET_EXNREF;
147 llvm_unreachable("Unexpected register class");
148}
149
150/// Get the appropriate local.tee opcode for the given register class.
151static unsigned getLocalTeeOpcode(const TargetRegisterClass *RC) {
152 if (RC == &WebAssembly::I32RegClass)
153 return WebAssembly::LOCAL_TEE_I32;
154 if (RC == &WebAssembly::I64RegClass)
155 return WebAssembly::LOCAL_TEE_I64;
156 if (RC == &WebAssembly::F32RegClass)
157 return WebAssembly::LOCAL_TEE_F32;
158 if (RC == &WebAssembly::F64RegClass)
159 return WebAssembly::LOCAL_TEE_F64;
160 if (RC == &WebAssembly::V128RegClass)
161 return WebAssembly::LOCAL_TEE_V128;
162 if (RC == &WebAssembly::FUNCREFRegClass)
163 return WebAssembly::LOCAL_TEE_FUNCREF;
164 if (RC == &WebAssembly::EXTERNREFRegClass)
165 return WebAssembly::LOCAL_TEE_EXTERNREF;
166 if (RC == &WebAssembly::EXNREFRegClass)
167 return WebAssembly::LOCAL_TEE_EXNREF;
168 llvm_unreachable("Unexpected register class");
169}
170
171/// Get the type associated with the given register class.
173 if (RC == &WebAssembly::I32RegClass)
174 return MVT::i32;
175 if (RC == &WebAssembly::I64RegClass)
176 return MVT::i64;
177 if (RC == &WebAssembly::F32RegClass)
178 return MVT::f32;
179 if (RC == &WebAssembly::F64RegClass)
180 return MVT::f64;
181 if (RC == &WebAssembly::V128RegClass)
182 return MVT::v16i8;
183 if (RC == &WebAssembly::FUNCREFRegClass)
184 return MVT::funcref;
185 if (RC == &WebAssembly::EXTERNREFRegClass)
186 return MVT::externref;
187 if (RC == &WebAssembly::EXNREFRegClass)
188 return MVT::exnref;
189 llvm_unreachable("unrecognized register class");
190}
191
192/// Given a MachineOperand of a stackified vreg, return the instruction at the
193/// start of the expression tree.
196 const WebAssemblyFunctionInfo &MFI) {
197 Register Reg = MO.getReg();
198 assert(MFI.isVRegStackified(Reg));
199 MachineInstr *Def = MRI.getVRegDef(Reg);
200
201 // If this instruction has any non-stackified defs, it is the start
202 for (auto DefReg : Def->defs()) {
203 if (!MFI.isVRegStackified(DefReg.getReg())) {
204 return Def;
205 }
206 }
207
208 // Find the first stackified use and proceed from there.
209 for (MachineOperand &DefMO : Def->explicit_uses()) {
210 if (!DefMO.isReg())
211 continue;
212 return findStartOfTree(DefMO, MRI, MFI);
213 }
214
215 // If there were no stackified uses, we've reached the start.
216 return Def;
217}
218
219bool WebAssemblyExplicitLocals::runOnMachineFunction(MachineFunction &MF) {
220 LLVM_DEBUG(dbgs() << "********** Make Locals Explicit **********\n"
221 "********** Function: "
222 << MF.getName() << '\n');
223
224 bool Changed = false;
227 const auto *TII = MF.getSubtarget<WebAssemblySubtarget>().getInstrInfo();
228
229 // Map non-stackified virtual registers to their local ids.
231
232 // Handle ARGUMENTS first to ensure that they get the designated numbers.
233 for (MachineBasicBlock::iterator I = MF.begin()->begin(),
234 E = MF.begin()->end();
235 I != E;) {
236 MachineInstr &MI = *I++;
237 if (!WebAssembly::isArgument(MI.getOpcode()))
238 break;
239 Register Reg = MI.getOperand(0).getReg();
240 assert(!MFI.isVRegStackified(Reg));
241 auto Local = static_cast<unsigned>(MI.getOperand(1).getImm());
242 Reg2Local[Reg] = Local;
243 checkFrameBase(MFI, Local, Reg);
244
245 // Update debug value to point to the local before removing.
247
248 MI.eraseFromParent();
249 Changed = true;
250 }
251
252 // Start assigning local numbers after the last parameter and after any
253 // already-assigned locals.
254 unsigned CurLocal = static_cast<unsigned>(MFI.getParams().size());
255 CurLocal += static_cast<unsigned>(MFI.getLocals().size());
256
257 // Precompute the set of registers that are unused, so that we can insert
258 // drops to their defs.
259 BitVector UseEmpty(MRI.getNumVirtRegs());
260 for (unsigned I = 0, E = MRI.getNumVirtRegs(); I < E; ++I)
261 UseEmpty[I] = MRI.use_empty(Register::index2VirtReg(I));
262
263 // Visit each instruction in the function.
264 for (MachineBasicBlock &MBB : MF) {
266 assert(!WebAssembly::isArgument(MI.getOpcode()));
267
268 if (MI.isDebugInstr() || MI.isLabel())
269 continue;
270
271 if (MI.getOpcode() == WebAssembly::IMPLICIT_DEF) {
272 MI.eraseFromParent();
273 Changed = true;
274 continue;
275 }
276
277 // Replace tee instructions with local.tee. The difference is that tee
278 // instructions have two defs, while local.tee instructions have one def
279 // and an index of a local to write to.
280 //
281 // - Before:
282 // TeeReg, Reg = TEE DefReg
283 // INST ..., TeeReg, ...
284 // INST ..., Reg, ...
285 // INST ..., Reg, ...
286 // * DefReg: may or may not be stackified
287 // * Reg: not stackified
288 // * TeeReg: stackified
289 //
290 // - After (when DefReg was already stackified):
291 // TeeReg = LOCAL_TEE LocalId1, DefReg
292 // INST ..., TeeReg, ...
293 // INST ..., Reg, ...
294 // INST ..., Reg, ...
295 // * Reg: mapped to LocalId1
296 // * TeeReg: stackified
297 //
298 // - After (when DefReg was not already stackified):
299 // NewReg = LOCAL_GET LocalId1
300 // TeeReg = LOCAL_TEE LocalId2, NewReg
301 // INST ..., TeeReg, ...
302 // INST ..., Reg, ...
303 // INST ..., Reg, ...
304 // * DefReg: mapped to LocalId1
305 // * Reg: mapped to LocalId2
306 // * TeeReg: stackified
307 if (WebAssembly::isTee(MI.getOpcode())) {
308 assert(MFI.isVRegStackified(MI.getOperand(0).getReg()));
309 assert(!MFI.isVRegStackified(MI.getOperand(1).getReg()));
310 Register DefReg = MI.getOperand(2).getReg();
311 const TargetRegisterClass *RC = MRI.getRegClass(DefReg);
312
313 // Stackify the input if it isn't stackified yet.
314 if (!MFI.isVRegStackified(DefReg)) {
315 unsigned LocalId = getLocalId(Reg2Local, MFI, CurLocal, DefReg);
316 Register NewReg = MRI.createVirtualRegister(RC);
317 unsigned Opc = getLocalGetOpcode(RC);
318 BuildMI(MBB, &MI, MI.getDebugLoc(), TII->get(Opc), NewReg)
319 .addImm(LocalId);
320 MI.getOperand(2).setReg(NewReg);
321 MFI.stackifyVReg(MRI, NewReg);
322 }
323
324 // Replace the TEE with a LOCAL_TEE.
325 unsigned LocalId =
326 getLocalId(Reg2Local, MFI, CurLocal, MI.getOperand(1).getReg());
327 unsigned Opc = getLocalTeeOpcode(RC);
328 BuildMI(MBB, &MI, MI.getDebugLoc(), TII->get(Opc),
329 MI.getOperand(0).getReg())
330 .addImm(LocalId)
331 .addReg(MI.getOperand(2).getReg());
332
334
335 MI.eraseFromParent();
336 Changed = true;
337 continue;
338 }
339
340 // Insert local.sets for any defs that aren't stackified yet.
341 for (auto &Def : MI.defs()) {
342 Register OldReg = Def.getReg();
343 if (!MFI.isVRegStackified(OldReg)) {
344 const TargetRegisterClass *RC = MRI.getRegClass(OldReg);
345 Register NewReg = MRI.createVirtualRegister(RC);
346 auto InsertPt = std::next(MI.getIterator());
347 if (UseEmpty[Register::virtReg2Index(OldReg)]) {
348 unsigned Opc = getDropOpcode(RC);
350 BuildMI(MBB, InsertPt, MI.getDebugLoc(), TII->get(Opc))
351 .addReg(NewReg);
352 // After the drop instruction, this reg operand will not be used
353 Drop->getOperand(0).setIsKill();
354 if (MFI.isFrameBaseVirtual() && OldReg == MFI.getFrameBaseVreg())
355 MFI.clearFrameBaseVreg();
356 } else {
357 unsigned LocalId = getLocalId(Reg2Local, MFI, CurLocal, OldReg);
358 unsigned Opc = getLocalSetOpcode(RC);
359
361
362 BuildMI(MBB, InsertPt, MI.getDebugLoc(), TII->get(Opc))
363 .addImm(LocalId)
364 .addReg(NewReg);
365 }
366 // This register operand of the original instruction is now being used
367 // by the inserted drop or local.set instruction, so make it not dead
368 // yet.
369 Def.setReg(NewReg);
370 Def.setIsDead(false);
371 MFI.stackifyVReg(MRI, NewReg);
372 Changed = true;
373 }
374 }
375
376 // Insert local.gets for any uses that aren't stackified yet.
377 MachineInstr *InsertPt = &MI;
378 for (MachineOperand &MO : reverse(MI.explicit_uses())) {
379 if (!MO.isReg())
380 continue;
381
382 Register OldReg = MO.getReg();
383
384 // Inline asm may have a def in the middle of the operands. Our contract
385 // with inline asm register operands is to provide local indices as
386 // immediates.
387 if (MO.isDef()) {
388 assert(MI.isInlineAsm());
389 unsigned LocalId = getLocalId(Reg2Local, MFI, CurLocal, OldReg);
390 // If this register operand is tied to another operand, we can't
391 // change it to an immediate. Untie it first.
392 MI.untieRegOperand(MO.getOperandNo());
393 MO.ChangeToImmediate(LocalId);
394 continue;
395 }
396
397 // If we see a stackified register, prepare to insert subsequent
398 // local.gets before the start of its tree.
399 if (MFI.isVRegStackified(OldReg)) {
400 InsertPt = findStartOfTree(MO, MRI, MFI);
401 continue;
402 }
403
404 // Our contract with inline asm register operands is to provide local
405 // indices as immediates.
406 if (MI.isInlineAsm()) {
407 unsigned LocalId = getLocalId(Reg2Local, MFI, CurLocal, OldReg);
408 // Untie it first if this reg operand is tied to another operand.
409 MI.untieRegOperand(MO.getOperandNo());
410 MO.ChangeToImmediate(LocalId);
411 continue;
412 }
413
414 // Insert a local.get.
415 unsigned LocalId = getLocalId(Reg2Local, MFI, CurLocal, OldReg);
416 const TargetRegisterClass *RC = MRI.getRegClass(OldReg);
417 Register NewReg = MRI.createVirtualRegister(RC);
418 unsigned Opc = getLocalGetOpcode(RC);
419 // Use a InsertPt as our DebugLoc, since MI may be discontinuous from
420 // the where this local is being inserted, causing non-linear stepping
421 // in the debugger or function entry points where variables aren't live
422 // yet. Alternative is previous instruction, but that is strictly worse
423 // since it can point at the previous statement.
424 // See crbug.com/1251909, crbug.com/1249745
425 InsertPt = BuildMI(MBB, InsertPt, InsertPt->getDebugLoc(),
426 TII->get(Opc), NewReg).addImm(LocalId);
427 MO.setReg(NewReg);
428 MFI.stackifyVReg(MRI, NewReg);
429 Changed = true;
430 }
431
432 // Coalesce and eliminate COPY instructions.
433 if (WebAssembly::isCopy(MI.getOpcode())) {
434 MRI.replaceRegWith(MI.getOperand(1).getReg(),
435 MI.getOperand(0).getReg());
436 MI.eraseFromParent();
437 Changed = true;
438 }
439 }
440 }
441
442 // Define the locals.
443 // TODO: Sort the locals for better compression.
444 MFI.setNumLocals(CurLocal - MFI.getParams().size());
445 for (unsigned I = 0, E = MRI.getNumVirtRegs(); I < E; ++I) {
447 auto RL = Reg2Local.find(Reg);
448 if (RL == Reg2Local.end() || RL->second < MFI.getParams().size())
449 continue;
450
451 MFI.setLocal(RL->second - MFI.getParams().size(),
452 typeForRegClass(MRI.getRegClass(Reg)));
453 Changed = true;
454 }
455
456#ifndef NDEBUG
457 // Assert that all registers have been stackified at this point.
458 for (const MachineBasicBlock &MBB : MF) {
459 for (const MachineInstr &MI : MBB) {
460 if (MI.isDebugInstr() || MI.isLabel())
461 continue;
462 for (const MachineOperand &MO : MI.explicit_operands()) {
463 assert(
464 (!MO.isReg() || MRI.use_empty(MO.getReg()) ||
465 MFI.isVRegStackified(MO.getReg())) &&
466 "WebAssemblyExplicitLocals failed to stackify a register operand");
467 }
468 }
469 }
470#endif
471
472 return Changed;
473}
unsigned const MachineRegisterInfo * MRI
MachineBasicBlock & MBB
#define LLVM_DEBUG(X)
Definition: Debug.h:101
const HexagonInstrInfo * TII
IRTranslator LLVM IR MI
#define I(x, y, z)
Definition: MD5.cpp:58
#define P(N)
#define INITIALIZE_PASS(passName, arg, name, cfg, analysis)
Definition: PassSupport.h:38
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
This file contains the declaration of the WebAssembly-specific manager for DebugValues associated wit...
static unsigned getLocalGetOpcode(const TargetRegisterClass *RC)
Get the appropriate local.get opcode for the given register class.
static unsigned getLocalId(DenseMap< unsigned, unsigned > &Reg2Local, WebAssemblyFunctionInfo &MFI, unsigned &CurLocal, unsigned Reg)
Return a local id number for the given register, assigning it a new one if it doesn't yet have one.
static MachineInstr * findStartOfTree(MachineOperand &MO, MachineRegisterInfo &MRI, const WebAssemblyFunctionInfo &MFI)
Given a MachineOperand of a stackified vreg, return the instruction at the start of the expression tr...
static MVT typeForRegClass(const TargetRegisterClass *RC)
Get the type associated with the given register class.
static unsigned getLocalTeeOpcode(const TargetRegisterClass *RC)
Get the appropriate local.tee opcode for the given register class.
static void checkFrameBase(WebAssemblyFunctionInfo &MFI, unsigned Local, unsigned Reg)
static unsigned getLocalSetOpcode(const TargetRegisterClass *RC)
Get the appropriate local.set opcode for the given register class.
static unsigned getDropOpcode(const TargetRegisterClass *RC)
Get the appropriate drop opcode for the given register class.
#define DEBUG_TYPE
This file provides WebAssembly-specific target descriptions.
This file declares WebAssembly-specific per-machine-function information.
This file declares the WebAssembly-specific subclass of TargetSubtarget.
This file contains the declaration of the WebAssembly-specific utility functions.
This file contains the entry points for global functions defined in the LLVM WebAssembly back-end.
Represent the analysis usage information of a pass.
AnalysisUsage & addPreserved()
Add the specified Pass class to the set of analyses preserved by this pass.
void setPreservesCFG()
This function should be called by the pass, iff they do not:
Definition: Pass.cpp:269
iterator find(const_arg_type_t< KeyT > Val)
Definition: DenseMap.h:155
iterator end()
Definition: DenseMap.h:84
std::pair< iterator, bool > insert(const std::pair< KeyT, ValueT > &KV)
Definition: DenseMap.h:220
FunctionPass class - This class is used to implement most global optimizations.
Definition: Pass.h:311
Machine Value Type.
MachineBlockFrequencyInfo pass uses BlockFrequencyInfoImpl implementation to estimate machine basic b...
MachineFunctionPass - This class adapts the FunctionPass interface to allow convenient creation of pa...
void getAnalysisUsage(AnalysisUsage &AU) const override
getAnalysisUsage - Subclasses that override getAnalysisUsage must call this.
virtual bool runOnMachineFunction(MachineFunction &MF)=0
runOnMachineFunction - This method must be overloaded to perform the desired machine code transformat...
const TargetSubtargetInfo & getSubtarget() const
getSubtarget - Return the subtarget for which this machine code is being compiled.
StringRef getName() const
getName - Return the name of the corresponding LLVM function.
MachineRegisterInfo & getRegInfo()
getRegInfo - Return information about the registers currently in use.
Ty * getInfo()
getInfo - Keep track of various per-function pieces of information for backends that would like to do...
const MachineInstrBuilder & addImm(int64_t Val) const
Add a new immediate operand.
const MachineInstrBuilder & addReg(Register RegNo, unsigned flags=0, unsigned SubReg=0) const
Add a new virtual register operand.
Representation of each machine instruction.
Definition: MachineInstr.h:69
const DebugLoc & getDebugLoc() const
Returns the debug location id of this MachineInstr.
Definition: MachineInstr.h:493
MachineOperand class - Representation of each machine instruction operand.
Register getReg() const
getReg - Returns the register number.
MachineRegisterInfo - Keep track of information for virtual and physical registers,...
virtual StringRef getPassName() const
getPassName - Return a nice clean name for a pass.
Definition: Pass.cpp:81
Wrapper class representing virtual and physical registers.
Definition: Register.h:19
static Register index2VirtReg(unsigned Index)
Convert a 0-based index to a virtual register number.
Definition: Register.h:84
static unsigned virtReg2Index(Register Reg)
Convert a virtual register number to a 0-based index.
Definition: Register.h:77
StringRef - Represent a constant reference to a string, i.e.
Definition: StringRef.h:50
This class is derived from MachineFunctionInfo and contains private WebAssembly-specific information ...
void stackifyVReg(MachineRegisterInfo &MRI, unsigned VReg)
const std::vector< MVT > & getLocals() const
const std::vector< MVT > & getParams() const
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
unsigned ID
LLVM IR allows to use arbitrary numbers as calling convention identifiers.
Definition: CallingConv.h:24
bool isArgument(unsigned Opc)
bool isCopy(unsigned Opc)
bool isTee(unsigned Opc)
Reg
All possible values of the reg field in the ModR/M byte.
NodeAddr< DefNode * > Def
Definition: RDFGraph.h:384
This is an optimization pass for GlobalISel generic memory operations.
Definition: AddressRanges.h:18
MachineInstrBuilder BuildMI(MachineFunction &MF, const MIMetadata &MIMD, const MCInstrDesc &MCID)
Builder interface. Specify how to create the initial instruction itself.
iterator_range< early_inc_iterator_impl< detail::IterOfRange< RangeT > > > make_early_inc_range(RangeT &&Range)
Make a range that does early increment to allow mutation of the underlying range without disrupting i...
Definition: STLExtras.h:656
auto reverse(ContainerTy &&C)
Definition: STLExtras.h:419
raw_ostream & dbgs()
dbgs() - This returns a reference to a raw_ostream for debugging messages.
Definition: Debug.cpp:163
FunctionPass * createWebAssemblyExplicitLocals()