LLVM 20.0.0git
WebAssemblySubtarget.h
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1//=- WebAssemblySubtarget.h - Define Subtarget for the WebAssembly -*- C++ -*-//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8///
9/// \file
10/// This file declares the WebAssembly-specific subclass of
11/// TargetSubtarget.
12///
13//===----------------------------------------------------------------------===//
14
15#ifndef LLVM_LIB_TARGET_WEBASSEMBLY_WEBASSEMBLYSUBTARGET_H
16#define LLVM_LIB_TARGET_WEBASSEMBLY_WEBASSEMBLYSUBTARGET_H
17
24#include <string>
25
26#define GET_SUBTARGETINFO_HEADER
27#include "WebAssemblyGenSubtargetInfo.inc"
28
29namespace llvm {
30
31// Defined in WebAssemblyGenSubtargetInfo.inc.
32extern const SubtargetFeatureKV
33 WebAssemblyFeatureKV[WebAssembly::NumSubtargetFeatures];
34
36 enum SIMDEnum {
37 NoSIMD,
38 SIMD128,
39 RelaxedSIMD,
40 } SIMDLevel = NoSIMD;
41
42 bool HasAtomics = false;
43 bool HasBulkMemory = false;
44 bool HasBulkMemoryOpt = false;
45 bool HasCallIndirectOverlong = false;
46 bool HasExceptionHandling = false;
47 bool HasExtendedConst = false;
48 bool HasFP16 = false;
49 bool HasMultiMemory = false;
50 bool HasMultivalue = false;
51 bool HasMutableGlobals = false;
52 bool HasNontrappingFPToInt = false;
53 bool HasReferenceTypes = false;
54 bool HasSignExt = false;
55 bool HasTailCall = false;
56 bool HasWideArithmetic = false;
57
58 /// What processor and OS we're targeting.
59 Triple TargetTriple;
60
61 WebAssemblyFrameLowering FrameLowering;
62 WebAssemblyInstrInfo InstrInfo;
65
66 WebAssemblySubtarget &initializeSubtargetDependencies(StringRef CPU,
67 StringRef FS);
68
69public:
70 /// This constructor initializes the data members to match that
71 /// of the specified triple.
72 WebAssemblySubtarget(const Triple &TT, const std::string &CPU,
73 const std::string &FS, const TargetMachine &TM);
74
76 return &TSInfo;
77 }
79 return &FrameLowering;
80 }
82 return &TLInfo;
83 }
84 const WebAssemblyInstrInfo *getInstrInfo() const override {
85 return &InstrInfo;
86 }
87 const WebAssemblyRegisterInfo *getRegisterInfo() const override {
88 return &getInstrInfo()->getRegisterInfo();
89 }
90 const Triple &getTargetTriple() const { return TargetTriple; }
91 bool enableAtomicExpand() const override;
92 bool enableIndirectBrExpand() const override { return true; }
93 bool enableMachineScheduler() const override;
94 bool useAA() const override;
95
96 // Predicates used by WebAssemblyInstrInfo.td.
97 bool hasAddr64() const { return TargetTriple.isArch64Bit(); }
98 bool hasAtomics() const { return HasAtomics; }
99 bool hasBulkMemory() const { return HasBulkMemory; }
100 bool hasBulkMemoryOpt() const { return HasBulkMemoryOpt; }
101 bool hasCallIndirectOverlong() const { return HasCallIndirectOverlong; }
102 bool hasExceptionHandling() const { return HasExceptionHandling; }
103 bool hasExtendedConst() const { return HasExtendedConst; }
104 bool hasFP16() const { return HasFP16; }
105 bool hasMultiMemory() const { return HasMultiMemory; }
106 bool hasMultivalue() const { return HasMultivalue; }
107 bool hasMutableGlobals() const { return HasMutableGlobals; }
108 bool hasNontrappingFPToInt() const { return HasNontrappingFPToInt; }
109 bool hasReferenceTypes() const { return HasReferenceTypes; }
110 bool hasRelaxedSIMD() const { return SIMDLevel >= RelaxedSIMD; }
111 bool hasSignExt() const { return HasSignExt; }
112 bool hasSIMD128() const { return SIMDLevel >= SIMD128; }
113 bool hasTailCall() const { return HasTailCall; }
114 bool hasWideArithmetic() const { return HasWideArithmetic; }
115
116 /// Parses features string setting specified subtarget options. Definition of
117 /// function is auto generated by tblgen.
119};
120
121} // end namespace llvm
122
123#endif
This class implements WebAssembly-specific bits of TargetFrameLowering class.
This file defines the interfaces that WebAssembly uses to lower LLVM code into a selection DAG.
This file contains the WebAssembly implementation of the TargetInstrInfo class.
This file provides WebAssembly-specific target descriptions.
This file defines the WebAssembly subclass for SelectionDAGTargetInfo.
StringRef - Represent a constant reference to a string, i.e.
Definition: StringRef.h:51
Primary interface to the complete machine description for the target machine.
Definition: TargetMachine.h:77
Triple - Helper class for working with autoconf configuration names.
Definition: Triple.h:44
bool isArch64Bit() const
Test whether the architecture is 64-bit.
Definition: Triple.cpp:1681
const WebAssemblyRegisterInfo & getRegisterInfo() const
bool enableAtomicExpand() const override
const WebAssemblySelectionDAGInfo * getSelectionDAGInfo() const override
const Triple & getTargetTriple() const
bool enableIndirectBrExpand() const override
const WebAssemblyTargetLowering * getTargetLowering() const override
const WebAssemblyInstrInfo * getInstrInfo() const override
const WebAssemblyRegisterInfo * getRegisterInfo() const override
bool enableMachineScheduler() const override
void ParseSubtargetFeatures(StringRef CPU, StringRef TuneCPU, StringRef FS)
Parses features string setting specified subtarget options.
const WebAssemblyFrameLowering * getFrameLowering() const override
This is an optimization pass for GlobalISel generic memory operations.
Definition: AddressRanges.h:18
const SubtargetFeatureKV WebAssemblyFeatureKV[WebAssembly::NumSubtargetFeatures]