LLVM 20.0.0git
WebAssemblyInstrInfo.h
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1//=- WebAssemblyInstrInfo.h - WebAssembly Instruction Information -*- C++ -*-=//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8///
9/// \file
10/// This file contains the WebAssembly implementation of the
11/// TargetInstrInfo class.
12///
13//===----------------------------------------------------------------------===//
14
15#ifndef LLVM_LIB_TARGET_WEBASSEMBLY_WEBASSEMBLYINSTRINFO_H
16#define LLVM_LIB_TARGET_WEBASSEMBLY_WEBASSEMBLYINSTRINFO_H
17
19#include "llvm/ADT/ArrayRef.h"
21
22#define GET_INSTRINFO_HEADER
23#include "WebAssemblyGenInstrInfo.inc"
24
25#define GET_INSTRINFO_OPERAND_ENUM
26#include "WebAssemblyGenInstrInfo.inc"
27
28namespace llvm {
29
30namespace WebAssembly {
31
32int16_t getNamedOperandIdx(uint16_t Opcode, uint16_t NamedIndex);
33
34}
35
37
40
41public:
42 explicit WebAssemblyInstrInfo(const WebAssemblySubtarget &STI);
43
44 const WebAssemblyRegisterInfo &getRegisterInfo() const { return RI; }
45
46 bool isReallyTriviallyReMaterializable(const MachineInstr &MI) const override;
47
49 const DebugLoc &DL, MCRegister DestReg, MCRegister SrcReg,
50 bool KillSrc) const override;
52 unsigned OpIdx1,
53 unsigned OpIdx2) const override;
54
58 bool AllowModify = false) const override;
60 int *BytesRemoved = nullptr) const override;
63 const DebugLoc &DL,
64 int *BytesAdded = nullptr) const override;
65 bool
67
69 getSerializableTargetIndices() const override;
70
71 const MachineOperand &getCalleeOperand(const MachineInstr &MI) const override;
72
74 int64_t &Offset) const override;
75};
76
77} // end namespace llvm
78
79#endif
MachineBasicBlock & MBB
MachineBasicBlock MachineBasicBlock::iterator DebugLoc DL
IRTranslator LLVM IR MI
const SmallVectorImpl< MachineOperand > MachineBasicBlock * TBB
const SmallVectorImpl< MachineOperand > & Cond
This file contains the WebAssembly implementation of the WebAssemblyRegisterInfo class.
ArrayRef - Represent a constant reference to an array (0 or more elements consecutively in memory),...
Definition: ArrayRef.h:41
A debug info location.
Definition: DebugLoc.h:33
Wrapper class representing physical registers. Should be passed by value.
Definition: MCRegister.h:33
Representation of each machine instruction.
Definition: MachineInstr.h:69
MachineOperand class - Representation of each machine instruction operand.
This class consists of common code factored out of the SmallVector class to reduce code duplication b...
Definition: SmallVector.h:586
bool reverseBranchCondition(SmallVectorImpl< MachineOperand > &Cond) const override
bool isReallyTriviallyReMaterializable(const MachineInstr &MI) const override
const MachineOperand & getCalleeOperand(const MachineInstr &MI) const override
ArrayRef< std::pair< int, const char * > > getSerializableTargetIndices() const override
bool isExplicitTargetIndexDef(const MachineInstr &MI, int &Index, int64_t &Offset) const override
void copyPhysReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, const DebugLoc &DL, MCRegister DestReg, MCRegister SrcReg, bool KillSrc) const override
const WebAssemblyRegisterInfo & getRegisterInfo() const
unsigned insertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB, MachineBasicBlock *FBB, ArrayRef< MachineOperand > Cond, const DebugLoc &DL, int *BytesAdded=nullptr) const override
MachineInstr * commuteInstructionImpl(MachineInstr &MI, bool NewMI, unsigned OpIdx1, unsigned OpIdx2) const override
bool analyzeBranch(MachineBasicBlock &MBB, MachineBasicBlock *&TBB, MachineBasicBlock *&FBB, SmallVectorImpl< MachineOperand > &Cond, bool AllowModify=false) const override
unsigned removeBranch(MachineBasicBlock &MBB, int *BytesRemoved=nullptr) const override
int16_t getNamedOperandIdx(uint16_t Opcode, uint16_t NamedIndex)
This is an optimization pass for GlobalISel generic memory operations.
Definition: AddressRanges.h:18
@ Offset
Definition: DWP.cpp:480