Go to the documentation of this file.
14 #ifndef LLVM_CODEGEN_FASTISEL_H
15 #define LLVM_CODEGEN_FASTISEL_H
41 class FunctionLoweringInfo;
43 class MachineConstantPool;
44 class MachineFrameInfo;
45 class MachineFunction;
47 class MachineMemOperand;
49 class MachineRegisterInfo;
53 class TargetInstrInfo;
54 class TargetLibraryInfo;
56 class TargetRegisterClass;
57 class TargetRegisterInfo;
128 unsigned FixedArgs = ~0U) {
151 unsigned FixedArgs = ~0U) {
163 unsigned FixedArgs = ~0U);
167 unsigned FixedArgs = ~0U) {
357 virtual unsigned fastEmit_r(
MVT VT,
MVT RetVT,
unsigned Opcode,
unsigned Op0);
408 unsigned Op1,
unsigned Op2);
535 bool handlePHINodesInSuccessorBlocks(
const BasicBlock *LLVMBB);
549 void flushLocalValueMap();
552 void removeDeadLocalValueCode(
MachineInstr *SavedLastLocalValue);
560 const CallInst *CI,
unsigned StartIdx);
561 bool lowerCallOperands(
const CallInst *CI,
unsigned ArgIdx,
unsigned NumArgs,
562 const Value *Callee,
bool ForceRetVoidTy,
563 CallLoweringInfo &CLI);
568 #endif // LLVM_CODEGEN_FASTISEL_H
const TargetLibraryInfo * LibInfo
@ User
could "use" a pointer
This is an optimization pass for GlobalISel generic memory operations.
bool lowerCallTo(const CallInst *CI, MCSymbol *Symbol, unsigned NumArgs)
bool selectPatchpoint(const CallInst *I)
SmallVector< ISD::ArgFlagsTy, 16 > OutFlags
MCSymbol - Instances of this class represent a symbol name in the MC file, and MCSymbols are created ...
A parsed version of the target data layout string in and methods for querying it.
Register getRegForValue(const Value *V)
Create a virtual register and arrange for it to be assigned the value for the given LLVM value.
virtual unsigned fastEmit_f(MVT VT, MVT RetVT, unsigned Opcode, const ConstantFP *FPImm)
This method is called by target-independent code to request that an instruction with the given type,...
Predicate
This enumeration lists the possible predicates for CmpInst subclasses.
bool selectCast(const User *I, unsigned Opcode)
MachineRegisterInfo - Keep track of information for virtual and physical registers,...
Context object for machine code objects.
void updateValueMap(const Value *I, Register Reg, unsigned NumRegs=1)
Update the value map to include the new mapping for this instruction, or insert an extra copy to get ...
CallLoweringInfo & setCallee(CallingConv::ID CC, Type *ResultTy, MCSymbol *Target, ArgListTy &&ArgsList, unsigned FixedArgs=~0U)
Target - Wrapper for Target specific information.
Register fastEmit_ri_(MVT VT, unsigned Opcode, unsigned Op0, uint64_t Imm, MVT ImmType)
This method is a wrapper of fastEmit_ri.
This is a 'vector' (really, a variable-sized array), optimized for the case when the array is small.
Register fastEmitInst_f(unsigned MachineInstOpcode, const TargetRegisterClass *RC, const ConstantFP *FPImm)
Emit a MachineInstr with a floating point immediate, and a result register in the given register clas...
CallLoweringInfo & setIsPatchPoint(bool Value=true)
FastISel(FunctionLoweringInfo &FuncInfo, const TargetLibraryInfo *LibInfo, bool SkipTargetIndependentISel=false)
SmallVector< Register, 4 > InRegs
void finishBasicBlock()
Flush the local value map.
CallLoweringInfo & setCallee(Type *ResultTy, FunctionType *FuncTy, MCSymbol *Target, ArgListTy &&ArgsList, const CallBase &Call, unsigned FixedArgs=~0U)
bool lowerArguments()
Do "fast" instruction selection for function arguments and append the machine instructions to the cur...
Register fastEmitZExtFromI1(MVT VT, unsigned Op0)
Emit MachineInstrs to compute the value of Op with all but the least significant bit set to zero.
Reg
All possible values of the reg field in the ModR/M byte.
bool selectFreeze(const User *I)
SavePoint enterLocalValueArea()
Prepare InsertPt to begin inserting instructions into the local value area and return the old insert ...
TargetRegisterInfo base class - We assume that the target defines a static array of TargetRegisterDes...
SmallVector< Value *, 16 > OutVals
The instances of the Type class are immutable: once they are created, they are never changed.
Register fastEmitInst_rii(unsigned MachineInstOpcode, const TargetRegisterClass *RC, unsigned Op0, uint64_t Imm1, uint64_t Imm2)
Emit a MachineInstr with one register operand and two immediate operands.
virtual unsigned fastEmit_rr(MVT VT, MVT RetVT, unsigned Opcode, unsigned Op0, unsigned Op1)
This method is called by target-independent code to request that an instruction with the given type,...
A description of a memory reference used in the backend.
MachineInstr * getLastLocalValue()
Return the position of the last instruction emitted for materializing constants for use in the curren...
const TargetLowering & TLI
unsigned getNumParams() const
Return the number of fixed parameters this function type requires.
Register getRegForGEPIndex(const Value *Idx)
This is a wrapper around getRegForValue that also takes care of truncating or sign-extending the give...
virtual bool fastSelectInstruction(const Instruction *I)=0
This method is called by target-independent code when the normal FastISel process fails to select an ...
LLVM Basic Block Representation.
TargetInstrInfo - Interface to description of machine instruction set.
FunctionLoweringInfo & FuncInfo
virtual unsigned fastMaterializeConstant(const Constant *C)
Emit a constant in a register using target-specific logic, such as constant pool loads.
static GCRegistry::Add< CoreCLRGC > E("coreclr", "CoreCLR-compatible GC")
Register createResultReg(const TargetRegisterClass *RC)
(vector float) vec_cmpeq(*A, *B) C
This class defines information used to lower LLVM code to legal SelectionDAG operators that the targe...
MachineInstr * LastLocalValue
The position of the last instruction for materializing constants for use in the current block.
void leaveLocalValueArea(SavePoint Old)
Reset InsertPt to the given old insert position.
bool selectXRayTypedEvent(const CallInst *II)
Describe properties that are true of each instruction in the target description file.
virtual unsigned fastEmit_(MVT VT, MVT RetVT, unsigned Opcode)
This method is called by target-independent code to request that an instruction with the given type a...
MachineConstantPool & MCP
Flag
These should be considered private to the implementation of the MCInstrDesc class.
bool selectStackmap(const CallInst *I)
ConstantFP - Floating Point Values [float, double].
virtual unsigned fastEmit_ri(MVT VT, MVT RetVT, unsigned Opcode, unsigned Op0, uint64_t Imm)
This method is called by target-independent code to request that an instruction with the given type,...
MachineRegisterInfo & MRI
MachineMemOperand * createMachineMemOperandFor(const Instruction *I) const
Create a machine mem operand from the given instruction.
unsigned ID
LLVM IR allows to use arbitrary numbers as calling convention identifiers.
This class is the base class for the comparison instructions.
virtual bool fastLowerIntrinsicCall(const IntrinsicInst *II)
This method is called by target-independent code to do target- specific intrinsic lowering.
virtual unsigned fastMaterializeAlloca(const AllocaInst *C)
Emit an alloca address in a register using target-specific logic.
bool selectInstruction(const Instruction *I)
Do "fast" instruction selection for the given LLVM IR instruction and append the generated machine in...
This is an important base class in LLVM.
Representation of each machine instruction.
virtual bool tryToFoldLoadIntoMI(MachineInstr *, unsigned, const LoadInst *)
The specified machine instr operand is a vreg, and that vreg is being provided by the specified load ...
virtual bool fastLowerCall(CallLoweringInfo &CLI)
This method is called by target-independent code to do target- specific call lowering.
virtual unsigned fastEmit_i(MVT VT, MVT RetVT, unsigned Opcode, uint64_t Imm)
This method is called by target-independent code to request that an instruction with the given type,...
void fastEmitBranch(MachineBasicBlock *MSucc, const DebugLoc &DbgLoc)
Emit an unconditional branch to the given block, unless it is the immediate (fall-through) successor,...
compiles ldr LCPI1_0 ldr ldr mov lsr tst moveq r1 ldr LCPI1_1 and r0 bx lr It would be better to do something like to fold the shift into the conditional move
bool selectIntrinsicCall(const IntrinsicInst *II)
The MachineConstantPool class keeps track of constants referenced by a function which must be spilled...
Register fastEmitInst_rri(unsigned MachineInstOpcode, const TargetRegisterClass *RC, unsigned Op0, unsigned Op1, uint64_t Imm)
Emit a MachineInstr with two register operands, an immediate, and a result register in the given regi...
virtual unsigned fastEmit_r(MVT VT, MVT RetVT, unsigned Opcode, unsigned Op0)
This method is called by target-independent code to request that an instruction with the given type,...
Primary interface to the complete machine description for the target machine.
FunctionLoweringInfo - This contains information that is global to a function that is used when lower...
Register fastEmitInst_(unsigned MachineInstOpcode, const TargetRegisterClass *RC)
Emit a MachineInstr with no operands and a result register in the given register class.
virtual bool fastLowerArguments()
This method is called by target-independent code to do target- specific argument lowering.
@ BasicBlock
Various leaf nodes.
TargetLoweringBase::ArgListTy ArgListTy
This is a fast-path instruction selection class that generates poor code and doesn't support illegal ...
bool selectOperator(const User *I, unsigned Opcode)
Do "fast" instruction selection for the given LLVM IR operator (Instruction or ConstantExpr),...
DenseMap< const Value *, Register > LocalValueMap
MachineInstrBundleIterator< MachineInstr > iterator
StringRef - Represent a constant reference to a string, i.e.
bool canFoldAddIntoGEP(const User *GEP, const Value *Add)
Check if Add is an add that can be safely folded into GEP.
@ C
C - The default llvm calling convention, compatible with C.
bool shouldOptForSize(const MachineFunction *MF) const
void useInstrRefDebugInfo(bool Flag)
Signal whether instruction referencing variable locations are desired for this function's debug-info.
An instruction for reading from memory.
Register fastEmitInst_ri(unsigned MachineInstOpcode, const TargetRegisterClass *RC, unsigned Op0, uint64_t Imm)
Emit a MachineInstr with a register operand, an immediate, and a result register in the given registe...
Wrapper class representing virtual and physical registers.
std::vector< ArgListEntry > ArgListTy
bool hasOptSize() const
Optimize this function for size (-Os) or minimum size (-Oz).
CallLoweringInfo & setCallee(CallingConv::ID CC, Type *ResultTy, const Value *Target, ArgListTy &&ArgsList, unsigned FixedArgs=~0U)
bool tryToFoldLoad(const LoadInst *LI, const Instruction *FoldInst)
We're checking to see if we can fold LI into FoldInst.
DebugLoc getCurDebugLoc() const
Return current debug location information.
bool lowerCall(const CallInst *I)
Function & getFunction()
Return the LLVM function that this machine code represents.
bool selectExtractValue(const User *U)
SmallVector< Register, 16 > OutRegs
bool selectFNeg(const User *I, const Value *In)
Emit an FNeg operation.
Provides information about what library functions are available for the current target.
bool selectXRayCustomEvent(const CallInst *II)
bool SkipTargetIndependentISel
A wrapper class for inspecting calls to intrinsic functions.
The MachineFrameInfo class represents an abstract stack frame until prolog/epilog code is inserted.
SmallVector< ISD::InputArg, 4 > Ins
bool selectGetElementPtr(const User *I)
void setLastLocalValue(MachineInstr *I)
Update the position of the last instruction emitted for materializing constants for use in the curren...
bool UseInstrRefDebugInfo
Register fastEmitInst_rrr(unsigned MachineInstOpcode, const TargetRegisterClass *RC, unsigned Op0, unsigned Op1, unsigned Op2)
Emit a MachineInstr with three register operands and a result register in the given register class.
void removeDeadCode(MachineBasicBlock::iterator I, MachineBasicBlock::iterator E)
Remove all dead instructions between the I and E.
CallLoweringInfo & setTailCall(bool Value=true)
This class consists of common code factored out of the SmallVector class to reduce code duplication b...
Base class for all callable instructions (InvokeInst and CallInst) Holds everything related to callin...
This class represents a function call, abstracting a target machine's calling convention.
const TargetRegisterInfo & TRI
bool selectCall(const User *I)
an instruction to allocate memory on the stack
CmpInst::Predicate optimizeCmpPredicate(const CmpInst *CI) const
CallLoweringInfo & setCallee(Type *ResultTy, FunctionType *FuncTy, const Value *Target, ArgListTy &&ArgsList, const CallBase &Call)
bool selectBitCast(const User *I)
const TargetInstrInfo & TII
Register fastEmitInst_extractsubreg(MVT RetVT, unsigned Op0, uint32_t Idx)
Emit a MachineInstr for an extract_subreg from a specified index of a superregister to a specified ty...
virtual unsigned fastMaterializeFloatZero(const ConstantFP *CF)
Emit the floating-point constant +0.0 in a register using target- specific logic.
MachineInstr * EmitStartPt
The top most instruction in the current block that is allowed for emitting local variables.
Register lookUpRegForValue(const Value *V)
Look up the value to see if its value is already cached in a register.
void finishCondBranch(const BasicBlock *BranchBB, MachineBasicBlock *TrueMBB, MachineBasicBlock *FalseMBB)
Emit an unconditional branch to FalseMBB, obtains the branch weight and adds TrueMBB and FalseMBB to ...
Register fastEmitInst_rr(unsigned MachineInstOpcode, const TargetRegisterClass *RC, unsigned Op0, unsigned Op1)
Emit a MachineInstr with two register operands and a result register in the given register class.
LLVM Value Representation.
bool selectBinaryOp(const User *I, unsigned ISDOpcode)
Select and emit code for a binary operator instruction, which has an opcode which directly correspond...
void recomputeInsertPt()
Reset InsertPt to prepare for inserting instructions into the current block.
void startNewBlock()
Set the current block to which generated machine instructions will be appended.
Register constrainOperandRegClass(const MCInstrDesc &II, Register Op, unsigned OpNum)
Try to constrain Op so that it is usable by argument OpNum of the provided MCInstrDesc.
Register fastEmitInst_r(unsigned MachineInstOpcode, const TargetRegisterClass *RC, unsigned Op0)
Emit a MachineInstr with one register operand and a result register in the given register class.
Register fastEmitInst_i(unsigned MachineInstOpcode, const TargetRegisterClass *RC, uint64_t Imm)
Emit a MachineInstr with a single immediate operand, and a result register in the given register clas...
Class to represent function types.