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FastISel.h
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1 //===- FastISel.h - Definition of the FastISel class ------------*- C++ -*-===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 ///
9 /// \file
10 /// This file defines the FastISel class.
11 ///
12 //===----------------------------------------------------------------------===//
13 
14 #ifndef LLVM_CODEGEN_FASTISEL_H
15 #define LLVM_CODEGEN_FASTISEL_H
16 
17 #include "llvm/ADT/DenseMap.h"
18 #include "llvm/ADT/SmallVector.h"
19 #include "llvm/ADT/StringRef.h"
23 #include "llvm/IR/Attributes.h"
24 #include "llvm/IR/CallingConv.h"
25 #include "llvm/IR/DebugLoc.h"
26 #include "llvm/IR/DerivedTypes.h"
27 #include "llvm/IR/InstrTypes.h"
29 #include <cstdint>
30 #include <utility>
31 
32 namespace llvm {
33 
34 class AllocaInst;
35 class Instruction;
36 class IntrinsicInst;
37 class BasicBlock;
38 class CallInst;
39 class Constant;
40 class ConstantFP;
41 class DataLayout;
42 class FunctionLoweringInfo;
43 class LoadInst;
44 class MachineConstantPool;
45 class MachineFrameInfo;
46 class MachineFunction;
47 class MachineInstr;
48 class MachineMemOperand;
49 class MachineOperand;
50 class MachineRegisterInfo;
51 class MCContext;
52 class MCInstrDesc;
53 class MCSymbol;
54 class TargetInstrInfo;
55 class TargetLibraryInfo;
56 class TargetMachine;
57 class TargetRegisterClass;
58 class TargetRegisterInfo;
59 class Type;
60 class User;
61 class Value;
62 
63 /// This is a fast-path instruction selection class that generates poor
64 /// code and doesn't support illegal types or non-trivial lowering, but runs
65 /// quickly.
66 class FastISel {
67 public:
71  Type *RetTy = nullptr;
72  bool RetSExt : 1;
73  bool RetZExt : 1;
74  bool IsVarArg : 1;
75  bool IsInReg : 1;
76  bool DoesNotReturn : 1;
78  bool IsPatchPoint : 1;
79 
80  // IsTailCall Should be modified by implementations of FastLowerCall
81  // that perform tail call conversions.
82  bool IsTailCall = false;
83 
84  unsigned NumFixedArgs = -1;
86  const Value *Callee = nullptr;
87  MCSymbol *Symbol = nullptr;
89  const CallBase *CB = nullptr;
90  MachineInstr *Call = nullptr;
92  unsigned NumResultRegs = 0;
93 
99 
103 
105  const Value *Target, ArgListTy &&ArgsList,
106  const CallBase &Call) {
107  RetTy = ResultTy;
108  Callee = Target;
109 
110  IsInReg = Call.hasRetAttr(Attribute::InReg);
111  DoesNotReturn = Call.doesNotReturn();
112  IsVarArg = FuncTy->isVarArg();
113  IsReturnValueUsed = !Call.use_empty();
114  RetSExt = Call.hasRetAttr(Attribute::SExt);
115  RetZExt = Call.hasRetAttr(Attribute::ZExt);
116 
117  CallConv = Call.getCallingConv();
118  Args = std::move(ArgsList);
119  NumFixedArgs = FuncTy->getNumParams();
120 
121  CB = &Call;
122 
123  return *this;
124  }
125 
127  MCSymbol *Target, ArgListTy &&ArgsList,
128  const CallBase &Call,
129  unsigned FixedArgs = ~0U) {
130  RetTy = ResultTy;
131  Callee = Call.getCalledOperand();
132  Symbol = Target;
133 
134  IsInReg = Call.hasRetAttr(Attribute::InReg);
135  DoesNotReturn = Call.doesNotReturn();
136  IsVarArg = FuncTy->isVarArg();
137  IsReturnValueUsed = !Call.use_empty();
138  RetSExt = Call.hasRetAttr(Attribute::SExt);
139  RetZExt = Call.hasRetAttr(Attribute::ZExt);
140 
141  CallConv = Call.getCallingConv();
142  Args = std::move(ArgsList);
143  NumFixedArgs = (FixedArgs == ~0U) ? FuncTy->getNumParams() : FixedArgs;
144 
145  CB = &Call;
146 
147  return *this;
148  }
149 
151  const Value *Target, ArgListTy &&ArgsList,
152  unsigned FixedArgs = ~0U) {
153  RetTy = ResultTy;
154  Callee = Target;
155  CallConv = CC;
156  Args = std::move(ArgsList);
157  NumFixedArgs = (FixedArgs == ~0U) ? Args.size() : FixedArgs;
158  return *this;
159  }
160 
162  CallingConv::ID CC, Type *ResultTy,
163  StringRef Target, ArgListTy &&ArgsList,
164  unsigned FixedArgs = ~0U);
165 
167  MCSymbol *Target, ArgListTy &&ArgsList,
168  unsigned FixedArgs = ~0U) {
169  RetTy = ResultTy;
170  Symbol = Target;
171  CallConv = CC;
172  Args = std::move(ArgsList);
173  NumFixedArgs = (FixedArgs == ~0U) ? Args.size() : FixedArgs;
174  return *this;
175  }
176 
178  IsTailCall = Value;
179  return *this;
180  }
181 
184  return *this;
185  }
186 
187  ArgListTy &getArgs() { return Args; }
188 
189  void clearOuts() {
190  OutVals.clear();
191  OutFlags.clear();
192  OutRegs.clear();
193  }
194 
195  void clearIns() {
196  Ins.clear();
197  InRegs.clear();
198  }
199  };
200 
201 protected:
210  const DataLayout &DL;
216  bool UseInstrRefDebugInfo = false;
217 
218  /// The position of the last instruction for materializing constants
219  /// for use in the current block. It resets to EmitStartPt when it makes sense
220  /// (for example, it's usually profitable to avoid function calls between the
221  /// definition and the use)
223 
224  /// The top most instruction in the current block that is allowed for
225  /// emitting local variables. LastLocalValue resets to EmitStartPt when it
226  /// makes sense (for example, on function calls)
228 
229 public:
230  virtual ~FastISel();
231 
232  /// Return the position of the last instruction emitted for
233  /// materializing constants for use in the current block.
235 
236  /// Update the position of the last instruction emitted for
237  /// materializing constants for use in the current block.
239  EmitStartPt = I;
240  LastLocalValue = I;
241  }
242 
243  /// Set the current block to which generated machine instructions will
244  /// be appended.
245  void startNewBlock();
246 
247  /// Flush the local value map.
248  void finishBasicBlock();
249 
250  /// Return current debug location information.
251  DebugLoc getCurDebugLoc() const { return MIMD.getDL(); }
252 
253  /// Do "fast" instruction selection for function arguments and append
254  /// the machine instructions to the current block. Returns true when
255  /// successful.
256  bool lowerArguments();
257 
258  /// Do "fast" instruction selection for the given LLVM IR instruction
259  /// and append the generated machine instructions to the current block.
260  /// Returns true if selection was successful.
261  bool selectInstruction(const Instruction *I);
262 
263  /// Do "fast" instruction selection for the given LLVM IR operator
264  /// (Instruction or ConstantExpr), and append generated machine instructions
265  /// to the current block. Return true if selection was successful.
266  bool selectOperator(const User *I, unsigned Opcode);
267 
268  /// Create a virtual register and arrange for it to be assigned the
269  /// value for the given LLVM value.
270  Register getRegForValue(const Value *V);
271 
272  /// Look up the value to see if its value is already cached in a
273  /// register. It may be defined by instructions across blocks or defined
274  /// locally.
275  Register lookUpRegForValue(const Value *V);
276 
277  /// This is a wrapper around getRegForValue that also takes care of
278  /// truncating or sign-extending the given getelementptr index value.
279  Register getRegForGEPIndex(const Value *Idx);
280 
281  /// We're checking to see if we can fold \p LI into \p FoldInst. Note
282  /// that we could have a sequence where multiple LLVM IR instructions are
283  /// folded into the same machineinstr. For example we could have:
284  ///
285  /// A: x = load i32 *P
286  /// B: y = icmp A, 42
287  /// C: br y, ...
288  ///
289  /// In this scenario, \p LI is "A", and \p FoldInst is "C". We know about "B"
290  /// (and any other folded instructions) because it is between A and C.
291  ///
292  /// If we succeed folding, return true.
293  bool tryToFoldLoad(const LoadInst *LI, const Instruction *FoldInst);
294 
295  /// The specified machine instr operand is a vreg, and that vreg is
296  /// being provided by the specified load instruction. If possible, try to
297  /// fold the load as an operand to the instruction, returning true if
298  /// possible.
299  ///
300  /// This method should be implemented by targets.
301  virtual bool tryToFoldLoadIntoMI(MachineInstr * /*MI*/, unsigned /*OpNo*/,
302  const LoadInst * /*LI*/) {
303  return false;
304  }
305 
306  /// Reset InsertPt to prepare for inserting instructions into the
307  /// current block.
308  void recomputeInsertPt();
309 
310  /// Remove all dead instructions between the I and E.
313 
315 
316  /// Prepare InsertPt to begin inserting instructions into the local
317  /// value area and return the old insert position.
319 
320  /// Reset InsertPt to the given old insert position.
321  void leaveLocalValueArea(SavePoint Old);
322 
323  /// Signal whether instruction referencing variable locations are desired for
324  /// this function's debug-info.
327  }
328 
329 protected:
331  const TargetLibraryInfo *LibInfo,
332  bool SkipTargetIndependentISel = false);
333 
334  /// This method is called by target-independent code when the normal
335  /// FastISel process fails to select an instruction. This gives targets a
336  /// chance to emit code for anything that doesn't fit into FastISel's
337  /// framework. It returns true if it was successful.
338  virtual bool fastSelectInstruction(const Instruction *I) = 0;
339 
340  /// This method is called by target-independent code to do target-
341  /// specific argument lowering. It returns true if it was successful.
342  virtual bool fastLowerArguments();
343 
344  /// This method is called by target-independent code to do target-
345  /// specific call lowering. It returns true if it was successful.
346  virtual bool fastLowerCall(CallLoweringInfo &CLI);
347 
348  /// This method is called by target-independent code to do target-
349  /// specific intrinsic lowering. It returns true if it was successful.
350  virtual bool fastLowerIntrinsicCall(const IntrinsicInst *II);
351 
352  /// This method is called by target-independent code to request that an
353  /// instruction with the given type and opcode be emitted.
354  virtual unsigned fastEmit_(MVT VT, MVT RetVT, unsigned Opcode);
355 
356  /// This method is called by target-independent code to request that an
357  /// instruction with the given type, opcode, and register operand be emitted.
358  virtual unsigned fastEmit_r(MVT VT, MVT RetVT, unsigned Opcode, unsigned Op0);
359 
360  /// This method is called by target-independent code to request that an
361  /// instruction with the given type, opcode, and register operands be emitted.
362  virtual unsigned fastEmit_rr(MVT VT, MVT RetVT, unsigned Opcode, unsigned Op0,
363  unsigned Op1);
364 
365  /// This method is called by target-independent code to request that an
366  /// instruction with the given type, opcode, and register and immediate
367  /// operands be emitted.
368  virtual unsigned fastEmit_ri(MVT VT, MVT RetVT, unsigned Opcode, unsigned Op0,
369  uint64_t Imm);
370 
371  /// This method is a wrapper of fastEmit_ri.
372  ///
373  /// It first tries to emit an instruction with an immediate operand using
374  /// fastEmit_ri. If that fails, it materializes the immediate into a register
375  /// and try fastEmit_rr instead.
376  Register fastEmit_ri_(MVT VT, unsigned Opcode, unsigned Op0, uint64_t Imm,
377  MVT ImmType);
378 
379  /// This method is called by target-independent code to request that an
380  /// instruction with the given type, opcode, and immediate operand be emitted.
381  virtual unsigned fastEmit_i(MVT VT, MVT RetVT, unsigned Opcode, uint64_t Imm);
382 
383  /// This method is called by target-independent code to request that an
384  /// instruction with the given type, opcode, and floating-point immediate
385  /// operand be emitted.
386  virtual unsigned fastEmit_f(MVT VT, MVT RetVT, unsigned Opcode,
387  const ConstantFP *FPImm);
388 
389  /// Emit a MachineInstr with no operands and a result register in the
390  /// given register class.
391  Register fastEmitInst_(unsigned MachineInstOpcode,
392  const TargetRegisterClass *RC);
393 
394  /// Emit a MachineInstr with one register operand and a result register
395  /// in the given register class.
396  Register fastEmitInst_r(unsigned MachineInstOpcode,
397  const TargetRegisterClass *RC, unsigned Op0);
398 
399  /// Emit a MachineInstr with two register operands and a result
400  /// register in the given register class.
401  Register fastEmitInst_rr(unsigned MachineInstOpcode,
402  const TargetRegisterClass *RC, unsigned Op0,
403  unsigned Op1);
404 
405  /// Emit a MachineInstr with three register operands and a result
406  /// register in the given register class.
407  Register fastEmitInst_rrr(unsigned MachineInstOpcode,
408  const TargetRegisterClass *RC, unsigned Op0,
409  unsigned Op1, unsigned Op2);
410 
411  /// Emit a MachineInstr with a register operand, an immediate, and a
412  /// result register in the given register class.
413  Register fastEmitInst_ri(unsigned MachineInstOpcode,
414  const TargetRegisterClass *RC, unsigned Op0,
415  uint64_t Imm);
416 
417  /// Emit a MachineInstr with one register operand and two immediate
418  /// operands.
419  Register fastEmitInst_rii(unsigned MachineInstOpcode,
420  const TargetRegisterClass *RC, unsigned Op0,
421  uint64_t Imm1, uint64_t Imm2);
422 
423  /// Emit a MachineInstr with a floating point immediate, and a result
424  /// register in the given register class.
425  Register fastEmitInst_f(unsigned MachineInstOpcode,
426  const TargetRegisterClass *RC,
427  const ConstantFP *FPImm);
428 
429  /// Emit a MachineInstr with two register operands, an immediate, and a
430  /// result register in the given register class.
431  Register fastEmitInst_rri(unsigned MachineInstOpcode,
432  const TargetRegisterClass *RC, unsigned Op0,
433  unsigned Op1, uint64_t Imm);
434 
435  /// Emit a MachineInstr with a single immediate operand, and a result
436  /// register in the given register class.
437  Register fastEmitInst_i(unsigned MachineInstOpcode,
438  const TargetRegisterClass *RC, uint64_t Imm);
439 
440  /// Emit a MachineInstr for an extract_subreg from a specified index of
441  /// a superregister to a specified type.
442  Register fastEmitInst_extractsubreg(MVT RetVT, unsigned Op0, uint32_t Idx);
443 
444  /// Emit MachineInstrs to compute the value of Op with all but the
445  /// least significant bit set to zero.
446  Register fastEmitZExtFromI1(MVT VT, unsigned Op0);
447 
448  /// Emit an unconditional branch to the given block, unless it is the
449  /// immediate (fall-through) successor, and update the CFG.
450  void fastEmitBranch(MachineBasicBlock *MSucc, const DebugLoc &DbgLoc);
451 
452  /// Emit an unconditional branch to \p FalseMBB, obtains the branch weight
453  /// and adds TrueMBB and FalseMBB to the successor list.
454  void finishCondBranch(const BasicBlock *BranchBB, MachineBasicBlock *TrueMBB,
455  MachineBasicBlock *FalseMBB);
456 
457  /// Update the value map to include the new mapping for this
458  /// instruction, or insert an extra copy to get the result in a previous
459  /// determined register.
460  ///
461  /// NOTE: This is only necessary because we might select a block that uses a
462  /// value before we select the block that defines the value. It might be
463  /// possible to fix this by selecting blocks in reverse postorder.
464  void updateValueMap(const Value *I, Register Reg, unsigned NumRegs = 1);
465 
467 
468  /// Try to constrain Op so that it is usable by argument OpNum of the
469  /// provided MCInstrDesc. If this fails, create a new virtual register in the
470  /// correct class and COPY the value there.
472  unsigned OpNum);
473 
474  /// Emit a constant in a register using target-specific logic, such as
475  /// constant pool loads.
476  virtual unsigned fastMaterializeConstant(const Constant *C) { return 0; }
477 
478  /// Emit an alloca address in a register using target-specific logic.
479  virtual unsigned fastMaterializeAlloca(const AllocaInst *C) { return 0; }
480 
481  /// Emit the floating-point constant +0.0 in a register using target-
482  /// specific logic.
483  virtual unsigned fastMaterializeFloatZero(const ConstantFP *CF) {
484  return 0;
485  }
486 
487  /// Check if \c Add is an add that can be safely folded into \c GEP.
488  ///
489  /// \c Add can be folded into \c GEP if:
490  /// - \c Add is an add,
491  /// - \c Add's size matches \c GEP's,
492  /// - \c Add is in the same basic block as \c GEP, and
493  /// - \c Add has a constant operand.
494  bool canFoldAddIntoGEP(const User *GEP, const Value *Add);
495 
496  /// Create a machine mem operand from the given instruction.
498 
500 
501  bool lowerCallTo(const CallInst *CI, MCSymbol *Symbol, unsigned NumArgs);
502  bool lowerCallTo(const CallInst *CI, const char *SymName,
503  unsigned NumArgs);
504  bool lowerCallTo(CallLoweringInfo &CLI);
505 
506  bool lowerCall(const CallInst *I);
507  /// Select and emit code for a binary operator instruction, which has
508  /// an opcode which directly corresponds to the given ISD opcode.
509  bool selectBinaryOp(const User *I, unsigned ISDOpcode);
510  bool selectFNeg(const User *I, const Value *In);
511  bool selectGetElementPtr(const User *I);
512  bool selectStackmap(const CallInst *I);
513  bool selectPatchpoint(const CallInst *I);
514  bool selectCall(const User *I);
515  bool selectIntrinsicCall(const IntrinsicInst *II);
516  bool selectBitCast(const User *I);
517  bool selectFreeze(const User *I);
518  bool selectCast(const User *I, unsigned Opcode);
519  bool selectExtractValue(const User *U);
520  bool selectXRayCustomEvent(const CallInst *II);
521  bool selectXRayTypedEvent(const CallInst *II);
522 
523  bool shouldOptForSize(const MachineFunction *MF) const {
524  // TODO: Implement PGSO.
525  return MF->getFunction().hasOptSize();
526  }
527 
528 private:
529  /// Handle PHI nodes in successor blocks.
530  ///
531  /// Emit code to ensure constants are copied into registers when needed.
532  /// Remember the virtual registers that need to be added to the Machine PHI
533  /// nodes as input. We cannot just directly add them, because expansion might
534  /// result in multiple MBB's for one BB. As such, the start of the BB might
535  /// correspond to a different MBB than the end.
536  bool handlePHINodesInSuccessorBlocks(const BasicBlock *LLVMBB);
537 
538  /// Helper for materializeRegForValue to materialize a constant in a
539  /// target-independent way.
540  Register materializeConstant(const Value *V, MVT VT);
541 
542  /// Helper for getRegForVale. This function is called when the value
543  /// isn't already available in a register and must be materialized with new
544  /// instructions.
545  Register materializeRegForValue(const Value *V, MVT VT);
546 
547  /// Clears LocalValueMap and moves the area for the new local variables
548  /// to the beginning of the block. It helps to avoid spilling cached variables
549  /// across heavy instructions like calls.
550  void flushLocalValueMap();
551 
552  /// Removes dead local value instructions after SavedLastLocalvalue.
553  void removeDeadLocalValueCode(MachineInstr *SavedLastLocalValue);
554 
555  /// Insertion point before trying to select the current instruction.
556  MachineBasicBlock::iterator SavedInsertPt;
557 
558  /// Add a stackmap or patchpoint intrinsic call's live variable
559  /// operands to a stackmap or patchpoint machine instruction.
560  bool addStackMapLiveVars(SmallVectorImpl<MachineOperand> &Ops,
561  const CallInst *CI, unsigned StartIdx);
562  bool lowerCallOperands(const CallInst *CI, unsigned ArgIdx, unsigned NumArgs,
563  const Value *Callee, bool ForceRetVoidTy,
564  CallLoweringInfo &CLI);
565 };
566 
567 } // end namespace llvm
568 
569 #endif // LLVM_CODEGEN_FASTISEL_H
llvm::FastISel::LibInfo
const TargetLibraryInfo * LibInfo
Definition: FastISel.h:214
llvm::objcarc::ARCInstKind::User
@ User
could "use" a pointer
llvm
This is an optimization pass for GlobalISel generic memory operations.
Definition: AddressRanges.h:18
llvm::FastISel::CallLoweringInfo::CallConv
CallingConv::ID CallConv
Definition: FastISel.h:85
llvm::FastISel::lowerCallTo
bool lowerCallTo(const CallInst *CI, MCSymbol *Symbol, unsigned NumArgs)
Definition: FastISel.cpp:964
llvm::FastISel::selectPatchpoint
bool selectPatchpoint(const CallInst *I)
Definition: FastISel.cpp:762
llvm::FastISel::CallLoweringInfo::OutFlags
SmallVector< ISD::ArgFlagsTy, 16 > OutFlags
Definition: FastISel.h:95
llvm::MCSymbol
MCSymbol - Instances of this class represent a symbol name in the MC file, and MCSymbols are created ...
Definition: MCSymbol.h:41
llvm::DataLayout
A parsed version of the target data layout string in and methods for querying it.
Definition: DataLayout.h:113
llvm::FastISel::getRegForValue
Register getRegForValue(const Value *V)
Create a virtual register and arrange for it to be assigned the value for the given LLVM value.
Definition: FastISel.cpp:238
llvm::FastISel::~FastISel
virtual ~FastISel()
llvm::FastISel::fastEmit_f
virtual unsigned fastEmit_f(MVT VT, MVT RetVT, unsigned Opcode, const ConstantFP *FPImm)
This method is called by target-independent code to request that an instruction with the given type,...
Definition: FastISel.cpp:1846
llvm::CmpInst::Predicate
Predicate
This enumeration lists the possible predicates for CmpInst subclasses.
Definition: InstrTypes.h:719
llvm::FastISel::CallLoweringInfo::CallLoweringInfo
CallLoweringInfo()
Definition: FastISel.h:100
llvm::FastISel::selectCast
bool selectCast(const User *I, unsigned Opcode)
Definition: FastISel.cpp:1376
llvm::MachineRegisterInfo
MachineRegisterInfo - Keep track of information for virtual and physical registers,...
Definition: MachineRegisterInfo.h:50
llvm::MCContext
Context object for machine code objects.
Definition: MCContext.h:76
llvm::ISD::ConstantFP
@ ConstantFP
Definition: ISDOpcodes.h:77
StringRef.h
llvm::FastISel::CallLoweringInfo::Callee
const Value * Callee
Definition: FastISel.h:86
llvm::FastISel::updateValueMap
void updateValueMap(const Value *I, Register Reg, unsigned NumRegs=1)
Update the value map to include the new mapping for this instruction, or insert an extra copy to get ...
Definition: FastISel.cpp:362
llvm::FastISel::CallLoweringInfo::setCallee
CallLoweringInfo & setCallee(CallingConv::ID CC, Type *ResultTy, MCSymbol *Target, ArgListTy &&ArgsList, unsigned FixedArgs=~0U)
Definition: FastISel.h:166
llvm::Target
Target - Wrapper for Target specific information.
Definition: TargetRegistry.h:149
llvm::FastISel::fastEmit_ri_
Register fastEmit_ri_(MVT VT, unsigned Opcode, unsigned Op0, uint64_t Imm, MVT ImmType)
This method is a wrapper of fastEmit_ri.
Definition: FastISel.cpp:1860
llvm::SmallVector
This is a 'vector' (really, a variable-sized array), optimized for the case when the array is small.
Definition: SmallVector.h:1199
llvm::FastISel::fastEmitInst_f
Register fastEmitInst_f(unsigned MachineInstOpcode, const TargetRegisterClass *RC, const ConstantFP *FPImm)
Emit a MachineInstr with a floating point immediate, and a result register in the given register clas...
Definition: FastISel.cpp:2040
llvm::FastISel::CallLoweringInfo::setIsPatchPoint
CallLoweringInfo & setIsPatchPoint(bool Value=true)
Definition: FastISel.h:182
llvm::FastISel::FastISel
FastISel(FunctionLoweringInfo &FuncInfo, const TargetLibraryInfo *LibInfo, bool SkipTargetIndependentISel=false)
Definition: FastISel.cpp:1810
llvm::FastISel::CallLoweringInfo::ResultReg
Register ResultReg
Definition: FastISel.h:91
llvm::FastISel::CallLoweringInfo::InRegs
SmallVector< Register, 4 > InRegs
Definition: FastISel.h:98
llvm::FastISel::finishBasicBlock
void finishBasicBlock()
Flush the local value map.
Definition: FastISel.cpp:136
llvm::FastISel::CallLoweringInfo::setCallee
CallLoweringInfo & setCallee(Type *ResultTy, FunctionType *FuncTy, MCSymbol *Target, ArgListTy &&ArgsList, const CallBase &Call, unsigned FixedArgs=~0U)
Definition: FastISel.h:126
llvm::FastISel::lowerArguments
bool lowerArguments()
Do "fast" instruction selection for function arguments and append the machine instructions to the cur...
Definition: FastISel.cpp:138
llvm::FastISel::fastEmitZExtFromI1
Register fastEmitZExtFromI1(MVT VT, unsigned Op0)
Emit MachineInstrs to compute the value of Op with all but the least significant bit set to zero.
Definition: FastISel.cpp:2114
llvm::X86Disassembler::Reg
Reg
All possible values of the reg field in the ModR/M byte.
Definition: X86DisassemblerDecoder.h:462
llvm::FastISel::selectFreeze
bool selectFreeze(const User *I)
Definition: FastISel.cpp:1436
llvm::FastISel::enterLocalValueArea
SavePoint enterLocalValueArea()
Prepare InsertPt to begin inserting instructions into the local value area and return the old insert ...
Definition: FastISel.cpp:435
MachineBasicBlock.h
llvm::TargetRegisterInfo
TargetRegisterInfo base class - We assume that the target defines a static array of TargetRegisterDes...
Definition: TargetRegisterInfo.h:237
true
basic Basic Alias true
Definition: BasicAliasAnalysis.cpp:1793
llvm::FastISel::CallLoweringInfo::OutVals
SmallVector< Value *, 16 > OutVals
Definition: FastISel.h:94
llvm::Type
The instances of the Type class are immutable: once they are created, they are never changed.
Definition: Type.h:45
DenseMap.h
llvm::FastISel::fastEmitInst_rii
Register fastEmitInst_rii(unsigned MachineInstOpcode, const TargetRegisterClass *RC, unsigned Op0, uint64_t Imm1, uint64_t Imm2)
Emit a MachineInstr with one register operand and two immediate operands.
Definition: FastISel.cpp:2016
llvm::FastISel::fastEmit_rr
virtual unsigned fastEmit_rr(MVT VT, MVT RetVT, unsigned Opcode, unsigned Op0, unsigned Op1)
This method is called by target-independent code to request that an instruction with the given type,...
Definition: FastISel.cpp:1837
llvm::MachineMemOperand
A description of a memory reference used in the backend.
Definition: MachineMemOperand.h:127
llvm::FastISel::CallLoweringInfo::RetSExt
bool RetSExt
Definition: FastISel.h:72
llvm::FastISel::getLastLocalValue
MachineInstr * getLastLocalValue()
Return the position of the last instruction emitted for materializing constants for use in the curren...
Definition: FastISel.h:234
llvm::FastISel::TLI
const TargetLowering & TLI
Definition: FastISel.h:212
llvm::FunctionType::getNumParams
unsigned getNumParams() const
Return the number of fixed parameters this function type requires.
Definition: DerivedTypes.h:139
llvm::FastISel::getRegForGEPIndex
Register getRegForGEPIndex(const Value *Idx)
This is a wrapper around getRegForValue that also takes care of truncating or sign-extending the give...
Definition: FastISel.cpp:383
llvm::FastISel::fastSelectInstruction
virtual bool fastSelectInstruction(const Instruction *I)=0
This method is called by target-independent code when the normal FastISel process fails to select an ...
llvm::FastISel::MFI
MachineFrameInfo & MFI
Definition: FastISel.h:206
llvm::FunctionType::isVarArg
bool isVarArg() const
Definition: DerivedTypes.h:123
llvm::FastISel::CallLoweringInfo::RetZExt
bool RetZExt
Definition: FastISel.h:73
llvm::MIMetadata::getDL
const DebugLoc & getDL() const
Definition: MachineInstrBuilder.h:348
llvm::BasicBlock
LLVM Basic Block Representation.
Definition: BasicBlock.h:55
MachineValueType.h
TargetLowering.h
llvm::TargetInstrInfo
TargetInstrInfo - Interface to description of machine instruction set.
Definition: TargetInstrInfo.h:98
llvm::FastISel::FuncInfo
FunctionLoweringInfo & FuncInfo
Definition: FastISel.h:203
llvm::FastISel::fastMaterializeConstant
virtual unsigned fastMaterializeConstant(const Constant *C)
Emit a constant in a register using target-specific logic, such as constant pool loads.
Definition: FastISel.h:476
llvm::ISD::Constant
@ Constant
Definition: ISDOpcodes.h:76
E
static GCRegistry::Add< CoreCLRGC > E("coreclr", "CoreCLR-compatible GC")
llvm::FastISel::createResultReg
Register createResultReg(const TargetRegisterClass *RC)
Definition: FastISel.cpp:1895
llvm::User
Definition: User.h:44
C
(vector float) vec_cmpeq(*A, *B) C
Definition: README_ALTIVEC.txt:86
llvm::FastISel::CallLoweringInfo::clearIns
void clearIns()
Definition: FastISel.h:195
InstrTypes.h
llvm::TargetLowering
This class defines information used to lower LLVM code to legal SelectionDAG operators that the targe...
Definition: TargetLowering.h:3486
llvm::FastISel::CallLoweringInfo::CB
const CallBase * CB
Definition: FastISel.h:89
llvm::FastISel::LastLocalValue
MachineInstr * LastLocalValue
The position of the last instruction for materializing constants for use in the current block.
Definition: FastISel.h:222
llvm::FastISel::leaveLocalValueArea
void leaveLocalValueArea(SavePoint Old)
Reset InsertPt to the given old insert position.
Definition: FastISel.cpp:441
llvm::TargetRegisterClass
Definition: TargetRegisterInfo.h:46
llvm::FastISel::selectXRayTypedEvent
bool selectXRayTypedEvent(const CallInst *II)
Definition: FastISel.cpp:919
false
Definition: StackSlotColoring.cpp:141
llvm::MCInstrDesc
Describe properties that are true of each instruction in the target description file.
Definition: MCInstrDesc.h:197
llvm::FastISel::fastEmit_
virtual unsigned fastEmit_(MVT VT, MVT RetVT, unsigned Opcode)
This method is called by target-independent code to request that an instruction with the given type a...
Definition: FastISel.cpp:1831
llvm::CallingConv::C
@ C
The default llvm calling convention, compatible with C.
Definition: CallingConv.h:34
llvm::FastISel::MCP
MachineConstantPool & MCP
Definition: FastISel.h:207
llvm::Instruction
Definition: Instruction.h:42
llvm::MCID::Flag
Flag
These should be considered private to the implementation of the MCInstrDesc class.
Definition: MCInstrDesc.h:147
llvm::FastISel::selectStackmap
bool selectStackmap(const CallInst *I)
Definition: FastISel.cpp:650
llvm::ConstantFP
ConstantFP - Floating Point Values [float, double].
Definition: Constants.h:257
llvm::FastISel::fastEmit_ri
virtual unsigned fastEmit_ri(MVT VT, MVT RetVT, unsigned Opcode, unsigned Op0, uint64_t Imm)
This method is called by target-independent code to request that an instruction with the given type,...
Definition: FastISel.cpp:1851
llvm::FastISel::CallLoweringInfo::IsInReg
bool IsInReg
Definition: FastISel.h:75
llvm::FastISel::CallLoweringInfo::clearOuts
void clearOuts()
Definition: FastISel.h:189
DebugLoc.h
llvm::FastISel::MRI
MachineRegisterInfo & MRI
Definition: FastISel.h:205
llvm::FastISel::CallLoweringInfo::Call
MachineInstr * Call
Definition: FastISel.h:90
llvm::FastISel::createMachineMemOperandFor
MachineMemOperand * createMachineMemOperandFor(const Instruction *I) const
Create a machine mem operand from the given instruction.
Definition: FastISel.cpp:2267
llvm::CallingConv::ID
unsigned ID
LLVM IR allows to use arbitrary numbers as calling convention identifiers.
Definition: CallingConv.h:24
llvm::MachineBasicBlock
Definition: MachineBasicBlock.h:94
llvm::CmpInst
This class is the base class for the comparison instructions.
Definition: InstrTypes.h:709
llvm::FastISel::fastLowerIntrinsicCall
virtual bool fastLowerIntrinsicCall(const IntrinsicInst *II)
This method is called by target-independent code to do target- specific intrinsic lowering.
Definition: FastISel.cpp:1827
llvm::MIMetadata
Set of metadata that should be preserved when using BuildMI().
Definition: MachineInstrBuilder.h:335
llvm::FastISel::fastMaterializeAlloca
virtual unsigned fastMaterializeAlloca(const AllocaInst *C)
Emit an alloca address in a register using target-specific logic.
Definition: FastISel.h:479
llvm::tgtok::In
@ In
Definition: TGLexer.h:51
llvm::FastISel::CallLoweringInfo::NumResultRegs
unsigned NumResultRegs
Definition: FastISel.h:92
llvm::FastISel::selectInstruction
bool selectInstruction(const Instruction *I)
Do "fast" instruction selection for the given LLVM IR instruction and append the generated machine in...
Definition: FastISel.cpp:1476
llvm::Constant
This is an important base class in LLVM.
Definition: Constant.h:41
llvm::MachineInstr
Representation of each machine instruction.
Definition: MachineInstr.h:66
uint64_t
llvm::FastISel::tryToFoldLoadIntoMI
virtual bool tryToFoldLoadIntoMI(MachineInstr *, unsigned, const LoadInst *)
The specified machine instr operand is a vreg, and that vreg is being provided by the specified load ...
Definition: FastISel.h:301
llvm::FastISel::fastLowerCall
virtual bool fastLowerCall(CallLoweringInfo &CLI)
This method is called by target-independent code to do target- specific call lowering.
Definition: FastISel.cpp:1825
llvm::FastISel::fastEmit_i
virtual unsigned fastEmit_i(MVT VT, MVT RetVT, unsigned Opcode, uint64_t Imm)
This method is called by target-independent code to request that an instruction with the given type,...
Definition: FastISel.cpp:1842
llvm::FastISel::fastEmitBranch
void fastEmitBranch(MachineBasicBlock *MSucc, const DebugLoc &DbgLoc)
Emit an unconditional branch to the given block, unless it is the immediate (fall-through) successor,...
Definition: FastISel.cpp:1560
move
compiles ldr LCPI1_0 ldr ldr mov lsr tst moveq r1 ldr LCPI1_1 and r0 bx lr It would be better to do something like to fold the shift into the conditional move
Definition: README.txt:546
llvm::FastISel::CallLoweringInfo::getArgs
ArgListTy & getArgs()
Definition: FastISel.h:187
llvm::FastISel::selectIntrinsicCall
bool selectIntrinsicCall(const IntrinsicInst *II)
Definition: FastISel.cpp:1192
llvm::DenseMap
Definition: DenseMap.h:714
llvm::MachineConstantPool
The MachineConstantPool class keeps track of constants referenced by a function which must be spilled...
Definition: MachineConstantPool.h:117
llvm::FastISel::fastEmitInst_rri
Register fastEmitInst_rri(unsigned MachineInstOpcode, const TargetRegisterClass *RC, unsigned Op0, unsigned Op1, uint64_t Imm)
Emit a MachineInstr with two register operands, an immediate, and a result register in the given regi...
Definition: FastISel.cpp:2059
I
#define I(x, y, z)
Definition: MD5.cpp:58
llvm::FastISel::CallLoweringInfo::Args
ArgListTy Args
Definition: FastISel.h:88
llvm::FastISel::CallLoweringInfo::IsReturnValueUsed
bool IsReturnValueUsed
Definition: FastISel.h:77
llvm::FastISel::CallLoweringInfo
Definition: FastISel.h:70
TemplateParamKind::Type
@ Type
llvm::FastISel::fastEmit_r
virtual unsigned fastEmit_r(MVT VT, MVT RetVT, unsigned Opcode, unsigned Op0)
This method is called by target-independent code to request that an instruction with the given type,...
Definition: FastISel.cpp:1833
llvm::TargetMachine
Primary interface to the complete machine description for the target machine.
Definition: TargetMachine.h:77
llvm::FunctionLoweringInfo
FunctionLoweringInfo - This contains information that is global to a function that is used when lower...
Definition: FunctionLoweringInfo.h:52
llvm::TargetLoweringBase::ArgListEntry
Definition: TargetLowering.h:284
llvm::FastISel::fastEmitInst_
Register fastEmitInst_(unsigned MachineInstOpcode, const TargetRegisterClass *RC)
Emit a MachineInstr with no operands and a result register in the given register class.
Definition: FastISel.cpp:1916
llvm::FastISel::fastLowerArguments
virtual bool fastLowerArguments()
This method is called by target-independent code to do target- specific argument lowering.
Definition: FastISel.cpp:1823
llvm::ISD::BasicBlock
@ BasicBlock
Various leaf nodes.
Definition: ISDOpcodes.h:71
llvm::FastISel::CallLoweringInfo::IsTailCall
bool IsTailCall
Definition: FastISel.h:82
llvm::FastISel::ArgListTy
TargetLoweringBase::ArgListTy ArgListTy
Definition: FastISel.h:69
llvm::FastISel::CallLoweringInfo::NumFixedArgs
unsigned NumFixedArgs
Definition: FastISel.h:84
llvm::MVT
Machine Value Type.
Definition: MachineValueType.h:31
llvm::FastISel
This is a fast-path instruction selection class that generates poor code and doesn't support illegal ...
Definition: FastISel.h:66
llvm::MachineFunction
Definition: MachineFunction.h:257
llvm::FastISel::selectOperator
bool selectOperator(const User *I, unsigned Opcode)
Do "fast" instruction selection for the given LLVM IR operator (Instruction or ConstantExpr),...
Definition: FastISel.cpp:1681
llvm::FastISel::CallLoweringInfo::IsVarArg
bool IsVarArg
Definition: FastISel.h:74
llvm::FastISel::LocalValueMap
DenseMap< const Value *, Register > LocalValueMap
Definition: FastISel.h:202
llvm::MachineBasicBlock::iterator
MachineInstrBundleIterator< MachineInstr > iterator
Definition: MachineBasicBlock.h:269
llvm::StringRef
StringRef - Represent a constant reference to a string, i.e.
Definition: StringRef.h:50
llvm::FastISel::canFoldAddIntoGEP
bool canFoldAddIntoGEP(const User *GEP, const Value *Add)
Check if Add is an add that can be safely folded into GEP.
Definition: FastISel.cpp:2250
uint32_t
llvm::FastISel::shouldOptForSize
bool shouldOptForSize(const MachineFunction *MF) const
Definition: FastISel.h:523
llvm::FastISel::useInstrRefDebugInfo
void useInstrRefDebugInfo(bool Flag)
Signal whether instruction referencing variable locations are desired for this function's debug-info.
Definition: FastISel.h:325
llvm::FastISel::CallLoweringInfo::Symbol
MCSymbol * Symbol
Definition: FastISel.h:87
CC
auto CC
Definition: RISCVRedundantCopyElimination.cpp:79
llvm::LoadInst
An instruction for reading from memory.
Definition: Instructions.h:173
llvm::FastISel::fastEmitInst_ri
Register fastEmitInst_ri(unsigned MachineInstOpcode, const TargetRegisterClass *RC, unsigned Op0, uint64_t Imm)
Emit a MachineInstr with a register operand, an immediate, and a result register in the given registe...
Definition: FastISel.cpp:1994
llvm::Register
Wrapper class representing virtual and physical registers.
Definition: Register.h:19
llvm::TargetLoweringBase::ArgListTy
std::vector< ArgListEntry > ArgListTy
Definition: TargetLowering.h:314
llvm::Function::hasOptSize
bool hasOptSize() const
Optimize this function for size (-Os) or minimum size (-Oz).
Definition: Function.h:645
llvm::FastISel::CallLoweringInfo::setCallee
CallLoweringInfo & setCallee(CallingConv::ID CC, Type *ResultTy, const Value *Target, ArgListTy &&ArgsList, unsigned FixedArgs=~0U)
Definition: FastISel.h:150
CallingConv.h
Attributes.h
llvm::FastISel::tryToFoldLoad
bool tryToFoldLoad(const LoadInst *LI, const Instruction *FoldInst)
We're checking to see if we can fold LI into FoldInst.
Definition: FastISel.cpp:2189
llvm::FastISel::getCurDebugLoc
DebugLoc getCurDebugLoc() const
Return current debug location information.
Definition: FastISel.h:251
llvm::FastISel::lowerCall
bool lowerCall(const CallInst *I)
Definition: FastISel.cpp:1114
llvm::MachineFunction::getFunction
Function & getFunction()
Return the LLVM function that this machine code represents.
Definition: MachineFunction.h:623
llvm::FastISel::selectExtractValue
bool selectExtractValue(const User *U)
Definition: FastISel.cpp:1641
llvm::FastISel::CallLoweringInfo::OutRegs
SmallVector< Register, 16 > OutRegs
Definition: FastISel.h:96
llvm::AMDGPU::SendMsg::Op
Op
Definition: SIDefines.h:348
llvm::FastISel::selectFNeg
bool selectFNeg(const User *I, const Value *In)
Emit an FNeg operation.
Definition: FastISel.cpp:1599
llvm::TargetStackID::Value
Value
Definition: TargetFrameLowering.h:27
llvm::TargetLibraryInfo
Provides information about what library functions are available for the current target.
Definition: TargetLibraryInfo.h:225
llvm::FastISel::CallLoweringInfo::RetTy
Type * RetTy
Definition: FastISel.h:71
llvm::FastISel::selectXRayCustomEvent
bool selectXRayCustomEvent(const CallInst *II)
Definition: FastISel.cpp:900
llvm::FastISel::SkipTargetIndependentISel
bool SkipTargetIndependentISel
Definition: FastISel.h:215
llvm::IntrinsicInst
A wrapper class for inspecting calls to intrinsic functions.
Definition: IntrinsicInst.h:46
llvm::RISCVMatInt::Imm
@ Imm
Definition: RISCVMatInt.h:23
llvm::MachineFrameInfo
The MachineFrameInfo class represents an abstract stack frame until prolog/epilog code is inserted.
Definition: MachineFrameInfo.h:106
llvm::FastISel::CallLoweringInfo::Ins
SmallVector< ISD::InputArg, 4 > Ins
Definition: FastISel.h:97
llvm::FastISel::selectGetElementPtr
bool selectGetElementPtr(const User *I)
Definition: FastISel.cpp:537
llvm::FastISel::setLastLocalValue
void setLastLocalValue(MachineInstr *I)
Update the position of the last instruction emitted for materializing constants for use in the curren...
Definition: FastISel.h:238
llvm::FastISel::UseInstrRefDebugInfo
bool UseInstrRefDebugInfo
Definition: FastISel.h:216
SmallVector.h
MachineInstrBuilder.h
llvm::FastISel::MF
MachineFunction * MF
Definition: FastISel.h:204
llvm::FastISel::fastEmitInst_rrr
Register fastEmitInst_rrr(unsigned MachineInstOpcode, const TargetRegisterClass *RC, unsigned Op0, unsigned Op1, unsigned Op2)
Emit a MachineInstr with three register operands and a result register in the given register class.
Definition: FastISel.cpp:1968
llvm::FastISel::removeDeadCode
void removeDeadCode(MachineBasicBlock::iterator I, MachineBasicBlock::iterator E)
Remove all dead instructions between the I and E.
Definition: FastISel.cpp:415
llvm::FastISel::CallLoweringInfo::IsPatchPoint
bool IsPatchPoint
Definition: FastISel.h:78
llvm::FastISel::CallLoweringInfo::setTailCall
CallLoweringInfo & setTailCall(bool Value=true)
Definition: FastISel.h:177
llvm::SmallVectorImpl
This class consists of common code factored out of the SmallVector class to reduce code duplication b...
Definition: APFloat.h:42
llvm::CallBase
Base class for all callable instructions (InvokeInst and CallInst) Holds everything related to callin...
Definition: InstrTypes.h:1174
DerivedTypes.h
llvm::FastISel::CallLoweringInfo::DoesNotReturn
bool DoesNotReturn
Definition: FastISel.h:76
llvm::CallInst
This class represents a function call, abstracting a target machine's calling convention.
Definition: Instructions.h:1473
llvm::FastISel::TRI
const TargetRegisterInfo & TRI
Definition: FastISel.h:213
llvm::FastISel::selectCall
bool selectCall(const User *I)
Definition: FastISel.cpp:1155
GEP
Hexagon Common GEP
Definition: HexagonCommonGEP.cpp:171
llvm::DebugLoc
A debug info location.
Definition: DebugLoc.h:33
llvm::AllocaInst
an instruction to allocate memory on the stack
Definition: Instructions.h:58
llvm::FastISel::optimizeCmpPredicate
CmpInst::Predicate optimizeCmpPredicate(const CmpInst *CI) const
Definition: FastISel.cpp:2314
llvm::FastISel::CallLoweringInfo::setCallee
CallLoweringInfo & setCallee(Type *ResultTy, FunctionType *FuncTy, const Value *Target, ArgListTy &&ArgsList, const CallBase &Call)
Definition: FastISel.h:104
llvm::FastISel::selectBitCast
bool selectBitCast(const User *I)
Definition: FastISel.cpp:1407
llvm::FastISel::TII
const TargetInstrInfo & TII
Definition: FastISel.h:211
llvm::FastISel::fastEmitInst_extractsubreg
Register fastEmitInst_extractsubreg(MVT RetVT, unsigned Op0, uint32_t Idx)
Emit a MachineInstr for an extract_subreg from a specified index of a superregister to a specified ty...
Definition: FastISel.cpp:2100
llvm::FastISel::fastMaterializeFloatZero
virtual unsigned fastMaterializeFloatZero(const ConstantFP *CF)
Emit the floating-point constant +0.0 in a register using target- specific logic.
Definition: FastISel.h:483
llvm::FastISel::EmitStartPt
MachineInstr * EmitStartPt
The top most instruction in the current block that is allowed for emitting local variables.
Definition: FastISel.h:227
llvm::FastISel::lookUpRegForValue
Register lookUpRegForValue(const Value *V)
Look up the value to see if its value is already cached in a register.
Definition: FastISel.cpp:351
llvm::FastISel::finishCondBranch
void finishCondBranch(const BasicBlock *BranchBB, MachineBasicBlock *TrueMBB, MachineBasicBlock *FalseMBB)
Emit an unconditional branch to FalseMBB, obtains the branch weight and adds TrueMBB and FalseMBB to ...
Definition: FastISel.cpp:1580
llvm::MachineInstrBundleIterator< MachineInstr >
llvm::FastISel::fastEmitInst_rr
Register fastEmitInst_rr(unsigned MachineInstOpcode, const TargetRegisterClass *RC, unsigned Op0, unsigned Op1)
Emit a MachineInstr with two register operands and a result register in the given register class.
Definition: FastISel.cpp:1945
llvm::Value
LLVM Value Representation.
Definition: Value.h:74
llvm::FastISel::DL
const DataLayout & DL
Definition: FastISel.h:210
llvm::FastISel::selectBinaryOp
bool selectBinaryOp(const User *I, unsigned ISDOpcode)
Select and emit code for a binary operator instruction, which has an opcode which directly correspond...
Definition: FastISel.cpp:449
llvm::FastISel::MIMD
MIMetadata MIMD
Definition: FastISel.h:208
llvm::FastISel::recomputeInsertPt
void recomputeInsertPt()
Reset InsertPt to prepare for inserting instructions into the current block.
Definition: FastISel.cpp:401
llvm::FastISel::startNewBlock
void startNewBlock()
Set the current block to which generated machine instructions will be appended.
Definition: FastISel.cpp:123
llvm::FastISel::TM
const TargetMachine & TM
Definition: FastISel.h:209
llvm::ISD::MCSymbol
@ MCSymbol
Definition: ISDOpcodes.h:172
llvm::FastISel::constrainOperandRegClass
Register constrainOperandRegClass(const MCInstrDesc &II, Register Op, unsigned OpNum)
Try to constrain Op so that it is usable by argument OpNum of the provided MCInstrDesc.
Definition: FastISel.cpp:1899
llvm::FastISel::fastEmitInst_r
Register fastEmitInst_r(unsigned MachineInstOpcode, const TargetRegisterClass *RC, unsigned Op0)
Emit a MachineInstr with one register operand and a result register in the given register class.
Definition: FastISel.cpp:1925
llvm::FastISel::fastEmitInst_i
Register fastEmitInst_i(unsigned MachineInstOpcode, const TargetRegisterClass *RC, uint64_t Imm)
Emit a MachineInstr with a single immediate operand, and a result register in the given register clas...
Definition: FastISel.cpp:2084
llvm::FunctionType
Class to represent function types.
Definition: DerivedTypes.h:103