LLVM  14.0.0git
AArch64RegisterBankInfo.h
Go to the documentation of this file.
1 //===- AArch64RegisterBankInfo -----------------------------------*- C++ -*-==//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 /// \file
9 /// This file declares the targeting of the RegisterBankInfo class for AArch64.
10 /// \todo This should be generated by TableGen.
11 //===----------------------------------------------------------------------===//
12 
13 #ifndef LLVM_LIB_TARGET_AARCH64_AARCH64REGISTERBANKINFO_H
14 #define LLVM_LIB_TARGET_AARCH64_AARCH64REGISTERBANKINFO_H
15 
17 
18 #define GET_REGBANK_DECLARATIONS
19 #include "AArch64GenRegisterBank.inc"
20 
21 namespace llvm {
22 
23 class TargetRegisterInfo;
24 
26 protected:
28  PMI_None = -1,
29  PMI_FPR16 = 1,
43  };
44 
48 
61  Shift64Imm = 52,
62  };
63 
64  static bool checkPartialMap(unsigned Idx, unsigned ValStartIdx,
65  unsigned ValLength, const RegisterBank &RB);
66  static bool checkValueMapImpl(unsigned Idx, unsigned FirstInBank,
67  unsigned Size, unsigned Offset);
68  static bool checkPartialMappingIdx(PartialMappingIdx FirstAlias,
69  PartialMappingIdx LastAlias,
71 
72  static unsigned getRegBankBaseIdxOffset(unsigned RBIdx, unsigned Size);
73 
74  /// Get the pointer to the ValueMapping representing the RegisterBank
75  /// at \p RBIdx with a size of \p Size.
76  ///
77  /// The returned mapping works for instructions with the same kind of
78  /// operands for up to 3 operands.
79  ///
80  /// \pre \p RBIdx != PartialMappingIdx::None
81  static const RegisterBankInfo::ValueMapping *
82  getValueMapping(PartialMappingIdx RBIdx, unsigned Size);
83 
84  /// Get the pointer to the ValueMapping of the operands of a copy
85  /// instruction from the \p SrcBankID register bank to the \p DstBankID
86  /// register bank with a size of \p Size.
87  static const RegisterBankInfo::ValueMapping *
88  getCopyMapping(unsigned DstBankID, unsigned SrcBankID, unsigned Size);
89 
90  /// Get the instruction mapping for G_FPEXT.
91  ///
92  /// \pre (DstSize, SrcSize) pair is one of the following:
93  /// (32, 16), (64, 16), (64, 32), (128, 64)
94  ///
95  /// \return An InstructionMapping with statically allocated OperandsMapping.
96  static const RegisterBankInfo::ValueMapping *
97  getFPExtMapping(unsigned DstSize, unsigned SrcSize);
98 
99 #define GET_TARGET_REGBANK_CLASS
100 #include "AArch64GenRegisterBank.inc"
101 };
102 
103 /// This class provides the information for the target register banks.
105  /// See RegisterBankInfo::applyMapping.
106  void applyMappingImpl(const OperandsMapper &OpdMapper) const override;
107 
108  /// Get an instruction mapping where all the operands map to
109  /// the same register bank and have similar size.
110  ///
111  /// \pre MI.getNumOperands() <= 3
112  ///
113  /// \return An InstructionMappings with a statically allocated
114  /// OperandsMapping.
115  const InstructionMapping &
116  getSameKindOfOperandsMapping(const MachineInstr &MI) const;
117 
118  /// Maximum recursion depth for hasFPConstraints.
119  const unsigned MaxFPRSearchDepth = 2;
120 
121  /// \returns true if \p MI only uses and defines FPRs.
122  bool hasFPConstraints(const MachineInstr &MI, const MachineRegisterInfo &MRI,
123  const TargetRegisterInfo &TRI, unsigned Depth = 0) const;
124 
125  /// \returns true if \p MI only uses FPRs.
126  bool onlyUsesFP(const MachineInstr &MI, const MachineRegisterInfo &MRI,
127  const TargetRegisterInfo &TRI, unsigned Depth = 0) const;
128 
129  /// \returns true if \p MI only defines FPRs.
130  bool onlyDefinesFP(const MachineInstr &MI, const MachineRegisterInfo &MRI,
131  const TargetRegisterInfo &TRI, unsigned Depth = 0) const;
132 
133 public:
135 
136  unsigned copyCost(const RegisterBank &A, const RegisterBank &B,
137  unsigned Size) const override;
138 
140  LLT) const override;
141 
143  getInstrAlternativeMappings(const MachineInstr &MI) const override;
144 
145  const InstructionMapping &
146  getInstrMapping(const MachineInstr &MI) const override;
147 };
148 } // End llvm namespace.
149 #endif
llvm::Check::Size
@ Size
Definition: FileCheck.h:73
llvm::AArch64RegisterBankInfo
This class provides the information for the target register banks.
Definition: AArch64RegisterBankInfo.h:104
llvm::AArch64GenRegisterBankInfo::getFPExtMapping
static const RegisterBankInfo::ValueMapping * getFPExtMapping(unsigned DstSize, unsigned SrcSize)
Get the instruction mapping for G_FPEXT.
MI
IRTranslator LLVM IR MI
Definition: IRTranslator.cpp:105
llvm
This is an optimization pass for GlobalISel generic memory operations.
Definition: AllocatorList.h:23
llvm::AArch64GenRegisterBankInfo::FPExt16To64Idx
@ FPExt16To64Idx
Definition: AArch64RegisterBankInfo.h:58
llvm::MachineRegisterInfo
MachineRegisterInfo - Keep track of information for virtual and physical registers,...
Definition: MachineRegisterInfo.h:52
llvm::SmallVector
This is a 'vector' (really, a variable-sized array), optimized for the case when the array is small.
Definition: SmallVector.h:1168
llvm::AArch64GenRegisterBankInfo::DistanceBetweenCrossRegCpy
@ DistanceBetweenCrossRegCpy
Definition: AArch64RegisterBankInfo.h:56
RegisterBankInfo.h
llvm::TargetRegisterInfo
TargetRegisterInfo base class - We assume that the target defines a static array of TargetRegisterDes...
Definition: TargetRegisterInfo.h:233
llvm::Depth
@ Depth
Definition: SIMachineScheduler.h:36
llvm::AArch64GenRegisterBankInfo::First3OpsIdx
@ First3OpsIdx
Definition: AArch64RegisterBankInfo.h:51
Offset
uint64_t Offset
Definition: ELFObjHandler.cpp:81
llvm::AArch64GenRegisterBankInfo::ValueMappingIdx
ValueMappingIdx
Definition: AArch64RegisterBankInfo.h:49
llvm::AArch64GenRegisterBankInfo::PMI_GPR64
@ PMI_GPR64
Definition: AArch64RegisterBankInfo.h:36
TRI
unsigned const TargetRegisterInfo * TRI
Definition: MachineSink.cpp:1559
llvm::AArch64GenRegisterBankInfo::BankIDToCopyMapIdx
static PartialMappingIdx BankIDToCopyMapIdx[]
Definition: AArch64RegisterBankInfo.h:47
llvm::AArch64GenRegisterBankInfo::PMI_LastGPR
@ PMI_LastGPR
Definition: AArch64RegisterBankInfo.h:39
llvm::AArch64RegisterBankInfo::copyCost
unsigned copyCost(const RegisterBank &A, const RegisterBank &B, unsigned Size) const override
Get the cost of a copy from B to A, or put differently, get the cost of A = COPY B.
Definition: AArch64RegisterBankInfo.cpp:216
llvm::AArch64GenRegisterBankInfo::PMI_FirstGPR
@ PMI_FirstGPR
Definition: AArch64RegisterBankInfo.h:38
llvm::RegisterBank
This class implements the register bank concept.
Definition: RegisterBank.h:28
llvm::AArch64GenRegisterBankInfo::PMI_FPR512
@ PMI_FPR512
Definition: AArch64RegisterBankInfo.h:34
llvm::AArch64GenRegisterBankInfo::Last3OpsIdx
@ Last3OpsIdx
Definition: AArch64RegisterBankInfo.h:52
llvm::RegisterBankInfo::PartialMapping
Helper struct that represents how a value is partially mapped into a register.
Definition: RegisterBankInfo.h:48
llvm::TargetRegisterClass
Definition: TargetRegisterInfo.h:46
llvm::AArch64GenRegisterBankInfo::PMI_FPR32
@ PMI_FPR32
Definition: AArch64RegisterBankInfo.h:30
llvm::AArch64GenRegisterBankInfo::Shift64Imm
@ Shift64Imm
Definition: AArch64RegisterBankInfo.h:61
B
static GCRegistry::Add< OcamlGC > B("ocaml", "ocaml 3.10-compatible GC")
llvm::AArch64GenRegisterBankInfo::PMI_Min
@ PMI_Min
Definition: AArch64RegisterBankInfo.h:42
llvm::AArch64GenRegisterBankInfo::checkPartialMappingIdx
static bool checkPartialMappingIdx(PartialMappingIdx FirstAlias, PartialMappingIdx LastAlias, ArrayRef< PartialMappingIdx > Order)
llvm::AArch64RegisterBankInfo::getInstrAlternativeMappings
InstructionMappings getInstrAlternativeMappings(const MachineInstr &MI) const override
Get the alternative mappings for MI.
Definition: AArch64RegisterBankInfo.cpp:287
llvm::AArch64GenRegisterBankInfo::PMI_None
@ PMI_None
Definition: AArch64RegisterBankInfo.h:28
llvm::AArch64GenRegisterBankInfo::FPExt16To32Idx
@ FPExt16To32Idx
Definition: AArch64RegisterBankInfo.h:57
llvm::AArch64GenRegisterBankInfo::InvalidIdx
@ InvalidIdx
Definition: AArch64RegisterBankInfo.h:50
llvm::AArch64GenRegisterBankInfo::PartMappings
static RegisterBankInfo::PartialMapping PartMappings[]
Definition: AArch64RegisterBankInfo.h:45
llvm::RegisterBankInfo::OperandsMapper
Helper class used to get/create the virtual registers that will be used to replace the MachineOperand...
Definition: RegisterBankInfo.h:280
llvm::RegisterBankInfo
Holds all the information related to register banks.
Definition: RegisterBankInfo.h:39
llvm::AArch64GenRegisterBankInfo::PartialMappingIdx
PartialMappingIdx
Definition: AArch64RegisterBankInfo.h:27
llvm::AArch64GenRegisterBankInfo::FPExt32To64Idx
@ FPExt32To64Idx
Definition: AArch64RegisterBankInfo.h:59
llvm::MachineInstr
Representation of each machine instruction.
Definition: MachineInstr.h:64
llvm::RegisterBankInfo::InstructionMapping
Helper class that represents how the value of an instruction may be mapped and what is the related co...
Definition: RegisterBankInfo.h:189
llvm::AArch64GenRegisterBankInfo::checkValueMapImpl
static bool checkValueMapImpl(unsigned Idx, unsigned FirstInBank, unsigned Size, unsigned Offset)
llvm::AArch64GenRegisterBankInfo::getValueMapping
static const RegisterBankInfo::ValueMapping * getValueMapping(PartialMappingIdx RBIdx, unsigned Size)
Get the pointer to the ValueMapping representing the RegisterBank at RBIdx with a size of Size.
llvm::AArch64GenRegisterBankInfo::PMI_FPR64
@ PMI_FPR64
Definition: AArch64RegisterBankInfo.h:31
llvm::AArch64GenRegisterBankInfo::PMI_GPR32
@ PMI_GPR32
Definition: AArch64RegisterBankInfo.h:35
llvm::AArch64GenRegisterBankInfo::FPExt64To128Idx
@ FPExt64To128Idx
Definition: AArch64RegisterBankInfo.h:60
llvm::AArch64GenRegisterBankInfo::PMI_GPR128
@ PMI_GPR128
Definition: AArch64RegisterBankInfo.h:37
llvm::RegisterBankInfo::ValueMapping
Helper struct that represents how a value is mapped through different register banks.
Definition: RegisterBankInfo.h:145
llvm::ArrayRef
ArrayRef - Represent a constant reference to an array (0 or more elements consecutively in memory),...
Definition: APInt.h:32
llvm::AArch64RegisterBankInfo::getRegBankFromRegClass
const RegisterBank & getRegBankFromRegClass(const TargetRegisterClass &RC, LLT) const override
Get a register bank that covers RC.
Definition: AArch64RegisterBankInfo.cpp:238
llvm::AArch64GenRegisterBankInfo::PMI_FPR256
@ PMI_FPR256
Definition: AArch64RegisterBankInfo.h:33
llvm::AArch64RegisterBankInfo::getInstrMapping
const InstructionMapping & getInstrMapping(const MachineInstr &MI) const override
Get the mapping of the different operands of MI on the register bank.
Definition: AArch64RegisterBankInfo.cpp:567
MRI
unsigned const MachineRegisterInfo * MRI
Definition: AArch64AdvSIMDScalarPass.cpp:105
llvm::AArch64GenRegisterBankInfo::getCopyMapping
static const RegisterBankInfo::ValueMapping * getCopyMapping(unsigned DstBankID, unsigned SrcBankID, unsigned Size)
Get the pointer to the ValueMapping of the operands of a copy instruction from the SrcBankID register...
llvm::AArch64GenRegisterBankInfo::PMI_FPR16
@ PMI_FPR16
Definition: AArch64RegisterBankInfo.h:29
llvm::AArch64GenRegisterBankInfo::ValMappings
static RegisterBankInfo::ValueMapping ValMappings[]
Definition: AArch64RegisterBankInfo.h:46
llvm::AArch64GenRegisterBankInfo::DistanceBetweenRegBanks
@ DistanceBetweenRegBanks
Definition: AArch64RegisterBankInfo.h:53
llvm::AArch64GenRegisterBankInfo::PMI_FirstFPR
@ PMI_FirstFPR
Definition: AArch64RegisterBankInfo.h:40
llvm::AArch64GenRegisterBankInfo
Definition: AArch64RegisterBankInfo.h:25
llvm::AArch64GenRegisterBankInfo::getRegBankBaseIdxOffset
static unsigned getRegBankBaseIdxOffset(unsigned RBIdx, unsigned Size)
llvm::AArch64GenRegisterBankInfo::FirstCrossRegCpyIdx
@ FirstCrossRegCpyIdx
Definition: AArch64RegisterBankInfo.h:54
llvm::AArch64GenRegisterBankInfo::PMI_FPR128
@ PMI_FPR128
Definition: AArch64RegisterBankInfo.h:32
llvm::AArch64GenRegisterBankInfo::LastCrossRegCpyIdx
@ LastCrossRegCpyIdx
Definition: AArch64RegisterBankInfo.h:55
llvm::AArch64GenRegisterBankInfo::checkPartialMap
static bool checkPartialMap(unsigned Idx, unsigned ValStartIdx, unsigned ValLength, const RegisterBank &RB)
llvm::AArch64GenRegisterBankInfo::PMI_LastFPR
@ PMI_LastFPR
Definition: AArch64RegisterBankInfo.h:41
llvm::AArch64RegisterBankInfo::AArch64RegisterBankInfo
AArch64RegisterBankInfo(const TargetRegisterInfo &TRI)
Definition: AArch64RegisterBankInfo.cpp:45
llvm::LLT
Definition: LowLevelTypeImpl.h:40