| AddNoCarryInsts | llvm::GCNSubtarget | protected |
| AddressableLocalMemorySize | llvm::AMDGPUSubtarget | protected |
| adjustSchedDependency(SUnit *Def, int DefOpIdx, SUnit *Use, int UseOpIdx, SDep &Dep, const TargetSchedModel *SchedModel) const override | llvm::GCNSubtarget | |
| AMDGPUSubtarget(Triple TT) | llvm::AMDGPUSubtarget | |
| AutoWaitcntBeforeBarrier | llvm::GCNSubtarget | protected |
| BackOffBarrier | llvm::GCNSubtarget | protected |
| checkSubtargetFeatures(const Function &F) const | llvm::GCNSubtarget | |
| CIInsts | llvm::GCNSubtarget | protected |
| computeOccupancy(const Function &F, unsigned LDSSize=0, unsigned NumSGPRs=0, unsigned NumVGPRs=0) const | llvm::GCNSubtarget | |
| createFillMFMAShadowMutation(const TargetInstrInfo *TII) const | llvm::GCNSubtarget | |
| d16PreservesUnusedBits() const | llvm::GCNSubtarget | inline |
| dumpCode() const | llvm::GCNSubtarget | inline |
| DumpCode | llvm::GCNSubtarget | protected |
| EnableCuMode | llvm::GCNSubtarget | protected |
| EnableDS128 | llvm::GCNSubtarget | protected |
| enableEarlyIfConversion() const override | llvm::GCNSubtarget | inline |
| EnableFlatScratch | llvm::GCNSubtarget | protected |
| enableFlatScratch() const | llvm::GCNSubtarget | inline |
| EnableLoadStoreOpt | llvm::GCNSubtarget | protected |
| enableMachineScheduler() const override | llvm::GCNSubtarget | inline |
| EnablePreciseMemory | llvm::GCNSubtarget | protected |
| EnablePromoteAlloca | llvm::AMDGPUSubtarget | protected |
| EnablePRTStrictNull | llvm::GCNSubtarget | protected |
| EnableRealTrue16Insts | llvm::AMDGPUSubtarget | protected |
| enableSIScheduler() const | llvm::GCNSubtarget | inline |
| EnableSIScheduler | llvm::GCNSubtarget | protected |
| EnableSRAMECC | llvm::GCNSubtarget | protected |
| enableSubRegLiveness() const override | llvm::GCNSubtarget | inline |
| EnableTgSplit | llvm::GCNSubtarget | protected |
| EnableUnsafeDSOffsetFolding | llvm::GCNSubtarget | protected |
| EnableXNACK | llvm::GCNSubtarget | protected |
| EUsPerCU | llvm::AMDGPUSubtarget | protected |
| EVERGREEN enum value | llvm::AMDGPUSubtarget | |
| FastDenormalF32 | llvm::GCNSubtarget | protected |
| FastFMAF32 | llvm::AMDGPUSubtarget | protected |
| FeatureDisable | llvm::GCNSubtarget | protected |
| FlatAddressSpace | llvm::GCNSubtarget | protected |
| FlatForGlobal | llvm::GCNSubtarget | protected |
| FlatGlobalInsts | llvm::GCNSubtarget | protected |
| FlatInstOffsets | llvm::GCNSubtarget | protected |
| FlatScratchInsts | llvm::GCNSubtarget | protected |
| flatScratchIsArchitected() const | llvm::GCNSubtarget | inline |
| flatScratchIsPointer() const | llvm::GCNSubtarget | inline |
| FMA | llvm::GCNSubtarget | protected |
| FP64 | llvm::GCNSubtarget | protected |
| FullRate64Ops | llvm::GCNSubtarget | protected |
| GCN3Encoding | llvm::AMDGPUSubtarget | protected |
| GCNSubtarget(const Triple &TT, StringRef GPU, StringRef FS, const GCNTargetMachine &TM) | llvm::GCNSubtarget | |
| Gen | llvm::GCNSubtarget | protected |
| Generation enum name | llvm::AMDGPUSubtarget | |
| get(const MachineFunction &MF) | llvm::AMDGPUSubtarget | static |
| get(const TargetMachine &TM, const Function &F) | llvm::AMDGPUSubtarget | static |
| getAddressableLocalMemorySize() const | llvm::AMDGPUSubtarget | inline |
| getAddressableNumArchVGPRs() const | llvm::GCNSubtarget | inline |
| getAddressableNumSGPRs() const | llvm::GCNSubtarget | inline |
| getAddressableNumVGPRs() const | llvm::GCNSubtarget | inline |
| getAlignmentForImplicitArgPtr() const | llvm::AMDGPUSubtarget | inline |
| getAMDGPUDwarfFlavour() const | llvm::AMDGPUSubtarget | |
| getBaseMaxNumSGPRs(const Function &F, std::pair< unsigned, unsigned > WavesPerEU, unsigned PreloadedSGPRs, unsigned ReservedNumSGPRs) const | llvm::GCNSubtarget | |
| getBaseMaxNumVGPRs(const Function &F, std::pair< unsigned, unsigned > WavesPerEU) const | llvm::GCNSubtarget | |
| getBaseReservedNumSGPRs(const bool HasFlatScratch) const | llvm::GCNSubtarget | |
| getBoolRC() const | llvm::GCNSubtarget | inline |
| getCallLowering() const override | llvm::GCNSubtarget | inline |
| getConstantBusLimit(unsigned Opcode) const | llvm::GCNSubtarget | |
| getDefaultFlatWorkGroupSize(CallingConv::ID CC) const | llvm::AMDGPUSubtarget | |
| getEffectiveWavesPerEU(std::pair< unsigned, unsigned > WavesPerEU, std::pair< unsigned, unsigned > FlatWorkGroupSizes) const | llvm::AMDGPUSubtarget | |
| getEUsPerCU() const | llvm::AMDGPUSubtarget | inline |
| getExplicitKernArgSize(const Function &F, Align &MaxAlign) const | llvm::AMDGPUSubtarget | |
| getExplicitKernelArgOffset() const | llvm::AMDGPUSubtarget | inline |
| getFlatWorkGroupSizes(const Function &F) const | llvm::AMDGPUSubtarget | |
| getFrameLowering() const override | llvm::GCNSubtarget | inline |
| getGeneration() const | llvm::GCNSubtarget | inline |
| getImplicitArgNumBytes(const Function &F) const | llvm::AMDGPUSubtarget | |
| getInlineAsmLowering() const override | llvm::GCNSubtarget | inline |
| getInstrInfo() const override | llvm::GCNSubtarget | inline |
| getInstrItineraryData() const override | llvm::GCNSubtarget | inline |
| getInstructionSelector() const override | llvm::GCNSubtarget | inline |
| getKernArgSegmentSize(const Function &F, Align &MaxAlign) const | llvm::AMDGPUSubtarget | |
| getKnownHighZeroBitsForFrameIndex() const | llvm::GCNSubtarget | inline |
| getLDSBankCount() const | llvm::GCNSubtarget | inline |
| getLegalizerInfo() const override | llvm::GCNSubtarget | inline |
| getLocalMemorySize() const | llvm::AMDGPUSubtarget | inline |
| getMaxFlatWorkGroupSize() const override | llvm::GCNSubtarget | inlinevirtual |
| getMaxLocalMemSizeWithWaveCount(unsigned WaveCount, const Function &) const | llvm::GCNSubtarget | |
| getMaxNumAGPRs(const Function &F) const | llvm::GCNSubtarget | inline |
| getMaxNumSGPRs(unsigned WavesPerEU, bool Addressable) const | llvm::GCNSubtarget | inline |
| getMaxNumSGPRs(const MachineFunction &MF) const | llvm::GCNSubtarget | |
| getMaxNumSGPRs(const Function &F) const | llvm::GCNSubtarget | |
| getMaxNumUserSGPRs() const | llvm::GCNSubtarget | inline |
| getMaxNumVGPRs(unsigned WavesPerEU) const | llvm::GCNSubtarget | inline |
| getMaxNumVGPRs(const Function &F) const | llvm::GCNSubtarget | |
| getMaxNumVGPRs(const MachineFunction &MF) const | llvm::GCNSubtarget | |
| getMaxNumWorkGroups(const Function &F) const | llvm::AMDGPUSubtarget | |
| getMaxPrivateElementSize(bool ForBufferRSrc=false) const | llvm::GCNSubtarget | inline |
| getMaxWaveScratchSize() const | llvm::GCNSubtarget | inline |
| getMaxWavesPerEU() const | llvm::GCNSubtarget | inline |
| getMaxWorkGroupsPerCU(unsigned FlatWorkGroupSize) const override | llvm::GCNSubtarget | inlinevirtual |
| getMaxWorkitemID(const Function &Kernel, unsigned Dimension) const | llvm::AMDGPUSubtarget | |
| getMinFlatWorkGroupSize() const override | llvm::GCNSubtarget | inlinevirtual |
| getMinNumSGPRs(unsigned WavesPerEU) const | llvm::GCNSubtarget | inline |
| getMinNumVGPRs(unsigned WavesPerEU) const | llvm::GCNSubtarget | inline |
| getMinWavesPerEU() const override | llvm::GCNSubtarget | inlinevirtual |
| getNSAMaxSize(bool HasSampler=false) const | llvm::GCNSubtarget | inline |
| getNSAThreshold(const MachineFunction &MF) const | llvm::GCNSubtarget | |
| getOccupancyWithLocalMemSize(uint32_t Bytes, const Function &) const | llvm::AMDGPUSubtarget | |
| getOccupancyWithLocalMemSize(const MachineFunction &MF) const | llvm::AMDGPUSubtarget | |
| getOccupancyWithNumSGPRs(unsigned SGPRs) const | llvm::GCNSubtarget | |
| getOccupancyWithNumVGPRs(unsigned VGPRs) const | llvm::GCNSubtarget | |
| getPostRAMutations(std::vector< std::unique_ptr< ScheduleDAGMutation > > &Mutations) const override | llvm::GCNSubtarget | |
| getRegBankInfo() const override | llvm::GCNSubtarget | inline |
| getRegisterInfo() const override | llvm::GCNSubtarget | inline |
| getReservedNumSGPRs(const MachineFunction &MF) const | llvm::GCNSubtarget | |
| getReservedNumSGPRs(const Function &F) const | llvm::GCNSubtarget | |
| getScalarizeGlobalBehavior() const | llvm::GCNSubtarget | inline |
| getSelectionDAGInfo() const override | llvm::GCNSubtarget | |
| getSetRegWaitStates() const | llvm::GCNSubtarget | inline |
| getSGPRAllocGranule() const | llvm::GCNSubtarget | inline |
| getSGPREncodingGranule() const | llvm::GCNSubtarget | inline |
| getStackAlignment() const | llvm::GCNSubtarget | inline |
| getTargetID() const | llvm::GCNSubtarget | inline |
| getTargetLowering() const override | llvm::GCNSubtarget | inline |
| getTotalNumSGPRs() const | llvm::GCNSubtarget | inline |
| getTotalNumVGPRs() const | llvm::GCNSubtarget | inline |
| getTrapHandlerAbi() const | llvm::GCNSubtarget | inline |
| getVGPRAllocGranule() const | llvm::GCNSubtarget | inline |
| getVGPREncodingGranule() const | llvm::GCNSubtarget | inline |
| getWavefrontSize() const | llvm::AMDGPUSubtarget | inline |
| getWavefrontSizeLog2() const | llvm::AMDGPUSubtarget | inline |
| getWavesPerEU(const Function &F) const | llvm::AMDGPUSubtarget | inline |
| getWavesPerEU(const Function &F, std::pair< unsigned, unsigned > FlatWorkGroupSizes) const | llvm::AMDGPUSubtarget | |
| getWavesPerEUForWorkGroup(unsigned FlatWorkGroupSize) const override | llvm::GCNSubtarget | inlinevirtual |
| GFX10 enum value | llvm::AMDGPUSubtarget | |
| GFX10_3Insts | llvm::GCNSubtarget | protected |
| GFX10_AEncoding | llvm::GCNSubtarget | protected |
| GFX10_BEncoding | llvm::GCNSubtarget | protected |
| GFX10Insts | llvm::GCNSubtarget | protected |
| GFX11 enum value | llvm::AMDGPUSubtarget | |
| GFX11Insts | llvm::GCNSubtarget | protected |
| GFX12 enum value | llvm::AMDGPUSubtarget | |
| GFX12Insts | llvm::GCNSubtarget | protected |
| GFX7GFX8GFX9Insts | llvm::GCNSubtarget | protected |
| GFX8Insts | llvm::GCNSubtarget | protected |
| GFX9 enum value | llvm::AMDGPUSubtarget | |
| GFX90AInsts | llvm::GCNSubtarget | protected |
| GFX940Insts | llvm::GCNSubtarget | protected |
| GFX950Insts | llvm::GCNSubtarget | protected |
| GFX9Insts | llvm::GCNSubtarget | protected |
| HalfRate64Ops | llvm::GCNSubtarget | protected |
| has12DWordStoreHazard() const | llvm::GCNSubtarget | inline |
| has16BitInsts() const | llvm::AMDGPUSubtarget | inline |
| Has16BitInsts | llvm::AMDGPUSubtarget | protected |
| Has1_5xVGPRs | llvm::GCNSubtarget | protected |
| has1_5xVGPRs() const | llvm::GCNSubtarget | inline |
| HasA16 | llvm::GCNSubtarget | protected |
| hasA16() const | llvm::GCNSubtarget | inline |
| hasAddNoCarry() const | llvm::GCNSubtarget | inline |
| hasAddr64() const | llvm::GCNSubtarget | inline |
| HasAgentScopeFineGrainedRemoteMemoryAtomics | llvm::GCNSubtarget | protected |
| hasApertureRegs() const | llvm::GCNSubtarget | inline |
| HasApertureRegs | llvm::GCNSubtarget | protected |
| HasArchitectedFlatScratch | llvm::GCNSubtarget | protected |
| HasArchitectedSGPRs | llvm::GCNSubtarget | protected |
| hasArchitectedSGPRs() const | llvm::GCNSubtarget | inline |
| hasAshrPkInsts() const | llvm::GCNSubtarget | inline |
| HasAshrPkInsts | llvm::GCNSubtarget | protected |
| hasAtomicBufferGlobalPkAddF16Insts() const | llvm::GCNSubtarget | inline |
| HasAtomicBufferGlobalPkAddF16Insts | llvm::GCNSubtarget | protected |
| HasAtomicBufferGlobalPkAddF16NoRtnInsts | llvm::GCNSubtarget | protected |
| hasAtomicBufferGlobalPkAddF16NoRtnInsts() const | llvm::GCNSubtarget | inline |
| HasAtomicBufferPkAddBF16Inst | llvm::GCNSubtarget | protected |
| hasAtomicBufferPkAddBF16Inst() const | llvm::GCNSubtarget | inline |
| hasAtomicCSub() const | llvm::GCNSubtarget | inline |
| HasAtomicCSubNoRtnInsts | llvm::GCNSubtarget | protected |
| hasAtomicCSubNoRtnInsts() const | llvm::GCNSubtarget | inline |
| HasAtomicDsPkAdd16Insts | llvm::GCNSubtarget | protected |
| hasAtomicDsPkAdd16Insts() const | llvm::GCNSubtarget | inline |
| hasAtomicFaddInsts() const | llvm::GCNSubtarget | inline |
| HasAtomicFaddNoRtnInsts | llvm::GCNSubtarget | protected |
| hasAtomicFaddNoRtnInsts() const | llvm::GCNSubtarget | inline |
| hasAtomicFaddRtnInsts() const | llvm::GCNSubtarget | inline |
| HasAtomicFaddRtnInsts | llvm::GCNSubtarget | protected |
| HasAtomicFlatPkAdd16Insts | llvm::GCNSubtarget | protected |
| hasAtomicFlatPkAdd16Insts() const | llvm::GCNSubtarget | inline |
| hasAtomicFMinFMaxF32FlatInsts() const | llvm::GCNSubtarget | inline |
| HasAtomicFMinFMaxF32FlatInsts | llvm::GCNSubtarget | protected |
| HasAtomicFMinFMaxF32GlobalInsts | llvm::GCNSubtarget | protected |
| hasAtomicFMinFMaxF32GlobalInsts() const | llvm::GCNSubtarget | inline |
| hasAtomicFMinFMaxF64FlatInsts() const | llvm::GCNSubtarget | inline |
| HasAtomicFMinFMaxF64FlatInsts | llvm::GCNSubtarget | protected |
| hasAtomicFMinFMaxF64GlobalInsts() const | llvm::GCNSubtarget | inline |
| HasAtomicFMinFMaxF64GlobalInsts | llvm::GCNSubtarget | protected |
| HasAtomicGlobalPkAddBF16Inst | llvm::GCNSubtarget | protected |
| hasAtomicGlobalPkAddBF16Inst() const | llvm::GCNSubtarget | inline |
| hasAutoWaitcntBeforeBarrier() const | llvm::GCNSubtarget | inline |
| hasBCNT(unsigned Size) const | llvm::GCNSubtarget | inline |
| HasBF16ConversionInsts | llvm::AMDGPUSubtarget | protected |
| hasBF16ConversionInsts() const | llvm::AMDGPUSubtarget | inline |
| hasBF8ConversionScaleInsts() const | llvm::AMDGPUSubtarget | inline |
| HasBF8ConversionScaleInsts | llvm::AMDGPUSubtarget | protected |
| hasBFE() const | llvm::GCNSubtarget | inline |
| hasBFI() const | llvm::GCNSubtarget | inline |
| hasBFM() const | llvm::GCNSubtarget | inline |
| hasBitOp3Insts() const | llvm::GCNSubtarget | inline |
| HasBitOp3Insts | llvm::GCNSubtarget | protected |
| hasCARRY() const | llvm::GCNSubtarget | inline |
| hasCompressedExport() const | llvm::GCNSubtarget | inline |
| hasCvtFP8VOP1Bug() const | llvm::GCNSubtarget | inline |
| HasCvtFP8Vop1Bug | llvm::GCNSubtarget | protected |
| HasCvtPkF16F32Inst | llvm::AMDGPUSubtarget | protected |
| hasCvtPkF16F32Inst() const | llvm::AMDGPUSubtarget | inline |
| hasCvtScaleForwardingHazard() const | llvm::GCNSubtarget | inline |
| hasD16Images() const | llvm::GCNSubtarget | inline |
| hasD16LoadStore() const | llvm::GCNSubtarget | inline |
| HasDefaultComponentBroadcast | llvm::GCNSubtarget | protected |
| hasDefaultComponentBroadcast() const | llvm::GCNSubtarget | inline |
| HasDefaultComponentZero | llvm::GCNSubtarget | protected |
| hasDefaultComponentZero() const | llvm::GCNSubtarget | inline |
| hasDelayAlu() const | llvm::GCNSubtarget | inline |
| hasDenormModeInst() const | llvm::GCNSubtarget | inline |
| hasDLInsts() const | llvm::GCNSubtarget | inline |
| HasDLInsts | llvm::GCNSubtarget | protected |
| hasDot10Insts() const | llvm::GCNSubtarget | inline |
| HasDot10Insts | llvm::GCNSubtarget | protected |
| hasDot11Insts() const | llvm::GCNSubtarget | inline |
| HasDot11Insts | llvm::GCNSubtarget | protected |
| hasDot12Insts() const | llvm::GCNSubtarget | inline |
| HasDot12Insts | llvm::GCNSubtarget | protected |
| hasDot13Insts() const | llvm::GCNSubtarget | inline |
| HasDot13Insts | llvm::GCNSubtarget | protected |
| HasDot1Insts | llvm::GCNSubtarget | protected |
| hasDot1Insts() const | llvm::GCNSubtarget | inline |
| HasDot2Insts | llvm::GCNSubtarget | protected |
| hasDot2Insts() const | llvm::GCNSubtarget | inline |
| HasDot3Insts | llvm::GCNSubtarget | protected |
| hasDot3Insts() const | llvm::GCNSubtarget | inline |
| HasDot4Insts | llvm::GCNSubtarget | protected |
| hasDot4Insts() const | llvm::GCNSubtarget | inline |
| hasDot5Insts() const | llvm::GCNSubtarget | inline |
| HasDot5Insts | llvm::GCNSubtarget | protected |
| hasDot6Insts() const | llvm::GCNSubtarget | inline |
| HasDot6Insts | llvm::GCNSubtarget | protected |
| HasDot7Insts | llvm::GCNSubtarget | protected |
| hasDot7Insts() const | llvm::GCNSubtarget | inline |
| HasDot8Insts | llvm::GCNSubtarget | protected |
| hasDot8Insts() const | llvm::GCNSubtarget | inline |
| HasDot9Insts | llvm::GCNSubtarget | protected |
| hasDot9Insts() const | llvm::GCNSubtarget | inline |
| hasDOTOpSelHazard() const | llvm::GCNSubtarget | inline |
| hasDPALU_DPP() const | llvm::GCNSubtarget | inline |
| HasDPALU_DPP | llvm::GCNSubtarget | protected |
| hasDPP() const | llvm::GCNSubtarget | inline |
| HasDPP | llvm::GCNSubtarget | protected |
| HasDPP8 | llvm::GCNSubtarget | protected |
| hasDPP8() const | llvm::GCNSubtarget | inline |
| hasDPPBroadcasts() const | llvm::GCNSubtarget | inline |
| HasDPPSrc1SGPR | llvm::GCNSubtarget | protected |
| hasDPPSrc1SGPR() const | llvm::GCNSubtarget | inline |
| hasDPPWavefrontShifts() const | llvm::GCNSubtarget | inline |
| hasDS96AndDS128() const | llvm::GCNSubtarget | inline |
| HasDsSrc2Insts | llvm::AMDGPUSubtarget | protected |
| hasDsSrc2Insts() const | llvm::AMDGPUSubtarget | inline |
| hasDstSelForwardingHazard() const | llvm::GCNSubtarget | inline |
| hasDwordx3LoadStores() const | llvm::GCNSubtarget | inline |
| hasDX10ClampMode() const | llvm::GCNSubtarget | inline |
| hasExportInsts() const | llvm::GCNSubtarget | inline |
| HasExtendedImageInsts | llvm::GCNSubtarget | protected |
| hasExtendedImageInsts() const | llvm::GCNSubtarget | inline |
| hasExtendedWaitCounts() const | llvm::GCNSubtarget | inline |
| HasF16BF16ToFP6BF6ConversionScaleInsts | llvm::AMDGPUSubtarget | protected |
| hasF16BF16ToFP6BF6ConversionScaleInsts() const | llvm::AMDGPUSubtarget | inline |
| HasF32ToF16BF16ConversionSRInsts | llvm::AMDGPUSubtarget | protected |
| hasF32ToF16BF16ConversionSRInsts() const | llvm::AMDGPUSubtarget | inline |
| hasFastFMAF32() const | llvm::AMDGPUSubtarget | inline |
| hasFFBH() const | llvm::GCNSubtarget | inline |
| hasFFBL() const | llvm::GCNSubtarget | inline |
| hasFlat() const | llvm::GCNSubtarget | inline |
| hasFlatAddressSpace() const | llvm::GCNSubtarget | inline |
| HasFlatAtomicFaddF32Inst | llvm::GCNSubtarget | protected |
| hasFlatAtomicFaddF32Inst() const | llvm::GCNSubtarget | inline |
| HasFlatBufferGlobalAtomicFaddF64Inst | llvm::GCNSubtarget | protected |
| hasFlatBufferGlobalAtomicFaddF64Inst() const | llvm::GCNSubtarget | inline |
| hasFlatGlobalInsts() const | llvm::GCNSubtarget | inline |
| hasFlatInstOffsets() const | llvm::GCNSubtarget | inline |
| hasFlatLgkmVMemCountInOrder() const | llvm::GCNSubtarget | inline |
| hasFlatScratchInsts() const | llvm::GCNSubtarget | inline |
| hasFlatScratchSTMode() const | llvm::GCNSubtarget | inline |
| hasFlatScratchSVSMode() const | llvm::GCNSubtarget | inline |
| hasFlatScratchSVSSwizzleBug() const | llvm::GCNSubtarget | inline |
| hasFlatScrRegister() const | llvm::GCNSubtarget | inline |
| HasFlatSegmentOffsetBug | llvm::GCNSubtarget | protected |
| hasFlatSegmentOffsetBug() const | llvm::GCNSubtarget | inline |
| hasFMA() const | llvm::GCNSubtarget | inline |
| hasFmaakFmamkF32Insts() const | llvm::GCNSubtarget | inline |
| HasFmacF64Inst | llvm::GCNSubtarget | protected |
| hasFmacF64Inst() const | llvm::GCNSubtarget | inline |
| hasFmaMixInsts() const | llvm::GCNSubtarget | inline |
| HasFmaMixInsts | llvm::GCNSubtarget | protected |
| hasFminFmaxLegacy() const | llvm::AMDGPUSubtarget | inline |
| HasFminFmaxLegacy | llvm::AMDGPUSubtarget | protected |
| HasForceStoreSC0SC1 | llvm::GCNSubtarget | protected |
| hasForceStoreSC0SC1() const | llvm::GCNSubtarget | inline |
| HasFP4ConversionScaleInsts | llvm::AMDGPUSubtarget | protected |
| hasFP4ConversionScaleInsts() const | llvm::AMDGPUSubtarget | inline |
| hasFP64() const | llvm::GCNSubtarget | inline |
| HasFP6BF6ConversionScaleInsts | llvm::AMDGPUSubtarget | protected |
| hasFP6BF6ConversionScaleInsts() const | llvm::AMDGPUSubtarget | inline |
| HasFP8ConversionInsts | llvm::GCNSubtarget | protected |
| hasFP8ConversionInsts() const | llvm::GCNSubtarget | inline |
| HasFP8ConversionScaleInsts | llvm::AMDGPUSubtarget | protected |
| hasFP8ConversionScaleInsts() const | llvm::AMDGPUSubtarget | inline |
| hasFP8Insts() const | llvm::GCNSubtarget | inline |
| HasFP8Insts | llvm::GCNSubtarget | protected |
| hasFPAtomicToDenormModeHazard() const | llvm::GCNSubtarget | inline |
| hasFractBug() const | llvm::GCNSubtarget | inline |
| hasFullRate64Ops() const | llvm::GCNSubtarget | inline |
| hasG16() const | llvm::GCNSubtarget | inline |
| HasG16 | llvm::GCNSubtarget | protected |
| hasGDS() const | llvm::GCNSubtarget | inline |
| HasGDS | llvm::GCNSubtarget | protected |
| hasGetPCZeroExtension() const | llvm::GCNSubtarget | inline |
| hasGetWaveIdInst() const | llvm::GCNSubtarget | inline |
| HasGetWaveIdInst | llvm::GCNSubtarget | protected |
| hasGFX10_3Insts() const | llvm::GCNSubtarget | inline |
| hasGFX10_AEncoding() const | llvm::GCNSubtarget | inline |
| hasGFX10_BEncoding() const | llvm::GCNSubtarget | inline |
| hasGFX90AInsts() const | llvm::GCNSubtarget | inline |
| hasGFX940Insts() const | llvm::GCNSubtarget | inline |
| hasGFX950Insts() const | llvm::GCNSubtarget | inline |
| hasGlobalAddTidInsts() const | llvm::GCNSubtarget | inline |
| HasGWS | llvm::GCNSubtarget | protected |
| hasGWS() const | llvm::GCNSubtarget | inline |
| hasGWSAutoReplay() const | llvm::GCNSubtarget | inline |
| hasGWSSemaReleaseAll() const | llvm::GCNSubtarget | inline |
| hasHalfRate64Ops() const | llvm::GCNSubtarget | inline |
| hasHalfRate64Ops(const TargetSubtargetInfo &STI) | llvm::GCNSubtarget | static |
| hasHardClauses() const | llvm::GCNSubtarget | inline |
| hasHWFP64() const | llvm::GCNSubtarget | inline |
| hasIEEEMinMax() const | llvm::GCNSubtarget | inline |
| hasIEEEMinMax3() const | llvm::GCNSubtarget | inline |
| hasIEEEMode() const | llvm::GCNSubtarget | inline |
| HasImageGather4D16Bug | llvm::GCNSubtarget | protected |
| hasImageGather4D16Bug() const | llvm::GCNSubtarget | inline |
| hasImageInsts() const | llvm::GCNSubtarget | inline |
| HasImageInsts | llvm::GCNSubtarget | protected |
| HasImageStoreD16Bug | llvm::GCNSubtarget | protected |
| hasImageStoreD16Bug() const | llvm::GCNSubtarget | inline |
| hasInstFwdPrefetchBug() const | llvm::GCNSubtarget | inline |
| HasInstFwdPrefetchBug | llvm::GCNSubtarget | protected |
| hasInstPrefetch() const | llvm::GCNSubtarget | inline |
| hasIntClamp() const | llvm::GCNSubtarget | inline |
| HasIntClamp | llvm::GCNSubtarget | protected |
| HasInv2PiInlineImm | llvm::AMDGPUSubtarget | protected |
| hasInv2PiInlineImm() const | llvm::AMDGPUSubtarget | inline |
| hasKernargPreload() const | llvm::GCNSubtarget | inline |
| hasLdsAtomicAddF64() const | llvm::GCNSubtarget | inline |
| hasLdsBranchVmemWARHazard() const | llvm::GCNSubtarget | inline |
| HasLdsBranchVmemWARHazard | llvm::GCNSubtarget | protected |
| hasLdsDirect() const | llvm::GCNSubtarget | inline |
| hasLDSFPAtomicAddF32() const | llvm::GCNSubtarget | inline |
| hasLDSFPAtomicAddF64() const | llvm::GCNSubtarget | inline |
| hasLDSLoadB96_B128() const | llvm::GCNSubtarget | inline |
| hasLDSMisalignedBug() const | llvm::GCNSubtarget | inline |
| hasLdsWaitVMSRC() const | llvm::GCNSubtarget | inline |
| hasLegacyGeometry() const | llvm::GCNSubtarget | inline |
| hasLshlAddB64() const | llvm::GCNSubtarget | inline |
| hasMad64_32() const | llvm::GCNSubtarget | inline |
| hasMadF16() const | llvm::GCNSubtarget | |
| hasMADIntraFwdBug() const | llvm::GCNSubtarget | inline |
| HasMADIntraFwdBug | llvm::GCNSubtarget | protected |
| hasMadMacF32Insts() const | llvm::AMDGPUSubtarget | inline |
| HasMadMacF32Insts | llvm::AMDGPUSubtarget | protected |
| HasMadMixInsts | llvm::AMDGPUSubtarget | protected |
| hasMadMixInsts() const | llvm::AMDGPUSubtarget | inline |
| HasMAIInsts | llvm::GCNSubtarget | protected |
| hasMAIInsts() const | llvm::GCNSubtarget | inline |
| hasMed3_16() const | llvm::GCNSubtarget | inline |
| HasMemoryAtomicFaddF32DenormalSupport | llvm::GCNSubtarget | protected |
| hasMemoryAtomicFaddF32DenormalSupport() const | llvm::GCNSubtarget | inline |
| hasMergedShaders() const | llvm::GCNSubtarget | inline |
| hasMFMAInlineLiteralBug() const | llvm::GCNSubtarget | inline |
| HasMFMAInlineLiteralBug | llvm::GCNSubtarget | protected |
| hasMIMG_R128() const | llvm::GCNSubtarget | inline |
| hasMin3Max3_16() const | llvm::GCNSubtarget | inline |
| hasMinimum3Maximum3F16() const | llvm::GCNSubtarget | inline |
| HasMinimum3Maximum3F16 | llvm::GCNSubtarget | protected |
| hasMinimum3Maximum3F32() const | llvm::GCNSubtarget | inline |
| HasMinimum3Maximum3F32 | llvm::GCNSubtarget | protected |
| HasMinimum3Maximum3PKF16 | llvm::GCNSubtarget | protected |
| hasMinimum3Maximum3PKF16() const | llvm::GCNSubtarget | inline |
| hasMovB64() const | llvm::GCNSubtarget | inline |
| hasMovrel() const | llvm::GCNSubtarget | inline |
| HasMovrel | llvm::GCNSubtarget | protected |
| HasMSAALoadDstSelBug | llvm::GCNSubtarget | protected |
| hasMSAALoadDstSelBug() const | llvm::GCNSubtarget | inline |
| hasMulI24() const | llvm::AMDGPUSubtarget | inline |
| HasMulI24 | llvm::AMDGPUSubtarget | protected |
| hasMultiDwordFlatScratchAddressing() const | llvm::GCNSubtarget | inline |
| hasMulU24() const | llvm::AMDGPUSubtarget | inline |
| HasMulU24 | llvm::AMDGPUSubtarget | protected |
| hasNegativeScratchOffsetBug() const | llvm::GCNSubtarget | inline |
| hasNegativeUnalignedScratchOffsetBug() const | llvm::GCNSubtarget | inline |
| HasNoDataDepHazard | llvm::GCNSubtarget | protected |
| hasNoDataDepHazard() const | llvm::GCNSubtarget | inline |
| hasNoF16PseudoScalarTransInlineConstants() const | llvm::GCNSubtarget | inline |
| hasNonNSAEncoding() const | llvm::GCNSubtarget | inline |
| HasNoSdstCMPX | llvm::GCNSubtarget | protected |
| hasNoSdstCMPX() const | llvm::GCNSubtarget | inline |
| hasNSAClauseBug() const | llvm::GCNSubtarget | inline |
| HasNSAClauseBug | llvm::GCNSubtarget | protected |
| hasNSAEncoding() const | llvm::GCNSubtarget | inline |
| HasNSAEncoding | llvm::GCNSubtarget | protected |
| hasNSAtoVMEMBug() const | llvm::GCNSubtarget | inline |
| HasNSAtoVMEMBug | llvm::GCNSubtarget | protected |
| hasNullExportTarget() const | llvm::GCNSubtarget | inline |
| hasOffset3fBug() const | llvm::GCNSubtarget | inline |
| HasOffset3fBug | llvm::GCNSubtarget | protected |
| hasOnlyRevVALUShifts() const | llvm::GCNSubtarget | inline |
| HasPackedFP32Ops | llvm::GCNSubtarget | protected |
| hasPackedFP32Ops() const | llvm::GCNSubtarget | inline |
| hasPackedTID() const | llvm::GCNSubtarget | inline |
| HasPackedTID | llvm::GCNSubtarget | protected |
| hasPartialNSAEncoding() const | llvm::GCNSubtarget | inline |
| HasPartialNSAEncoding | llvm::GCNSubtarget | protected |
| hasPermlane16Swap() const | llvm::GCNSubtarget | inline |
| HasPermlane16Swap | llvm::GCNSubtarget | protected |
| hasPermlane32Swap() const | llvm::GCNSubtarget | inline |
| HasPermlane32Swap | llvm::GCNSubtarget | protected |
| hasPermLane64() const | llvm::GCNSubtarget | inline |
| hasPermLaneX16() const | llvm::GCNSubtarget | inline |
| HasPkFmacF16Inst | llvm::GCNSubtarget | protected |
| hasPkFmacF16Inst() const | llvm::GCNSubtarget | inline |
| hasPkMovB32() const | llvm::GCNSubtarget | inline |
| hasPrefetch() const | llvm::GCNSubtarget | inline |
| HasPrivEnabledTrap2NopBug | llvm::GCNSubtarget | protected |
| hasPrivEnabledTrap2NopBug() const | llvm::GCNSubtarget | inline |
| hasPrngInst() const | llvm::GCNSubtarget | inline |
| HasPrngInst | llvm::GCNSubtarget | protected |
| hasPseudoScalarTrans() const | llvm::GCNSubtarget | inline |
| HasPseudoScalarTrans | llvm::GCNSubtarget | protected |
| hasR128A16() const | llvm::GCNSubtarget | inline |
| HasR128A16 | llvm::GCNSubtarget | protected |
| hasReadM0LdsDirectHazard() const | llvm::GCNSubtarget | inline |
| hasReadM0LdsDmaHazard() const | llvm::GCNSubtarget | inline |
| hasReadM0MovRelInterpHazard() const | llvm::GCNSubtarget | inline |
| hasReadM0SendMsgHazard() const | llvm::GCNSubtarget | inline |
| hasReadVCCZBug() const | llvm::GCNSubtarget | inline |
| hasRequiredExportPriority() const | llvm::GCNSubtarget | inline |
| HasRequiredExportPriority | llvm::GCNSubtarget | protected |
| hasRestrictedSOffset() const | llvm::GCNSubtarget | inline |
| HasRestrictedSOffset | llvm::GCNSubtarget | protected |
| hasRFEHazards() const | llvm::GCNSubtarget | inline |
| hasRrWGMode() const | llvm::GCNSubtarget | inline |
| hasSALUFloatInsts() const | llvm::GCNSubtarget | inline |
| HasSALUFloatInsts | llvm::GCNSubtarget | protected |
| hasScalarAddSub64() const | llvm::GCNSubtarget | inline |
| hasScalarAtomics() const | llvm::GCNSubtarget | inline |
| HasScalarAtomics | llvm::GCNSubtarget | protected |
| hasScalarCompareEq64() const | llvm::GCNSubtarget | inline |
| hasScalarDwordx3Loads() const | llvm::GCNSubtarget | inline |
| HasScalarDwordx3Loads | llvm::GCNSubtarget | protected |
| hasScalarFlatScratchInsts() const | llvm::GCNSubtarget | inline |
| hasScalarMulHiInsts() const | llvm::GCNSubtarget | inline |
| hasScalarPackInsts() const | llvm::GCNSubtarget | inline |
| hasScalarSMulU64() const | llvm::GCNSubtarget | inline |
| hasScalarStores() const | llvm::GCNSubtarget | inline |
| HasScalarStores | llvm::GCNSubtarget | protected |
| hasScalarSubwordLoads() const | llvm::GCNSubtarget | inline |
| hasSCmpK() const | llvm::GCNSubtarget | inline |
| HasSDWA | llvm::AMDGPUSubtarget | protected |
| hasSDWA() const | llvm::AMDGPUSubtarget | inline |
| hasSDWAMac() const | llvm::GCNSubtarget | inline |
| HasSDWAMac | llvm::GCNSubtarget | protected |
| HasSDWAOmod | llvm::GCNSubtarget | protected |
| hasSDWAOmod() const | llvm::GCNSubtarget | inline |
| hasSDWAOutModsVOPC() const | llvm::GCNSubtarget | inline |
| HasSDWAOutModsVOPC | llvm::GCNSubtarget | protected |
| HasSDWAScalar | llvm::GCNSubtarget | protected |
| hasSDWAScalar() const | llvm::GCNSubtarget | inline |
| HasSDWASdst | llvm::GCNSubtarget | protected |
| hasSDWASdst() const | llvm::GCNSubtarget | inline |
| hasSGPRInitBug() const | llvm::GCNSubtarget | inline |
| hasShaderCyclesHiLoRegisters() const | llvm::GCNSubtarget | inline |
| HasShaderCyclesHiLoRegisters | llvm::GCNSubtarget | protected |
| HasShaderCyclesRegister | llvm::GCNSubtarget | protected |
| hasShaderCyclesRegister() const | llvm::GCNSubtarget | inline |
| hasShift64HighRegBug() const | llvm::GCNSubtarget | inline |
| hasSignedScratchOffsets() const | llvm::GCNSubtarget | inline |
| HasSMemRealTime | llvm::GCNSubtarget | protected |
| hasSMemRealTime() const | llvm::GCNSubtarget | inline |
| HasSMemTimeInst | llvm::GCNSubtarget | protected |
| hasSMemTimeInst() const | llvm::GCNSubtarget | inline |
| HasSMEMtoVectorWriteHazard | llvm::GCNSubtarget | protected |
| hasSMEMtoVectorWriteHazard() const | llvm::GCNSubtarget | inline |
| hasSMRDReadVALUDefHazard() const | llvm::GCNSubtarget | inline |
| HasSMulHi | llvm::AMDGPUSubtarget | protected |
| hasSMulHi() const | llvm::AMDGPUSubtarget | inline |
| hasSPackHL() const | llvm::GCNSubtarget | inline |
| hasSplitBarriers() const | llvm::GCNSubtarget | inline |
| hasSwap() const | llvm::GCNSubtarget | inline |
| hasTransForwardingHazard() const | llvm::GCNSubtarget | inline |
| HasTrigReducedRange | llvm::AMDGPUSubtarget | protected |
| hasTrigReducedRange() const | llvm::AMDGPUSubtarget | inline |
| hasTrue16BitInsts() const | llvm::AMDGPUSubtarget | inline |
| HasTrue16BitInsts | llvm::AMDGPUSubtarget | protected |
| hasUnalignedAccessMode() const | llvm::GCNSubtarget | inline |
| hasUnalignedBufferAccess() const | llvm::GCNSubtarget | inline |
| hasUnalignedBufferAccessEnabled() const | llvm::GCNSubtarget | inline |
| hasUnalignedDSAccess() const | llvm::GCNSubtarget | inline |
| hasUnalignedDSAccessEnabled() const | llvm::GCNSubtarget | inline |
| hasUnalignedScratchAccess() const | llvm::GCNSubtarget | inline |
| hasUnalignedScratchAccessEnabled() const | llvm::GCNSubtarget | inline |
| HasUnpackedD16VMem | llvm::GCNSubtarget | protected |
| hasUnpackedD16VMem() const | llvm::GCNSubtarget | inline |
| hasUsableDivScaleConditionOutput() const | llvm::GCNSubtarget | inline |
| hasUsableDSOffset() const | llvm::GCNSubtarget | inline |
| hasUserSGPRInit16Bug() const | llvm::GCNSubtarget | inline |
| hasVALUMaskWriteHazard() const | llvm::GCNSubtarget | inline |
| hasVALUPartialForwardingHazard() const | llvm::GCNSubtarget | inline |
| hasVALUReadSGPRHazard() const | llvm::GCNSubtarget | inline |
| HasVALUTransUseHazard | llvm::GCNSubtarget | protected |
| hasVALUTransUseHazard() const | llvm::GCNSubtarget | inline |
| HasVcmpxExecWARHazard | llvm::GCNSubtarget | protected |
| hasVcmpxExecWARHazard() const | llvm::GCNSubtarget | inline |
| HasVcmpxPermlaneHazard | llvm::GCNSubtarget | protected |
| hasVcmpxPermlaneHazard() const | llvm::GCNSubtarget | inline |
| hasVDecCoExecHazard() const | llvm::GCNSubtarget | inline |
| hasVGPRIndexMode() const | llvm::GCNSubtarget | inline |
| HasVGPRIndexMode | llvm::GCNSubtarget | protected |
| hasVINTERPEncoding() const | llvm::GCNSubtarget | inline |
| hasVMEMReadSGPRVALUDefHazard() const | llvm::GCNSubtarget | inline |
| HasVMEMtoScalarWriteHazard | llvm::GCNSubtarget | protected |
| hasVMEMtoScalarWriteHazard() const | llvm::GCNSubtarget | inline |
| HasVmemWriteVgprInOrder | llvm::GCNSubtarget | protected |
| hasVmemWriteVgprInOrder() const | llvm::GCNSubtarget | inline |
| hasVOP3DPP() const | llvm::GCNSubtarget | inline |
| hasVOP3Literal() const | llvm::GCNSubtarget | inline |
| HasVOP3Literal | llvm::GCNSubtarget | protected |
| HasVOP3PInsts | llvm::AMDGPUSubtarget | protected |
| hasVOP3PInsts() const | llvm::AMDGPUSubtarget | inline |
| HasVOPDInsts | llvm::GCNSubtarget | protected |
| hasVOPDInsts() const | llvm::GCNSubtarget | inline |
| hasVscnt() const | llvm::GCNSubtarget | inline |
| HasVscnt | llvm::GCNSubtarget | protected |
| HasXF32Insts | llvm::GCNSubtarget | protected |
| hasXF32Insts() const | llvm::GCNSubtarget | inline |
| haveRoundOpsF64() const | llvm::GCNSubtarget | inline |
| initializeSubtargetDependencies(const Triple &TT, StringRef GPU, StringRef FS) | llvm::GCNSubtarget | |
| InstrItins | llvm::GCNSubtarget | protected |
| INVALID enum value | llvm::AMDGPUSubtarget | |
| isAmdHsaOrMesa(const Function &F) const | llvm::AMDGPUSubtarget | inline |
| isAmdHsaOS() const | llvm::AMDGPUSubtarget | inline |
| isAmdPalOS() const | llvm::AMDGPUSubtarget | inline |
| isCuModeEnabled() const | llvm::GCNSubtarget | inline |
| isGCN() const | llvm::AMDGPUSubtarget | inline |
| isGCN3Encoding() const | llvm::AMDGPUSubtarget | inline |
| isMesa3DOS() const | llvm::AMDGPUSubtarget | inline |
| isMesaGfxShader(const Function &F) const | llvm::GCNSubtarget | inline |
| isMesaKernel(const Function &F) const | llvm::AMDGPUSubtarget | |
| isPreciseMemoryEnabled() const | llvm::GCNSubtarget | inline |
| isPromoteAllocaEnabled() const | llvm::AMDGPUSubtarget | inline |
| isSingleLaneExecution(const Function &Kernel) const | llvm::AMDGPUSubtarget | |
| isTgSplitEnabled() const | llvm::GCNSubtarget | inline |
| isTrapHandlerEnabled() const | llvm::GCNSubtarget | inline |
| isWave32() const | llvm::GCNSubtarget | inline |
| isWave64() const | llvm::GCNSubtarget | inline |
| isWaveSizeKnown() const | llvm::GCNSubtarget | inline |
| isXNACKEnabled() const | llvm::GCNSubtarget | inline |
| KernargPreload | llvm::GCNSubtarget | protected |
| LDSBankCount | llvm::GCNSubtarget | protected |
| LDSMisalignedBug | llvm::GCNSubtarget | protected |
| ldsRequiresM0Init() const | llvm::GCNSubtarget | inline |
| loadStoreOptEnabled() const | llvm::GCNSubtarget | inline |
| LocalMemorySize | llvm::AMDGPUSubtarget | protected |
| makeLIDRangeMetadata(Instruction *I) const | llvm::AMDGPUSubtarget | |
| MaxHardClauseLength | llvm::GCNSubtarget | protected |
| maxHardClauseLength() const | llvm::GCNSubtarget | inline |
| MaxPrivateElementSize | llvm::GCNSubtarget | protected |
| MaxWavesPerEU | llvm::AMDGPUSubtarget | protected |
| MIMG_R128 | llvm::GCNSubtarget | protected |
| mirFileLoaded(MachineFunction &MF) const override | llvm::GCNSubtarget | |
| needsAlignedVGPRs() const | llvm::GCNSubtarget | inline |
| NegativeScratchOffsetBug | llvm::GCNSubtarget | protected |
| NegativeUnalignedScratchOffsetBug | llvm::GCNSubtarget | protected |
| NORTHERN_ISLANDS enum value | llvm::AMDGPUSubtarget | |
| overrideSchedPolicy(MachineSchedPolicy &Policy, unsigned NumRegionInstrs) const override | llvm::GCNSubtarget | |
| ParseSubtargetFeatures(StringRef CPU, StringRef TuneCPU, StringRef FS) | llvm::GCNSubtarget | |
| partialVCCWritesUpdateVCCZ() const | llvm::GCNSubtarget | inline |
| privateMemoryResourceIsRangeChecked() const | llvm::GCNSubtarget | inline |
| R600 enum value | llvm::AMDGPUSubtarget | |
| R700 enum value | llvm::AMDGPUSubtarget | |
| requiresCodeObjectV6() const | llvm::GCNSubtarget | inline |
| RequiresCOV6 | llvm::GCNSubtarget | protected |
| requiresDisjointEarlyClobberAndUndef() const override | llvm::GCNSubtarget | inline |
| requiresNopBeforeDeallocVGPRs() const | llvm::GCNSubtarget | inline |
| ScalarFlatScratchInsts | llvm::GCNSubtarget | protected |
| ScalarizeGlobal | llvm::GCNSubtarget | protected |
| SEA_ISLANDS enum value | llvm::AMDGPUSubtarget | |
| setScalarizeGlobalBehavior(bool b) | llvm::GCNSubtarget | inline |
| SGPRInitBug | llvm::GCNSubtarget | protected |
| shouldClusterStores() const | llvm::GCNSubtarget | inline |
| SOUTHERN_ISLANDS enum value | llvm::AMDGPUSubtarget | |
| supportsAgentScopeFineGrainedRemoteMemoryAtomics() const | llvm::GCNSubtarget | inline |
| supportsBackOffBarrier() const | llvm::GCNSubtarget | inline |
| supportsGetDoorbellID() const | llvm::GCNSubtarget | inline |
| supportsMinMaxDenormModes() const | llvm::GCNSubtarget | inline |
| SupportsSRAMECC | llvm::GCNSubtarget | protected |
| supportsWGP() const | llvm::GCNSubtarget | inline |
| SupportsXNACK | llvm::GCNSubtarget | protected |
| TargetID | llvm::GCNSubtarget | protected |
| TargetTriple | llvm::GCNSubtarget | protected |
| TrapHandler | llvm::GCNSubtarget | protected |
| TrapHandlerAbi enum name | llvm::GCNSubtarget | |
| TrapID enum name | llvm::GCNSubtarget | |
| UnalignedAccessMode | llvm::GCNSubtarget | protected |
| UnalignedBufferAccess | llvm::GCNSubtarget | protected |
| UnalignedDSAccess | llvm::GCNSubtarget | protected |
| UnalignedScratchAccess | llvm::GCNSubtarget | protected |
| unsafeDSOffsetFoldingEnabled() const | llvm::GCNSubtarget | inline |
| useAA() const override | llvm::GCNSubtarget | |
| useDS128() const | llvm::GCNSubtarget | inline |
| useFlatForGlobal() const | llvm::GCNSubtarget | inline |
| usePRTStrictNull() const | llvm::GCNSubtarget | inline |
| useRealTrue16Insts() const | llvm::AMDGPUSubtarget | |
| UserSGPRInit16Bug | llvm::GCNSubtarget | protected |
| useVGPRIndexMode() const | llvm::GCNSubtarget | |
| vmemWriteNeedsExpWaitcnt() const | llvm::GCNSubtarget | inline |
| VOLCANIC_ISLANDS enum value | llvm::AMDGPUSubtarget | |
| WavefrontSizeLog2 | llvm::AMDGPUSubtarget | protected |
| zeroesHigh16BitsOfDest(unsigned Opcode) const | llvm::GCNSubtarget | |
| ~AMDGPUSubtarget()=default | llvm::AMDGPUSubtarget | virtual |
| ~GCNSubtarget() override | llvm::GCNSubtarget | |
