10#ifndef LLVM_LIB_TARGET_AMDGPU_AMDGPU_H
11#define LLVM_LIB_TARGET_AMDGPU_AMDGPU_H
21class AMDGPUTargetMachine;
22class GCNTargetMachine;
255 :
TM(
TM), ScanImpl(ScanImpl) {}
479 static const bool ASAliasRules[10][10] = {
481 {
true,
true,
false,
true,
true,
true,
true,
true,
true,
true},
482 {
true,
true,
false,
false,
true,
false,
true,
true,
true,
true},
483 {
false,
false,
true,
false,
false,
false,
false,
false,
false,
false},
484 {
true,
false,
false,
true,
false,
false,
false,
false,
false,
false},
485 {
true,
true,
false,
false,
false,
false,
true,
true,
true,
true},
486 {
true,
false,
false,
false,
false,
true,
false,
false,
false,
false},
487 {
true,
true,
false,
false,
true,
false,
false,
true,
true,
true},
488 {
true,
true,
false,
false,
true,
false,
true,
true,
true,
true},
489 {
true,
true,
false,
false,
true,
false,
true,
true,
true,
true},
490 {
true,
true,
false,
false,
true,
false,
true,
true,
true,
true},
494 return ASAliasRules[AS1][AS2];
AMDGPU address space definition.
const char LLVMTargetMachineRef LLVMPassBuilderOptionsRef Options
const char LLVMTargetMachineRef TM
This header defines various interfaces for pass management in LLVM.
PreservedAnalyses run(Module &M, ModuleAnalysisManager &AM)
AMDGPUAttributorPass(TargetMachine &TM, AMDGPUAttributorOptions Options={})
PreservedAnalyses run(Function &, FunctionAnalysisManager &)
AMDGPUCodeGenPreparePass(TargetMachine &TM)
AMDGPULateCodeGenPreparePass(const GCNTargetMachine &TM)
PreservedAnalyses run(Function &, FunctionAnalysisManager &)
AMDGPULowerKernelArgumentsPass(TargetMachine &TM)
PreservedAnalyses run(Function &, FunctionAnalysisManager &)
PreservedAnalyses run(Function &F, FunctionAnalysisManager &AM)
AMDGPURewriteUndefForPHIPass()=default
A container for analyses that lazily runs them and caches their results.
FunctionPass class - This class is used to implement most global optimizations.
ImmutablePass class - This class is used to provide information that does not need to be run.
ModulePass class - This class is used to implement unstructured interprocedural optimizations and ana...
A Module instance is used to store all the information related to an LLVM module.
PassRegistry - This class manages the registration and intitialization of the pass subsystem as appli...
Pass interface - Implemented by all 'passes'.
A set of analyses that are preserved following a run of a transformation pass.
SIAnnotateControlFlowPass(const AMDGPUTargetMachine &TM)
PreservedAnalyses run(Function &F, FunctionAnalysisManager &AM)
PreservedAnalyses run(MachineFunction &MF, MachineFunctionAnalysisManager &MFAM)
SILowerI1CopiesPass()=default
Primary interface to the complete machine description for the target machine.
@ CONSTANT_ADDRESS_32BIT
Address space for 32-bit constant memory.
@ CONSTANT_ADDRESS
Address space for constant memory (VTX2).
@ FLAT_ADDRESS
Address space for flat memory.
@ GLOBAL_ADDRESS
Address space for global memory (RAT0, VTX0).
bool isFlatGlobalAddrSpace(unsigned AS)
static bool addrspacesMayAlias(unsigned AS1, unsigned AS2)
bool isExtendedGlobalAddrSpace(unsigned AS)
This is an optimization pass for GlobalISel generic memory operations.
void initializeSIFormMemoryClausesPass(PassRegistry &)
char & SIPreAllocateWWMRegsID
ImmutablePass * createAMDGPUAAWrapperPass()
char & SIAnnotateControlFlowLegacyPassID
FunctionPass * createSIPreAllocateWWMRegsPass()
FunctionPass * createAMDGPUSetWavePriorityPass()
char & AMDGPUCtorDtorLoweringLegacyPassID
void initializeAMDGPUInsertSingleUseVDSTPass(PassRegistry &)
void initializeGCNCreateVOPDPass(PassRegistry &)
ModulePass * createAMDGPUOpenCLEnqueuedBlockLoweringPass()
char & AMDGPUAnnotateKernelFeaturesID
char & GCNPreRAOptimizationsID
void initializeGCNPreRAOptimizationsPass(PassRegistry &)
void initializeGCNRewritePartialRegUsesPass(llvm::PassRegistry &)
char & SIMemoryLegalizerID
void initializeAMDGPUAttributorLegacyPass(PassRegistry &)
FunctionPass * createSIAnnotateControlFlowLegacyPass()
Create the annotation pass.
FunctionPass * createSIModeRegisterPass()
void initializeAMDGPUAAWrapperPassPass(PassRegistry &)
ModulePass * createAMDGPULowerBufferFatPointersPass()
void initializeSIModeRegisterPass(PassRegistry &)
ModulePass * createAMDGPUCtorDtorLoweringLegacyPass()
void initializeSIOptimizeVGPRLiveRangePass(PassRegistry &)
char & AMDGPUImageIntrinsicOptimizerID
void initializeAMDGPURewriteUndefForPHILegacyPass(PassRegistry &)
char & AMDGPUPromoteKernelArgumentsID
FunctionPass * createAMDGPUPreLegalizeCombiner(bool IsOptNone)
char & GCNRewritePartialRegUsesID
FunctionPass * createAMDGPUPostLegalizeCombiner(bool IsOptNone)
void initializeSIShrinkInstructionsPass(PassRegistry &)
FunctionPass * createAMDGPURewriteOutArgumentsPass()
void initializeGCNPreRALongBranchRegPass(PassRegistry &)
char & AMDGPUResourceUsageAnalysisID
char & SILoadStoreOptimizerID
FunctionPass * createSIWholeQuadModePass()
void initializeAMDGPUDAGToDAGISelLegacyPass(PassRegistry &)
ModulePass * createAMDGPULowerKernelAttributesPass()
ModulePass * createAMDGPUAlwaysInlinePass(bool GlobalOpt=true)
FunctionPass * createSIPeepholeSDWAPass()
void initializeSIPreEmitPeepholePass(PassRegistry &)
char & AMDGPUPromoteAllocaToVectorID
FunctionPass * createSILoadStoreOptimizerPass()
char & SILowerWWMCopiesID
void initializeSIFixVGPRCopiesPass(PassRegistry &)
ModulePass * createAMDGPUUnifyMetadataPass()
void initializeAMDGPUMachineCFGStructurizerPass(PassRegistry &)
void initializeAMDGPUGlobalISelDivergenceLoweringPass(PassRegistry &)
void initializeAMDGPURemoveIncompatibleFunctionsPass(PassRegistry &)
void initializeSILowerWWMCopiesPass(PassRegistry &)
void initializeGCNNSAReassignPass(PassRegistry &)
void initializeSIInsertWaitcntsPass(PassRegistry &)
char & AMDGPUInsertSingleUseVDSTID
char & SIFormMemoryClausesID
char & AMDGPURemoveIncompatibleFunctionsID
void initializeAMDGPULowerModuleLDSLegacyPass(PassRegistry &)
void initializeAMDGPUCtorDtorLoweringLegacyPass(PassRegistry &)
void initializeAMDGPURegBankCombinerPass(PassRegistry &)
char & AMDGPUGlobalISelDivergenceLoweringID
void initializeSILoadStoreOptimizerPass(PassRegistry &)
void initializeSILateBranchLoweringPass(PassRegistry &)
void initializeSIPeepholeSDWAPass(PassRegistry &)
FunctionPass * createAMDGPUPromoteAllocaToVector()
char & AMDGPUUnifyDivergentExitNodesID
char & SIInsertWaitcntsID
FunctionPass * createAMDGPUAtomicOptimizerPass(ScanOptions ScanStrategy)
char & AMDGPUPrintfRuntimeBindingID
void initializeAMDGPURewriteOutArgumentsPass(PassRegistry &)
void initializeAMDGPUExternalAAWrapperPass(PassRegistry &)
void initializeAMDGPULowerKernelArgumentsPass(PassRegistry &)
char & SILowerSGPRSpillsID
char & SILateBranchLoweringPassID
FunctionPass * createGCNPreRAOptimizationsPass()
FunctionPass * createSIShrinkInstructionsPass()
void initializeAMDGPUAnnotateKernelFeaturesPass(PassRegistry &)
void initializeSIPostRABundlerPass(PassRegistry &)
void initializeAMDGPUPromoteAllocaToVectorPass(PassRegistry &)
Pass * createAMDGPUAttributorLegacyPass()
void initializeSIWholeQuadModePass(PassRegistry &)
FunctionPass * createAMDGPULowerKernelArgumentsPass()
char & AMDGPUInsertDelayAluID
Pass * createAMDGPUAnnotateKernelFeaturesPass()
char & SIOptimizeVGPRLiveRangeID
char & SIOptimizeExecMaskingPreRAID
char & AMDGPULowerModuleLDSLegacyPassID
void initializeSIInsertHardClausesPass(PassRegistry &)
FunctionPass * createSIPostRABundlerPass()
FunctionPass * createSIFormMemoryClausesPass()
void initializeAMDGPUPostLegalizerCombinerPass(PassRegistry &)
Pass * createAMDGPUStructurizeCFGPass()
CodeGenOptLevel
Code generation optimization level.
char & AMDGPULowerBufferFatPointersID
ModulePass * createAMDGPUPrintfRuntimeBinding()
void initializeSIMemoryLegalizerPass(PassRegistry &)
char & AMDGPUUnifyMetadataID
void initializeAMDGPUImageIntrinsicOptimizerPass(PassRegistry &)
ModulePass * createAMDGPULowerModuleLDSLegacyPass(const AMDGPUTargetMachine *TM=nullptr)
void initializeAMDGPUPreLegalizerCombinerPass(PassRegistry &)
FunctionPass * createAMDGPUPromoteAlloca()
char & SIPreEmitPeepholeID
ModulePass * createAMDGPURemoveIncompatibleFunctionsPass(const TargetMachine *)
void initializeGCNRegPressurePrinterPass(PassRegistry &)
char & AMDGPURewriteOutArgumentsID
void initializeSILowerI1CopiesLegacyPass(PassRegistry &)
void initializeAMDGPUArgumentUsageInfoPass(PassRegistry &)
void initializeSIPreAllocateWWMRegsPass(PassRegistry &)
char & AMDGPUPromoteAllocaID
FunctionPass * createAMDGPUCodeGenPreparePass()
void initializeSIAnnotateControlFlowLegacyPass(PassRegistry &)
FunctionPass * createAMDGPUISelDag(TargetMachine &TM, CodeGenOptLevel OptLevel)
This pass converts a legalized DAG into a AMDGPU-specific.
void initializeSIFixSGPRCopiesLegacyPass(PassRegistry &)
char & AMDGPUAnnotateUniformValuesLegacyPassID
void initializeAMDGPUAtomicOptimizerPass(PassRegistry &)
char & AMDGPUMachineCFGStructurizerID
char & AMDGPULowerKernelAttributesID
char & GCNRegPressurePrinterID
FunctionPass * createAMDGPURegBankCombiner(bool IsOptNone)
FunctionPass * createSIFoldOperandsPass()
void initializeSIOptimizeExecMaskingPreRAPass(PassRegistry &)
void initializeAMDGPUMarkLastScratchLoadPass(PassRegistry &)
ImmutablePass * createAMDGPUExternalAAWrapperPass()
void initializeAMDGPUCodeGenPreparePass(PassRegistry &)
FunctionPass * createAMDGPURewriteUndefForPHILegacyPass()
void initializeSILowerSGPRSpillsPass(PassRegistry &)
FunctionPass * createSILowerI1CopiesLegacyPass()
char & AMDGPULateCodeGenPrepareLegacyID
void initializeAMDGPULowerKernelAttributesPass(PassRegistry &)
char & SIInsertHardClausesID
FunctionPass * createAMDGPUMachineCFGStructurizerPass()
void initializeAMDGPUResourceUsageAnalysisPass(PassRegistry &)
char & SIFixSGPRCopiesLegacyID
char & SILowerControlFlowID
char & AMDGPUAtomicOptimizerID
char & SILowerI1CopiesLegacyID
FunctionPass * createLowerWWMCopiesPass()
void initializeSIOptimizeExecMaskingPass(PassRegistry &)
FunctionPass * createAMDGPUGlobalISelDivergenceLoweringPass()
FunctionPass * createSIMemoryLegalizerPass()
void initializeAMDGPULateCodeGenPrepareLegacyPass(PassRegistry &)
void initializeSIFoldOperandsPass(PassRegistry &)
void initializeSILowerControlFlowPass(PassRegistry &)
char & AMDGPUOpenCLEnqueuedBlockLoweringID
void initializeAMDGPURegBankSelectPass(PassRegistry &)
FunctionPass * createAMDGPULateCodeGenPrepareLegacyPass()
char & AMDGPURewriteUndefForPHILegacyPassID
FunctionPass * createSIOptimizeVGPRLiveRangePass()
FunctionPass * createAMDGPUImageIntrinsicOptimizerPass(const TargetMachine *)
void initializeAMDGPUUnifyDivergentExitNodesPass(PassRegistry &)
void initializeAMDGPULowerBufferFatPointersPass(PassRegistry &)
FunctionPass * createSIInsertWaitcntsPass()
FunctionPass * createAMDGPUAnnotateUniformValuesLegacy()
void initializeGCNDPPCombinePass(PassRegistry &)
FunctionPass * createSIOptimizeExecMaskingPreRAPass()
FunctionPass * createGCNDPPCombinePass()
AnalysisManager< Module > ModuleAnalysisManager
Convenience typedef for the Module analysis manager.
char & AMDGPUMarkLastScratchLoadID
void initializeAMDGPUAnnotateUniformValuesLegacyPass(PassRegistry &)
void initializeAMDGPUPrintfRuntimeBindingPass(PassRegistry &)
void initializeAMDGPUPromoteAllocaPass(PassRegistry &)
void initializeAMDGPUOpenCLEnqueuedBlockLoweringPass(PassRegistry &)
void initializeAMDGPUInsertDelayAluPass(PassRegistry &)
char & SIOptimizeExecMaskingID
void initializeAMDGPUUnifyMetadataPass(PassRegistry &)
FunctionPass * createSIFixControlFlowLiveIntervalsPass()
char & AMDGPULowerKernelArgumentsID
void initializeAMDGPUAlwaysInlinePass(PassRegistry &)
char & AMDGPUCodeGenPrepareID
void initializeAMDGPUSetWavePriorityPass(PassRegistry &)
FunctionPass * createSIFixSGPRCopiesLegacyPass()
char & SIShrinkInstructionsID
char & AMDGPUPerfHintAnalysisLegacyID
FunctionPass * createAMDGPUPromoteKernelArgumentsPass()
char & GCNPreRALongBranchRegID
void initializeAMDGPUPerfHintAnalysisLegacyPass(PassRegistry &)
void initializeAMDGPUPromoteKernelArgumentsPass(PassRegistry &)
AMDGPUAlwaysInlinePass(bool GlobalOpt=true)
PreservedAnalyses run(Module &M, ModuleAnalysisManager &AM)
PreservedAnalyses run(Function &F, FunctionAnalysisManager &AM)
AMDGPUAtomicOptimizerPass(TargetMachine &TM, ScanOptions ScanImpl)
PreservedAnalyses run(Function &F, FunctionAnalysisManager &AM)
AMDGPUImageIntrinsicOptimizerPass(TargetMachine &TM)
PreservedAnalyses run(Module &M, ModuleAnalysisManager &AM)
AMDGPULowerBufferFatPointersPass(const TargetMachine &TM)
PreservedAnalyses run(Function &F, FunctionAnalysisManager &AM)
PreservedAnalyses run(Module &M, ModuleAnalysisManager &AM)
AMDGPULowerModuleLDSPass(const AMDGPUTargetMachine &TM_)
const AMDGPUTargetMachine & TM
PreservedAnalyses run(Module &M, ModuleAnalysisManager &AM)
AMDGPUSimplifyLibCallsPass()
PreservedAnalyses run(Function &F, FunctionAnalysisManager &AM)
PreservedAnalyses run(Function &F, FunctionAnalysisManager &AM)
A CRTP mix-in to automatically provide informational APIs needed for passes.