LLVM 17.0.0git
AMDGPUTargetMachine.h
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1//===-- AMDGPUTargetMachine.h - AMDGPU TargetMachine Interface --*- C++ -*-===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8//
9/// \file
10/// The AMDGPU TargetMachine interface definition for hw codegen targets.
11//
12//===----------------------------------------------------------------------===//
13
14#ifndef LLVM_LIB_TARGET_AMDGPU_AMDGPUTARGETMACHINE_H
15#define LLVM_LIB_TARGET_AMDGPU_AMDGPUTARGETMACHINE_H
16
17#include "GCNSubtarget.h"
20#include <optional>
21#include <utility>
22
23namespace llvm {
24
25//===----------------------------------------------------------------------===//
26// AMDGPU Target Machine (R600+)
27//===----------------------------------------------------------------------===//
28
30protected:
31 std::unique_ptr<TargetLoweringObjectFile> TLOF;
32
33 StringRef getGPUName(const Function &F) const;
35
36public:
40
41 AMDGPUTargetMachine(const Target &T, const Triple &TT, StringRef CPU,
43 std::optional<Reloc::Model> RM,
44 std::optional<CodeModel::Model> CM, CodeGenOpt::Level OL);
46
48 const TargetSubtargetInfo *getSubtargetImpl(const Function &) const override = 0;
49
51 return TLOF.get();
52 }
53
56
57 /// Get the integer value of a null pointer in the given address space.
58 static int64_t getNullPointerValue(unsigned AddrSpace);
59
60 bool isNoopAddrSpaceCast(unsigned SrcAS, unsigned DestAS) const override;
61
62 unsigned getAssumedAddrSpace(const Value *V) const override;
63
64 std::pair<const Value *, unsigned>
65 getPredicatedAddrSpace(const Value *V) const override;
66
67 unsigned getAddressSpaceForPseudoSourceKind(unsigned Kind) const override;
68};
69
70//===----------------------------------------------------------------------===//
71// GCN Target Machine (SI+)
72//===----------------------------------------------------------------------===//
73
75private:
76 mutable StringMap<std::unique_ptr<GCNSubtarget>> SubtargetMap;
77
78public:
79 GCNTargetMachine(const Target &T, const Triple &TT, StringRef CPU,
81 std::optional<Reloc::Model> RM,
82 std::optional<CodeModel::Model> CM, CodeGenOpt::Level OL,
83 bool JIT);
84
86
87 const TargetSubtargetInfo *getSubtargetImpl(const Function &) const override;
88
90
91 bool useIPRA() const override {
92 return true;
93 }
94
97 const TargetSubtargetInfo *STI) const override;
98
101 convertFuncInfoToYAML(const MachineFunction &MF) const override;
105 SMRange &SourceRange) const override;
106};
107
108//===----------------------------------------------------------------------===//
109// AMDGPU Pass Setup
110//===----------------------------------------------------------------------===//
111
113public:
115
117 return getTM<AMDGPUTargetMachine>();
118 }
119
122
125 void addIRPasses() override;
126 void addCodeGenPrepare() override;
127 bool addPreISel() override;
128 bool addInstSelector() override;
129 bool addGCPasses() override;
130
131 std::unique_ptr<CSEConfigBase> getCSEConfig() const override;
132
133 /// Check if a pass is enabled given \p Opt option. The option always
134 /// overrides defaults if explicitly used. Otherwise its default will
135 /// be used given that a pass shall work at an optimization \p Level
136 /// minimum.
139 if (Opt.getNumOccurrences())
140 return Opt;
141 if (TM->getOptLevel() < Level)
142 return false;
143 return Opt;
144 }
145};
146
147} // end namespace llvm
148
149#endif // LLVM_LIB_TARGET_AMDGPU_AMDGPUTARGETMACHINE_H
AMD GCN specific subclass of TargetSubtarget.
#define F(x, y, z)
Definition: MD5.cpp:55
PassBuilder PB(Machine, PassOpts->PTO, std::nullopt, &PIC)
Basic Register Allocator
Target-Independent Code Generator Pass Configuration Options pass.
A manager for alias analyses.
AMDGPUTargetMachine & getAMDGPUTargetMachine() const
std::unique_ptr< CSEConfigBase > getCSEConfig() const override
Returns the CSEConfig object to use for the current optimization level.
ScheduleDAGInstrs * createMachineScheduler(MachineSchedContext *C) const override
Create an instance of ScheduleDAGInstrs to be run within the standard MachineScheduler pass for this ...
bool addPreISel() override
Methods with trivial inline returns are convenient points in the common codegen pass pipeline where t...
bool isPassEnabled(const cl::opt< bool > &Opt, CodeGenOpt::Level Level=CodeGenOpt::Default) const
Check if a pass is enabled given Opt option.
bool addInstSelector() override
addInstSelector - This method should install an instruction selector pass, which converts from LLVM c...
bool addGCPasses() override
addGCPasses - Add late codegen passes that analyze code for garbage collection.
void addIRPasses() override
Add common target configurable passes that perform LLVM IR to IR transforms following machine indepen...
void addCodeGenPrepare() override
Add pass to prepare the LLVM IR for code generation.
std::unique_ptr< TargetLoweringObjectFile > TLOF
static int64_t getNullPointerValue(unsigned AddrSpace)
Get the integer value of a null pointer in the given address space.
unsigned getAddressSpaceForPseudoSourceKind(unsigned Kind) const override
getAddressSpaceForPseudoSourceKind - Given the kind of memory (e.g.
const TargetSubtargetInfo * getSubtargetImpl() const
TargetLoweringObjectFile * getObjFileLowering() const override
void registerDefaultAliasAnalyses(AAManager &) override
Allow the target to register alias analyses with the AAManager for use with the new pass manager.
std::pair< const Value *, unsigned > getPredicatedAddrSpace(const Value *V) const override
If the specified predicate checks whether a generic pointer falls within a specified address space,...
StringRef getFeatureString(const Function &F) const
bool isNoopAddrSpaceCast(unsigned SrcAS, unsigned DestAS) const override
Returns true if a cast between SrcAS and DestAS is a noop.
void registerPassBuilderCallbacks(PassBuilder &PB) override
Allow the target to modify the pass pipeline.
StringRef getGPUName(const Function &F) const
unsigned getAssumedAddrSpace(const Value *V) const override
If the specified generic pointer could be assumed as a pointer to a specific address space,...
const TargetSubtargetInfo * getSubtargetImpl(const Function &) const override=0
Virtual method implemented by subclasses that returns a reference to that target's TargetSubtargetInf...
Allocate memory in an ever growing pool, as if by bump-pointer.
Definition: Allocator.h:66
Lightweight error class with error context and mandatory checking.
Definition: Error.h:156
TargetTransformInfo getTargetTransformInfo(const Function &F) const override
Get a TargetTransformInfo implementation for the target.
bool parseMachineFunctionInfo(const yaml::MachineFunctionInfo &, PerFunctionMIParsingState &PFS, SMDiagnostic &Error, SMRange &SourceRange) const override
Parse out the target's MachineFunctionInfo from the YAML reprsentation.
yaml::MachineFunctionInfo * convertFuncInfoToYAML(const MachineFunction &MF) const override
Allocate and initialize an instance of the YAML representation of the MachineFunctionInfo.
yaml::MachineFunctionInfo * createDefaultFuncInfoYAML() const override
Allocate and return a default initialized instance of the YAML representation for the MachineFunction...
TargetPassConfig * createPassConfig(PassManagerBase &PM) override
Create a pass configuration object to be used by addPassToEmitX methods for generating a pipeline of ...
bool useIPRA() const override
True if the target wants to use interprocedural register allocation by default.
MachineFunctionInfo * createMachineFunctionInfo(BumpPtrAllocator &Allocator, const Function &F, const TargetSubtargetInfo *STI) const override
Create the target's instance of MachineFunctionInfo.
This class describes a target machine that is implemented with the LLVM target-independent code gener...
This class provides access to building LLVM's passes.
Definition: PassBuilder.h:100
Instances of this class encapsulate one diagnostic report, allowing printing to a raw_ostream as a ca...
Definition: SourceMgr.h:281
Represents a range in source code.
Definition: SMLoc.h:48
A ScheduleDAG for scheduling lists of MachineInstr.
StringMap - This is an unconventional map that is specialized for handling keys that are "strings",...
Definition: StringMap.h:111
StringRef - Represent a constant reference to a string, i.e.
Definition: StringRef.h:50
CodeGenOpt::Level getOptLevel() const
Returns the optimization level: None, Less, Default, or Aggressive.
std::unique_ptr< const MCSubtargetInfo > STI
TargetOptions Options
Target-Independent Code Generator Pass Configuration Options.
LLVMTargetMachine * TM
TargetSubtargetInfo - Generic base class for all target subtargets.
This pass provides access to the codegen interfaces that are needed for IR-level transformations.
Target - Wrapper for Target specific information.
Triple - Helper class for working with autoconf configuration names.
Definition: Triple.h:44
LLVM Value Representation.
Definition: Value.h:74
int getNumOccurrences() const
Definition: CommandLine.h:401
PassManagerBase - An abstract interface to allow code to add passes to a pass manager without having ...
@ C
The default llvm calling convention, compatible with C.
Definition: CallingConv.h:34
Level
Code generation optimization level.
Definition: CodeGen.h:57
@ Default
-O2, -Os
Definition: CodeGen.h:60
This is an optimization pass for GlobalISel generic memory operations.
Definition: AddressRanges.h:18
MachineFunctionInfo - This class can be derived from and used by targets to hold private target-speci...
MachineSchedContext provides enough context from the MachineScheduler pass for the target to instanti...
Targets should override this in a way that mirrors the implementation of llvm::MachineFunctionInfo.