LLVM  12.0.0git
AMDGPUPreLegalizerCombiner.cpp
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1 //=== lib/CodeGen/GlobalISel/AMDGPUPreLegalizerCombiner.cpp ---------------===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // This pass does combining of machine instructions at the generic MI level,
10 // before the legalizer.
11 //
12 //===----------------------------------------------------------------------===//
13 
14 #include "AMDGPUTargetMachine.h"
23 #include "llvm/Support/Debug.h"
25 
26 #define DEBUG_TYPE "amdgpu-prelegalizer-combiner"
27 
28 using namespace llvm;
29 using namespace MIPatternMatch;
30 
31 #define AMDGPUPRELEGALIZERCOMBINERHELPER_GENCOMBINERHELPER_DEPS
32 #include "AMDGPUGenPreLegalizeGICombiner.inc"
33 #undef AMDGPUPRELEGALIZERCOMBINERHELPER_GENCOMBINERHELPER_DEPS
34 
35 namespace {
36 #define AMDGPUPRELEGALIZERCOMBINERHELPER_GENCOMBINERHELPER_H
37 #include "AMDGPUGenPreLegalizeGICombiner.inc"
38 #undef AMDGPUPRELEGALIZERCOMBINERHELPER_GENCOMBINERHELPER_H
39 
40 class AMDGPUPreLegalizerCombinerInfo : public CombinerInfo {
41  GISelKnownBits *KB;
43 
44 public:
45  AMDGPUGenPreLegalizerCombinerHelperRuleConfig GeneratedRuleCfg;
46 
47  AMDGPUPreLegalizerCombinerInfo(bool EnableOpt, bool OptSize, bool MinSize,
49  : CombinerInfo(/*AllowIllegalOps*/ true, /*ShouldLegalizeIllegal*/ false,
50  /*LegalizerInfo*/ nullptr, EnableOpt, OptSize, MinSize),
51  KB(KB), MDT(MDT) {
52  if (!GeneratedRuleCfg.parseCommandLineOption())
53  report_fatal_error("Invalid rule identifier");
54  }
55 
56  virtual bool combine(GISelChangeObserver &Observer, MachineInstr &MI,
57  MachineIRBuilder &B) const override;
58 };
59 
62  MachineIRBuilder &B) const {
63  CombinerHelper Helper(Observer, B, KB, MDT);
64  AMDGPUGenPreLegalizerCombinerHelper Generated(GeneratedRuleCfg);
65 
66  if (Generated.tryCombineAll(Observer, MI, B, Helper))
67  return true;
68 
69  switch (MI.getOpcode()) {
70  case TargetOpcode::G_CONCAT_VECTORS:
71  return Helper.tryCombineConcatVectors(MI);
72  case TargetOpcode::G_SHUFFLE_VECTOR:
73  return Helper.tryCombineShuffleVector(MI);
74  }
75 
76  return false;
77 }
78 
79 #define AMDGPUPRELEGALIZERCOMBINERHELPER_GENCOMBINERHELPER_CPP
80 #include "AMDGPUGenPreLegalizeGICombiner.inc"
81 #undef AMDGPUPRELEGALIZERCOMBINERHELPER_GENCOMBINERHELPER_CPP
82 
83 // Pass boilerplate
84 // ================
85 
86 class AMDGPUPreLegalizerCombiner : public MachineFunctionPass {
87 public:
88  static char ID;
89 
90  AMDGPUPreLegalizerCombiner(bool IsOptNone = false);
91 
92  StringRef getPassName() const override {
93  return "AMDGPUPreLegalizerCombiner";
94  }
95 
96  bool runOnMachineFunction(MachineFunction &MF) override;
97 
98  void getAnalysisUsage(AnalysisUsage &AU) const override;
99 private:
100  bool IsOptNone;
101 };
102 } // end anonymous namespace
103 
104 void AMDGPUPreLegalizerCombiner::getAnalysisUsage(AnalysisUsage &AU) const {
106  AU.setPreservesCFG();
110  if (!IsOptNone) {
113  }
115 }
116 
117 AMDGPUPreLegalizerCombiner::AMDGPUPreLegalizerCombiner(bool IsOptNone)
118  : MachineFunctionPass(ID), IsOptNone(IsOptNone) {
120 }
121 
122 bool AMDGPUPreLegalizerCombiner::runOnMachineFunction(MachineFunction &MF) {
123  if (MF.getProperties().hasProperty(
125  return false;
126  auto *TPC = &getAnalysis<TargetPassConfig>();
127  const Function &F = MF.getFunction();
128  bool EnableOpt =
129  MF.getTarget().getOptLevel() != CodeGenOpt::None && !skipFunction(F);
130  GISelKnownBits *KB = &getAnalysis<GISelKnownBitsAnalysis>().get(MF);
131  MachineDominatorTree *MDT =
132  IsOptNone ? nullptr : &getAnalysis<MachineDominatorTree>();
133  AMDGPUPreLegalizerCombinerInfo PCInfo(EnableOpt, F.hasOptSize(),
134  F.hasMinSize(), KB, MDT);
135  Combiner C(PCInfo, TPC);
136  return C.combineMachineInstrs(MF, /*CSEInfo*/ nullptr);
137 }
138 
140 INITIALIZE_PASS_BEGIN(AMDGPUPreLegalizerCombiner, DEBUG_TYPE,
141  "Combine AMDGPU machine instrs before legalization",
142  false, false)
145 INITIALIZE_PASS_END(AMDGPUPreLegalizerCombiner, DEBUG_TYPE,
146  "Combine AMDGPU machine instrs before legalization", false,
147  false)
148 
149 namespace llvm {
151  return new AMDGPUPreLegalizerCombiner(IsOptNone);
152 }
153 } // end namespace llvm
uint64_t CallInst * C
AnalysisUsage & addPreserved()
Add the specified Pass class to the set of analyses preserved by this pass.
static PassRegistry * getPassRegistry()
getPassRegistry - Access the global registry object, which is automatically initialized at applicatio...
coro Split coroutine into a set of functions driving its state machine
Definition: CoroSplit.cpp:1806
LLVM_ATTRIBUTE_NORETURN void report_fatal_error(Error Err, bool gen_crash_diag=true)
Report a serious error, calling any installed error handler.
Definition: Error.cpp:140
This class represents lattice values for constants.
Definition: AllocatorList.h:23
void getSelectionDAGFallbackAnalysisUsage(AnalysisUsage &AU)
Modify analysis usage so it preserves passes required for the SelectionDAG fallback.
Definition: Utils.cpp:509
const MachineFunctionProperties & getProperties() const
Get the function properties.
F(f)
Function & getFunction()
Return the LLVM function that this machine code represents.
AnalysisUsage & addRequired()
MachineFunctionPass - This class adapts the FunctionPass interface to allow convenient creation of pa...
unsigned getOpcode() const
Returns the opcode of this MachineInstr.
Definition: MachineInstr.h:456
Target-Independent Code Generator Pass Configuration Options.
To use KnownBitsInfo analysis in a pass, KnownBitsInfo &Info = getAnalysis<GISelKnownBitsInfoAnalysis...
Abstract class that contains various methods for clients to notify about changes. ...
static GCRegistry::Add< OcamlGC > B("ocaml", "ocaml 3.10-compatible GC")
CodeGenOpt::Level getOptLevel() const
Returns the optimization level: None, Less, Default, or Aggressive.
void getAnalysisUsage(AnalysisUsage &AU) const override
getAnalysisUsage - Subclasses that override getAnalysisUsage must call this.
Helper class to build MachineInstr.
Represent the analysis usage information of a pass.
FunctionPass * createAMDGPUPreLegalizeCombiner(bool IsOptNone)
FunctionPass class - This class is used to implement most global optimizations.
Definition: Pass.h:284
The AMDGPU TargetMachine interface definition for hw codgen targets.
#define DEBUG_TYPE
INITIALIZE_PASS_END(RegBankSelect, DEBUG_TYPE, "Assign register bank of generic virtual registers", false, false) RegBankSelect
void initializeAMDGPUPreLegalizerCombinerPass(PassRegistry &)
void setPreservesCFG()
This function should be called by the pass, iff they do not:
Definition: Pass.cpp:253
Combine AMDGPU machine instrs before legalization
bool tryCombineShuffleVector(MachineInstr &MI)
Try to combine G_SHUFFLE_VECTOR into G_CONCAT_VECTORS.
vector combine
Provides AMDGPU specific target descriptions.
Representation of each machine instruction.
Definition: MachineInstr.h:62
INITIALIZE_PASS_BEGIN(AMDGPUPreLegalizerCombiner, DEBUG_TYPE, "Combine AMDGPU machine instrs before legalization", false, false) INITIALIZE_PASS_END(AMDGPUPreLegalizerCombiner
const LLVMTargetMachine & getTarget() const
getTarget - Return the target machine this machine code is compiled with
bool hasProperty(Property P) const
IRTranslator LLVM IR MI
StringRef - Represent a constant reference to a string, i.e.
Definition: StringRef.h:57
bool tryCombineConcatVectors(MachineInstr &MI)
If MI is G_CONCAT_VECTORS, try to combine it.
DominatorTree Class - Concrete subclass of DominatorTreeBase that is used to compute a normal dominat...
INITIALIZE_PASS_DEPENDENCY(DominatorTreeWrapperPass)