LLVM
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include
llvm
CodeGen
MachineSSAContext.h
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//===- MachineSSAContext.h --------------------------------------*- C++ -*-===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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/// \file
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///
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/// This file declares a specialization of the GenericSSAContext<X>
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/// template class for Machine IR.
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///
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_CODEGEN_MACHINESSACONTEXT_H
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#define LLVM_CODEGEN_MACHINESSACONTEXT_H
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#include "
llvm/ADT/GenericSSAContext.h
"
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#include "
llvm/CodeGen/MachineBasicBlock.h
"
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#include "
llvm/Support/Printable.h
"
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namespace
llvm
{
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class
MachineInstr;
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class
MachineFunction;
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class
Register
;
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inline
auto
instrs
(
const
MachineBasicBlock
&BB) {
return
BB.
instrs
(); }
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template
<>
struct
GenericSSATraits
<
MachineFunction
> {
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using
BlockT
=
MachineBasicBlock
;
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using
FunctionT
=
MachineFunction
;
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using
InstructionT
=
MachineInstr
;
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using
ValueRefT
=
Register
;
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using
ConstValueRefT
=
Register
;
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using
UseT
=
MachineOperand
;
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};
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using
MachineSSAContext
=
GenericSSAContext<MachineFunction>
;
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}
// namespace llvm
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#endif
// LLVM_CODEGEN_MACHINESSACONTEXT_H
GenericSSAContext.h
This file defines the little GenericSSAContext<X> template class that can be used to implement IR ana...
MachineBasicBlock.h
Register
Promote Memory to Register
Definition:
Mem2Reg.cpp:110
Printable.h
llvm::GenericSSAContext
Definition:
GenericSSAContext.h:41
llvm::MachineBasicBlock
Definition:
MachineBasicBlock.h:125
llvm::MachineBasicBlock::instrs
instr_range instrs()
Definition:
MachineBasicBlock.h:350
llvm::MachineFunction
Definition:
MachineFunction.h:258
llvm::MachineInstr
Representation of each machine instruction.
Definition:
MachineInstr.h:69
llvm::MachineOperand
MachineOperand class - Representation of each machine instruction operand.
Definition:
MachineOperand.h:48
llvm::Register
Wrapper class representing virtual and physical registers.
Definition:
Register.h:19
llvm
This is an optimization pass for GlobalISel generic memory operations.
Definition:
AddressRanges.h:18
llvm::instrs
auto instrs(const MachineBasicBlock &BB)
Definition:
MachineSSAContext.h:27
llvm::GenericSSATraits
Definition:
GenericSSAContext.h:33
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