LLVM  10.0.0svn
MIPatternMatch.h
Go to the documentation of this file.
1 //==------ llvm/CodeGen/GlobalISel/MIPatternMatch.h -------------*- C++ -*-===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 /// Contains matchers for matching SSA Machine Instructions.
10 //
11 //===----------------------------------------------------------------------===//
12 #ifndef LLVM_GMIR_PATTERNMATCH_H
13 #define LLVM_GMIR_PATTERNMATCH_H
14 
15 #include "llvm/ADT/APFloat.h"
16 #include "llvm/ADT/APInt.h"
19 
20 namespace llvm {
21 namespace MIPatternMatch {
22 
23 template <typename Reg, typename Pattern>
24 bool mi_match(Reg R, const MachineRegisterInfo &MRI, Pattern &&P) {
25  return P.match(MRI, R);
26 }
27 
28 // TODO: Extend for N use.
29 template <typename SubPatternT> struct OneUse_match {
30  SubPatternT SubPat;
31  OneUse_match(const SubPatternT &SP) : SubPat(SP) {}
32 
33  bool match(const MachineRegisterInfo &MRI, unsigned Reg) {
34  return MRI.hasOneUse(Reg) && SubPat.match(MRI, Reg);
35  }
36 };
37 
38 template <typename SubPat>
40  return SP;
41 }
42 
43 struct ConstantMatch {
44  int64_t &CR;
45  ConstantMatch(int64_t &C) : CR(C) {}
46  bool match(const MachineRegisterInfo &MRI, unsigned Reg) {
47  if (auto MaybeCst = getConstantVRegVal(Reg, MRI)) {
48  CR = *MaybeCst;
49  return true;
50  }
51  return false;
52  }
53 };
54 
55 inline ConstantMatch m_ICst(int64_t &Cst) { return ConstantMatch(Cst); }
56 
57 // TODO: Rework this for different kinds of MachineOperand.
58 // Currently assumes the Src for a match is a register.
59 // We might want to support taking in some MachineOperands and call getReg on
60 // that.
61 
63  bool match(const MachineRegisterInfo &MRI, unsigned Reg) { return true; }
65  return MO->isReg();
66  }
67 };
68 
70 
71 /// Matching combinators.
72 template <typename... Preds> struct And {
73  template <typename MatchSrc>
74  bool match(const MachineRegisterInfo &MRI, MatchSrc &&src) {
75  return true;
76  }
77 };
78 
79 template <typename Pred, typename... Preds>
80 struct And<Pred, Preds...> : And<Preds...> {
81  Pred P;
82  And(Pred &&p, Preds &&... preds)
83  : And<Preds...>(std::forward<Preds>(preds)...), P(std::forward<Pred>(p)) {
84  }
85  template <typename MatchSrc>
86  bool match(const MachineRegisterInfo &MRI, MatchSrc &&src) {
87  return P.match(MRI, src) && And<Preds...>::match(MRI, src);
88  }
89 };
90 
91 template <typename... Preds> struct Or {
92  template <typename MatchSrc>
93  bool match(const MachineRegisterInfo &MRI, MatchSrc &&src) {
94  return false;
95  }
96 };
97 
98 template <typename Pred, typename... Preds>
99 struct Or<Pred, Preds...> : Or<Preds...> {
100  Pred P;
101  Or(Pred &&p, Preds &&... preds)
102  : Or<Preds...>(std::forward<Preds>(preds)...), P(std::forward<Pred>(p)) {}
103  template <typename MatchSrc>
104  bool match(const MachineRegisterInfo &MRI, MatchSrc &&src) {
105  return P.match(MRI, src) || Or<Preds...>::match(MRI, src);
106  }
107 };
108 
109 template <typename... Preds> And<Preds...> m_all_of(Preds &&... preds) {
110  return And<Preds...>(std::forward<Preds>(preds)...);
111 }
112 
113 template <typename... Preds> Or<Preds...> m_any_of(Preds &&... preds) {
114  return Or<Preds...>(std::forward<Preds>(preds)...);
115 }
116 
117 template <typename BindTy> struct bind_helper {
118  static bool bind(const MachineRegisterInfo &MRI, BindTy &VR, BindTy &V) {
119  VR = V;
120  return true;
121  }
122 };
123 
124 template <> struct bind_helper<MachineInstr *> {
125  static bool bind(const MachineRegisterInfo &MRI, MachineInstr *&MI,
126  unsigned Reg) {
127  MI = MRI.getVRegDef(Reg);
128  if (MI)
129  return true;
130  return false;
131  }
132 };
133 
134 template <> struct bind_helper<LLT> {
135  static bool bind(const MachineRegisterInfo &MRI, LLT &Ty, unsigned Reg) {
136  Ty = MRI.getType(Reg);
137  if (Ty.isValid())
138  return true;
139  return false;
140  }
141 };
142 
143 template <> struct bind_helper<const ConstantFP *> {
144  static bool bind(const MachineRegisterInfo &MRI, const ConstantFP *&F,
145  unsigned Reg) {
146  F = getConstantFPVRegVal(Reg, MRI);
147  if (F)
148  return true;
149  return false;
150  }
151 };
152 
153 template <typename Class> struct bind_ty {
154  Class &VR;
155 
156  bind_ty(Class &V) : VR(V) {}
157 
158  template <typename ITy> bool match(const MachineRegisterInfo &MRI, ITy &&V) {
159  return bind_helper<Class>::bind(MRI, VR, V);
160  }
161 };
162 
163 inline bind_ty<Register> m_Reg(Register &R) { return R; }
165 inline bind_ty<LLT> m_Type(LLT &Ty) { return Ty; }
166 
167 // Helper for matching G_FCONSTANT
168 inline bind_ty<const ConstantFP *> m_GFCst(const ConstantFP *&C) { return C; }
169 
170 // General helper for all the binary generic MI such as G_ADD/G_SUB etc
171 template <typename LHS_P, typename RHS_P, unsigned Opcode,
172  bool Commutable = false>
174  LHS_P L;
175  RHS_P R;
176 
177  BinaryOp_match(const LHS_P &LHS, const RHS_P &RHS) : L(LHS), R(RHS) {}
178  template <typename OpTy>
179  bool match(const MachineRegisterInfo &MRI, OpTy &&Op) {
180  MachineInstr *TmpMI;
181  if (mi_match(Op, MRI, m_MInstr(TmpMI))) {
182  if (TmpMI->getOpcode() == Opcode && TmpMI->getNumOperands() == 3) {
183  return (L.match(MRI, TmpMI->getOperand(1).getReg()) &&
184  R.match(MRI, TmpMI->getOperand(2).getReg())) ||
185  (Commutable && (R.match(MRI, TmpMI->getOperand(1).getReg()) &&
186  L.match(MRI, TmpMI->getOperand(2).getReg())));
187  }
188  }
189  return false;
190  }
191 };
192 
193 template <typename LHS, typename RHS>
195 m_GAdd(const LHS &L, const RHS &R) {
197 }
198 
199 template <typename LHS, typename RHS>
201  const RHS &R) {
203 }
204 
205 template <typename LHS, typename RHS>
207 m_GMul(const LHS &L, const RHS &R) {
209 }
210 
211 template <typename LHS, typename RHS>
213 m_GFAdd(const LHS &L, const RHS &R) {
215 }
216 
217 template <typename LHS, typename RHS>
219 m_GFMul(const LHS &L, const RHS &R) {
221 }
222 
223 template <typename LHS, typename RHS>
225 m_GFSub(const LHS &L, const RHS &R) {
227 }
228 
229 template <typename LHS, typename RHS>
231 m_GAnd(const LHS &L, const RHS &R) {
233 }
234 
235 template <typename LHS, typename RHS>
237  const RHS &R) {
239 }
240 
241 // Helper for unary instructions (G_[ZSA]EXT/G_TRUNC) etc
242 template <typename SrcTy, unsigned Opcode> struct UnaryOp_match {
243  SrcTy L;
244 
245  UnaryOp_match(const SrcTy &LHS) : L(LHS) {}
246  template <typename OpTy>
247  bool match(const MachineRegisterInfo &MRI, OpTy &&Op) {
248  MachineInstr *TmpMI;
249  if (mi_match(Op, MRI, m_MInstr(TmpMI))) {
250  if (TmpMI->getOpcode() == Opcode && TmpMI->getNumOperands() == 2) {
251  return L.match(MRI, TmpMI->getOperand(1).getReg());
252  }
253  }
254  return false;
255  }
256 };
257 
258 template <typename SrcTy>
260 m_GAnyExt(const SrcTy &Src) {
262 }
263 
264 template <typename SrcTy>
267 }
268 
269 template <typename SrcTy>
272 }
273 
274 template <typename SrcTy>
277 }
278 
279 template <typename SrcTy>
282 }
283 
284 template <typename SrcTy>
286 m_GBitcast(const SrcTy &Src) {
288 }
289 
290 template <typename SrcTy>
292 m_GPtrToInt(const SrcTy &Src) {
294 }
295 
296 template <typename SrcTy>
298 m_GIntToPtr(const SrcTy &Src) {
300 }
301 
302 template <typename SrcTy>
304 m_GFPTrunc(const SrcTy &Src) {
306 }
307 
308 template <typename SrcTy>
311 }
312 
313 template <typename SrcTy>
316 }
317 
318 template <typename SrcTy>
320  return UnaryOp_match<SrcTy, TargetOpcode::COPY>(std::forward<SrcTy>(Src));
321 }
322 
323 // Helper for checking if a Reg is of specific type.
324 struct CheckType {
326  CheckType(const LLT &Ty) : Ty(Ty) {}
327 
328  bool match(const MachineRegisterInfo &MRI, unsigned Reg) {
329  return MRI.getType(Reg) == Ty;
330  }
331 };
332 
333 inline CheckType m_SpecificType(LLT Ty) { return Ty; }
334 
335 } // namespace GMIPatternMatch
336 } // namespace llvm
337 
338 #endif
uint64_t CallInst * C
BinaryOp_match< LHS, RHS, TargetOpcode::G_FMUL, true > m_GFMul(const LHS &L, const RHS &R)
UnaryOp_match< SrcTy, TargetOpcode::G_INTTOPTR > m_GIntToPtr(const SrcTy &Src)
bool match(const MachineRegisterInfo &MRI, unsigned Reg)
BinaryOp_match(const LHS_P &LHS, const RHS_P &RHS)
bind_ty< MachineInstr * > m_MInstr(MachineInstr *&MI)
UnaryOp_match< SrcTy, TargetOpcode::G_ANYEXT > m_GAnyExt(const SrcTy &Src)
static bool bind(const MachineRegisterInfo &MRI, BindTy &VR, BindTy &V)
This class represents lattice values for constants.
Definition: AllocatorList.h:23
static bool bind(const MachineRegisterInfo &MRI, LLT &Ty, unsigned Reg)
const ConstantFP * getConstantFPVRegVal(unsigned VReg, const MachineRegisterInfo &MRI)
Definition: Utils.cpp:276
bool match(const MachineRegisterInfo &MRI, MachineOperand *MO)
unsigned Reg
UnaryOp_match< SrcTy, TargetOpcode::G_ZEXT > m_GZExt(const SrcTy &Src)
LLT getType(unsigned Reg) const
Get the low-level type of Reg or LLT{} if Reg is not a generic (target independent) virtual register...
bool match(const MachineRegisterInfo &MRI, ITy &&V)
bool mi_match(Reg R, const MachineRegisterInfo &MRI, Pattern &&P)
F(f)
static bool bind(const MachineRegisterInfo &MRI, const ConstantFP *&F, unsigned Reg)
bool match(const MachineRegisterInfo &MRI, MatchSrc &&src)
BinaryOp_match< LHS, RHS, TargetOpcode::G_ADD, true > m_GAdd(const LHS &L, const RHS &R)
Or< Preds... > m_any_of(Preds &&... preds)
Definition: BitVector.h:937
UnaryOp_match< SrcTy, TargetOpcode::G_FPTRUNC > m_GFPTrunc(const SrcTy &Src)
unsigned getNumOperands() const
Retuns the total number of operands.
Definition: MachineInstr.h:414
bool match(const MachineRegisterInfo &MRI, MatchSrc &&src)
unsigned getOpcode() const
Returns the opcode of this MachineInstr.
Definition: MachineInstr.h:411
This file implements a class to represent arbitrary precision integral constant values and operations...
MachineInstr * getVRegDef(unsigned Reg) const
getVRegDef - Return the machine instr that defines the specified virtual register or null if none is ...
Matching combinators.
BinaryOp_match< LHS, RHS, TargetOpcode::G_FSUB, false > m_GFSub(const LHS &L, const RHS &R)
UnaryOp_match< SrcTy, TargetOpcode::COPY > m_Copy(SrcTy &&Src)
And< Preds... > m_all_of(Preds &&... preds)
bool match(const MachineRegisterInfo &MRI, OpTy &&Op)
bool match(const MachineRegisterInfo &MRI, MatchSrc &&src)
UnaryOp_match< SrcTy, TargetOpcode::G_BITCAST > m_GBitcast(const SrcTy &Src)
bind_ty< LLT > m_Type(LLT &Ty)
UnaryOp_match< SrcTy, TargetOpcode::G_FPEXT > m_GFPExt(const SrcTy &Src)
OneUse_match< SubPat > m_OneUse(const SubPat &SP)
#define P(N)
OneUse_match(const SubPatternT &SP)
BinaryOp_match< LHS, RHS, TargetOpcode::G_AND, true > m_GAnd(const LHS &L, const RHS &R)
unsigned const MachineRegisterInfo * MRI
BinaryOp_match< LHS, RHS, TargetOpcode::G_SUB > m_GSub(const LHS &L, const RHS &R)
ConstantFP - Floating Point Values [float, double].
Definition: Constants.h:263
This file declares a class to represent arbitrary precision floating point values and provide a varie...
bool isValid() const
static bool bind(const MachineRegisterInfo &MRI, MachineInstr *&MI, unsigned Reg)
UnaryOp_match< SrcTy, TargetOpcode::G_FNEG > m_GFNeg(const SrcTy &Src)
bool match(const MachineRegisterInfo &MRI, unsigned Reg)
bool match(const MachineRegisterInfo &MRI, unsigned Reg)
MachineOperand class - Representation of each machine instruction operand.
CheckType m_SpecificType(LLT Ty)
Optional< int64_t > getConstantVRegVal(unsigned VReg, const MachineRegisterInfo &MRI)
If VReg is defined by a G_CONSTANT fits in int64_t returns it.
Definition: Utils.cpp:207
UnaryOp_match< SrcTy, TargetOpcode::G_SEXT > m_GSExt(const SrcTy &Src)
UnaryOp_match< SrcTy, TargetOpcode::G_TRUNC > m_GTrunc(const SrcTy &Src)
UnaryOp_match< SrcTy, TargetOpcode::G_FABS > m_GFabs(const SrcTy &Src)
MachineRegisterInfo - Keep track of information for virtual and physical registers, including vreg register classes, use/def chains for registers, etc.
bool match(const MachineRegisterInfo &MRI, MatchSrc &&src)
BinaryOp_match< LHS, RHS, TargetOpcode::G_MUL, true > m_GMul(const LHS &L, const RHS &R)
Representation of each machine instruction.
Definition: MachineInstr.h:64
bool hasOneUse(unsigned RegNo) const
hasOneUse - Return true if there is exactly one instruction using the specified register.
ConstantMatch m_ICst(int64_t &Cst)
bool match(const MachineRegisterInfo &MRI, unsigned Reg)
UnaryOp_match< SrcTy, TargetOpcode::G_PTRTOINT > m_GPtrToInt(const SrcTy &Src)
bind_ty< const ConstantFP * > m_GFCst(const ConstantFP *&C)
BinaryOp_match< LHS, RHS, TargetOpcode::G_FADD, true > m_GFAdd(const LHS &L, const RHS &R)
bool isReg() const
isReg - Tests if this is a MO_Register operand.
aarch64 promote const
operand_type_match m_Reg()
BinaryOp_match< LHS, RHS, TargetOpcode::G_OR, true > m_GOr(const LHS &L, const RHS &R)
IRTranslator LLVM IR MI
bool match(const MachineRegisterInfo &MRI, OpTy &&Op)
Register getReg() const
getReg - Returns the register number.
const MachineOperand & getOperand(unsigned i) const
Definition: MachineInstr.h:416
Wrapper class representing virtual and physical registers.
Definition: Register.h:19