LLVM  16.0.0git
Macros | Functions | Variables
RISCVInsertVSETVLI.cpp File Reference
#include "RISCV.h"
#include "RISCVSubtarget.h"
#include "llvm/CodeGen/LiveIntervals.h"
#include "llvm/CodeGen/MachineFunctionPass.h"
#include <queue>
Include dependency graph for RISCVInsertVSETVLI.cpp:

Go to the source code of this file.

Macros

#define DEBUG_TYPE   "riscv-insert-vsetvli"
 
#define RISCV_INSERT_VSETVLI_NAME   "RISCV Insert VSETVLI pass"
 

Functions

 INITIALIZE_PASS (RISCVInsertVSETVLI, DEBUG_TYPE, RISCV_INSERT_VSETVLI_NAME, false, false) static VSETVLIInfo computeInfoForInstr(const MachineInstr &MI
 
 if (MI.isRegTiedToUseOperand(0, &UseOpIdx))
 
 assert (RISCVVType::isValidSEW(SEW) &&"Unexpected SEW")
 
 if (RISCVII::hasVLOp(TSFlags))
 
 if (std::optional< unsigned > EEW=getEEWForLoadStore(MI))
 
InstrInfo setVTYPE (VLMul, SEW, TailAgnostic, MaskAgnostic)
 
static VSETVLIInfo getInfoForVSETVLI (const MachineInstr &MI)
 
static bool hasFixedResult (const VSETVLIInfo &Info, const RISCVSubtarget &ST)
 Return true if the VL value configured must be equal to the requested one. More...
 
static void doUnion (DemandedFields &A, DemandedFields B)
 
static bool canMutatePriorConfig (const MachineInstr &PrevMI, const MachineInstr &MI, const DemandedFields &Used)
 

Variables

static cl::opt< bool > DisableInsertVSETVLPHIOpt ("riscv-disable-insert-vsetvl-phi-opt", cl::init(false), cl::Hidden, cl::desc("Disable looking through phis when inserting vsetvlis."))
 
static cl::opt< bool > UseStrictAsserts ("riscv-insert-vsetvl-strict-asserts", cl::init(true), cl::Hidden, cl::desc("Enable strict assertion checking for the dataflow algorithm"))
 
uint64_t TSFlags
 
uint64_t const MachineRegisterInfoMRI
 
bool TailAgnostic = true
 
bool MaskAgnostic = true
 
unsigned UseOpIdx
 
 else
 
RISCVII::VLMUL VLMul = RISCVII::getLMul(TSFlags)
 
unsigned Log2SEW = MI.getOperand(getSEWOpNum(MI)).getImm()
 
unsigned SEW = Log2SEW ? 1 << Log2SEW : 8
 
return InstrInfo
 

Macro Definition Documentation

◆ DEBUG_TYPE

#define DEBUG_TYPE   "riscv-insert-vsetvli"

Definition at line 34 of file RISCVInsertVSETVLI.cpp.

◆ RISCV_INSERT_VSETVLI_NAME

#define RISCV_INSERT_VSETVLI_NAME   "RISCV Insert VSETVLI pass"

Definition at line 35 of file RISCVInsertVSETVLI.cpp.

Function Documentation

◆ assert()

assert ( RISCVVType::isValidSEW(SEW) &&"Unexpected SEW )

Referenced by getInfoForVSETVLI(), and if().

◆ canMutatePriorConfig()

static bool canMutatePriorConfig ( const MachineInstr PrevMI,
const MachineInstr MI,
const DemandedFields &  Used 
)
static

◆ doUnion()

static void doUnion ( DemandedFields &  A,
DemandedFields  B 
)
static

Definition at line 1184 of file RISCVInsertVSETVLI.cpp.

References B.

◆ getInfoForVSETVLI()

static VSETVLIInfo getInfoForVSETVLI ( const MachineInstr MI)
static

Definition at line 745 of file RISCVInsertVSETVLI.cpp.

References assert(), and MI.

◆ hasFixedResult()

static bool hasFixedResult ( const VSETVLIInfo &  Info,
const RISCVSubtarget ST 
)
static

Return true if the VL value configured must be equal to the requested one.

Definition at line 1089 of file RISCVInsertVSETVLI.cpp.

References llvm::RISCVVType::decodeVLMUL(), Info, SEW, and llvm::ARM_MB::ST.

◆ if() [1/3]

if ( MI.  isRegTiedToUseOperand0, &UseOpIdx)

◆ if() [2/3]

if ( RISCVII::hasVLOp(TSFlags )

◆ if() [3/3]

if ( std::optional< unsigned >  EEW = getEEWForLoadStore(MI))

Definition at line 664 of file RISCVInsertVSETVLI.cpp.

References assert(), and SEW.

◆ INITIALIZE_PASS()

INITIALIZE_PASS ( RISCVInsertVSETVLI  ,
DEBUG_TYPE  ,
RISCV_INSERT_VSETVLI_NAME  ,
false  ,
false   
) const &

◆ setVTYPE()

InstrInfo setVTYPE ( VLMul  ,
SEW  ,
TailAgnostic  ,
MaskAgnostic   
)

Variable Documentation

◆ DisableInsertVSETVLPHIOpt

cl::opt<bool> DisableInsertVSETVLPHIOpt("riscv-disable-insert-vsetvl-phi-opt", cl::init(false), cl::Hidden, cl::desc("Disable looking through phis when inserting vsetvlis."))
static

◆ else

else
Initial value:
{
assert(!RISCVII::hasVecPolicyOp(TSFlags) && "Unexpected policy operand")

Definition at line 633 of file RISCVInsertVSETVLI.cpp.

◆ InstrInfo

return InstrInfo

Definition at line 670 of file RISCVInsertVSETVLI.cpp.

Referenced by llvm::createLanaiMCCodeEmitter(), llvm::PPCMCCodeEmitter::getDirectBrEncoding(), llvm::XCoreSubtarget::getInstrInfo(), llvm::R600Subtarget::getInstrInfo(), llvm::VESubtarget::getInstrInfo(), llvm::DirectXSubtarget::getInstrInfo(), llvm::ARCSubtarget::getInstrInfo(), llvm::NVPTXSubtarget::getInstrInfo(), llvm::SparcSubtarget::getInstrInfo(), llvm::MSP430Subtarget::getInstrInfo(), llvm::LoongArchSubtarget::getInstrInfo(), llvm::BPFSubtarget::getInstrInfo(), llvm::WebAssemblySubtarget::getInstrInfo(), llvm::SPIRVSubtarget::getInstrInfo(), llvm::SystemZSubtarget::getInstrInfo(), llvm::CSKYSubtarget::getInstrInfo(), llvm::HexagonSubtarget::getInstrInfo(), llvm::X86Subtarget::getInstrInfo(), llvm::RISCVSubtarget::getInstrInfo(), llvm::GCNSubtarget::getInstrInfo(), llvm::MipsSubtarget::getInstrInfo(), llvm::VESubtarget::getRegisterInfo(), llvm::ARCSubtarget::getRegisterInfo(), llvm::XCoreSubtarget::getRegisterInfo(), llvm::R600Subtarget::getRegisterInfo(), llvm::NVPTXSubtarget::getRegisterInfo(), llvm::MSP430Subtarget::getRegisterInfo(), llvm::SparcSubtarget::getRegisterInfo(), llvm::BPFSubtarget::getRegisterInfo(), llvm::SPIRVSubtarget::getRegisterInfo(), llvm::SystemZSubtarget::getRegisterInfo(), llvm::GCNSubtarget::getRegisterInfo(), llvm::MipsSubtarget::getRegisterInfo(), llvm::AMDGPU::getVOPDInstInfo(), if(), llvm::PPCMCCodeEmitter::isPrefixedInstruction(), llvm::PerTargetMIParsingState::parseInstrName(), and llvm::PPCRegisterInfo::requiresFrameIndexScavenging().

◆ Log2SEW

unsigned Log2SEW = MI.getOperand(getSEWOpNum(MI)).getImm()

◆ MaskAgnostic

MaskAgnostic = true

Definition at line 601 of file RISCVInsertVSETVLI.cpp.

Referenced by llvm::RISCVVType::encodeVTYPE(), and if().

◆ MRI

Initial value:
{
VSETVLIInfo InstrInfo

Definition at line 598 of file RISCVInsertVSETVLI.cpp.

Referenced by if().

◆ SEW

unsigned SEW = Log2SEW ? 1 << Log2SEW : 8

◆ TailAgnostic

TailAgnostic = true

Definition at line 601 of file RISCVInsertVSETVLI.cpp.

Referenced by llvm::RISCVVType::encodeVTYPE(), and if().

◆ TSFlags

uint64_t TSFlags

◆ UseOpIdx

unsigned UseOpIdx

◆ UseStrictAsserts

cl::opt<bool> UseStrictAsserts("riscv-insert-vsetvl-strict-asserts", cl::init(true), cl::Hidden, cl::desc("Enable strict assertion checking for the dataflow algorithm"))
static

◆ VLMul

RISCVII::VLMUL VLMul = RISCVII::getLMul(TSFlags)

Definition at line 641 of file RISCVInsertVSETVLI.cpp.

Referenced by llvm::RISCVVType::getSEWLMULRatio().

llvm::RISCVII::hasVecPolicyOp
static bool hasVecPolicyOp(uint64_t TSFlags)
Definition: RISCVBaseInfo.h:159
InstrInfo
return InstrInfo
Definition: RISCVInsertVSETVLI.cpp:670
TSFlags
uint64_t TSFlags
Definition: RISCVInsertVSETVLI.cpp:597
assert
assert(RISCVVType::isValidSEW(SEW) &&"Unexpected SEW")