Go to the source code of this file.
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| STATISTIC (NumInsertedVSETVL, "Number of VSETVL inst inserted") |
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| STATISTIC (NumCoalescedVSETVL, "Number of VSETVL inst coalesced") |
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INITIALIZE_PASS(RISCVInsertVSETVLI, DEBUG_TYPE, RISCV_INSERT_VSETVLI_NAME, false, false) char RISCVCoalesceVSETVLI | INITIALIZE_PASS (RISCVCoalesceVSETVLI, "riscv-coalesce-vsetvli", RISCV_COALESCE_VSETVLI_NAME, false, false) static VSETVLIInfo getInfoForVSETVLI(const MachineInstr &MI |
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| if (MI.getOpcode()==RISCV::PseudoVSETIVLI) |
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| assert ((AVLReg !=RISCV::X0||MI.getOperand(0).getReg() !=RISCV::X0) &&"Can't handle X0, X0 vsetvli yet") |
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| if (AVLReg==RISCV::X0) NewInfo.setAVLVLMAX() |
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else NewInfo | setAVLRegDef (MRI.getVRegDef(AVLReg), AVLReg) |
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NewInfo | setVTYPE (MI.getOperand(2).getImm()) |
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static unsigned | computeVLMAX (unsigned VLEN, unsigned SEW, RISCVII::VLMUL VLMul) |
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static VSETVLIInfo | computeInfoForInstr (const MachineInstr &MI, uint64_t TSFlags, const RISCVSubtarget &ST, const MachineRegisterInfo *MRI) |
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static bool | isLMUL1OrSmaller (RISCVII::VLMUL LMUL) |
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static VSETVLIInfo | adjustIncoming (VSETVLIInfo PrevInfo, VSETVLIInfo NewInfo, DemandedFields &Demanded) |
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static bool | canMutatePriorConfig (const MachineInstr &PrevMI, const MachineInstr &MI, const DemandedFields &Used, const MachineRegisterInfo &MRI) |
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◆ DEBUG_TYPE
#define DEBUG_TYPE "riscv-insert-vsetvli" |
◆ RISCV_COALESCE_VSETVLI_NAME
#define RISCV_COALESCE_VSETVLI_NAME "RISC-V Coalesce VSETVLI pass" |
◆ RISCV_INSERT_VSETVLI_NAME
#define RISCV_INSERT_VSETVLI_NAME "RISC-V Insert VSETVLI pass" |
◆ adjustIncoming()
static VSETVLIInfo adjustIncoming |
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VSETVLIInfo |
PrevInfo, |
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VSETVLIInfo |
NewInfo, |
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DemandedFields & |
Demanded |
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) |
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◆ assert()
assert |
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(AVLReg !=RISCV::X0||MI.getOperand(0).getReg() !=RISCV::X0) &&"Can't handle |
X0, |
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X0 vsetvli yet" |
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) |
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◆ canMutatePriorConfig()
◆ computeInfoForInstr()
Definition at line 906 of file RISCVInsertVSETVLI.cpp.
References assert(), computeVLMAX(), DefMI, llvm::RISCVII::doesForceTailAgnostic(), llvm::MachineOperand::getImm(), llvm::RISCVII::getLMul(), llvm::MachineOperand::getReg(), llvm::RISCVII::hasVecPolicyOp(), llvm::RISCVII::hasVLOp(), llvm::MachineOperand::isImm(), llvm::RISCVVType::isValidSEW(), llvm::RISCVII::MASK_AGNOSTIC, MI, MRI, llvm::RISCVII::TAIL_AGNOSTIC, llvm::RISCVII::usesMaskPolicy(), and llvm::RISCV::VLMaxSentinel.
◆ computeVLMAX()
◆ if() [1/2]
◆ if() [2/2]
if |
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MI. |
getOpcode() = = RISCV::PseudoVSETIVLI | ) |
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◆ INITIALIZE_PASS()
◆ isLMUL1OrSmaller()
◆ setAVLRegDef()
◆ setVTYPE()
NewInfo setVTYPE |
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MI. |
getOperand2).getImm( | ) |
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◆ STATISTIC() [1/2]
STATISTIC |
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NumCoalescedVSETVL |
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"Number of VSETVL inst coalesced" |
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) |
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◆ STATISTIC() [2/2]
STATISTIC |
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NumInsertedVSETVL |
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"Number of VSETVL inst inserted" |
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) |
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◆ AVLReg
◆ DisableInsertVSETVLPHIOpt
cl::opt< bool > DisableInsertVSETVLPHIOpt("riscv-disable-insert-vsetvl-phi-opt", cl::init(false), cl::Hidden, cl::desc("Disable looking through phis when inserting vsetvlis.")) |
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"riscv-disable-insert-vsetvl-phi-opt" |
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cl::init(false) |
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cl::Hidden |
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cl::desc("Disable looking through phis when inserting vsetvlis.") |
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) |
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static |
◆ else
Initial value:{
assert(
MI.getOpcode() == RISCV::PseudoVSETVLI ||
MI.getOpcode() == RISCV::PseudoVSETVLIX0)
assert((AVLReg !=RISCV::X0||MI.getOperand(0).getReg() !=RISCV::X0) &&"Can't handle X0, X0 vsetvli yet")
Definition at line 880 of file RISCVInsertVSETVLI.cpp.
◆ MRI
◆ NewInfo