LLVM 20.0.0git
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#include "HexagonISelLowering.h"
#include "HexagonRegisterInfo.h"
#include "HexagonSubtarget.h"
#include "llvm/ADT/SetVector.h"
#include "llvm/ADT/SmallVector.h"
#include "llvm/Analysis/MemoryLocation.h"
#include "llvm/CodeGen/MachineBasicBlock.h"
#include "llvm/CodeGen/MachineFunction.h"
#include "llvm/CodeGen/MachineInstr.h"
#include "llvm/CodeGen/MachineOperand.h"
#include "llvm/CodeGen/MachineRegisterInfo.h"
#include "llvm/CodeGen/TargetInstrInfo.h"
#include "llvm/IR/IntrinsicsHexagon.h"
#include "llvm/Support/CommandLine.h"
#include <algorithm>
#include <string>
#include <utility>
Go to the source code of this file.
Functions | |
static std::tuple< unsigned, unsigned, unsigned > | getIEEEProperties (MVT Ty) |
Variables | |
static cl::opt< unsigned > | HvxWidenThreshold ("hexagon-hvx-widen", cl::Hidden, cl::init(16), cl::desc("Lower threshold (in bytes) for widening to HVX vectors")) |
static const MVT | LegalV64 [] = { MVT::v64i8, MVT::v32i16, MVT::v16i32 } |
static const MVT | LegalW64 [] = { MVT::v128i8, MVT::v64i16, MVT::v32i32 } |
static const MVT | LegalV128 [] = { MVT::v128i8, MVT::v64i16, MVT::v32i32 } |
static const MVT | LegalW128 [] = { MVT::v256i8, MVT::v128i16, MVT::v64i32 } |
Definition at line 39 of file HexagonISelLoweringHVX.cpp.
References llvm::c_str(), llvm::MVT::getScalarType(), llvm_unreachable, and llvm::MVT::SimpleTy.
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Definition at line 36 of file HexagonISelLoweringHVX.cpp.
Definition at line 34 of file HexagonISelLoweringHVX.cpp.
Definition at line 37 of file HexagonISelLoweringHVX.cpp.
Definition at line 35 of file HexagonISelLoweringHVX.cpp.