LLVM 20.0.0git
Classes | Macros | Functions | Variables
AMDGPUCodeGenPrepare.cpp File Reference

This pass does misc. More...

#include "AMDGPU.h"
#include "AMDGPUTargetMachine.h"
#include "SIModeRegisterDefaults.h"
#include "llvm/Analysis/AssumptionCache.h"
#include "llvm/Analysis/ConstantFolding.h"
#include "llvm/Analysis/TargetLibraryInfo.h"
#include "llvm/Analysis/UniformityAnalysis.h"
#include "llvm/Analysis/ValueTracking.h"
#include "llvm/CodeGen/TargetPassConfig.h"
#include "llvm/IR/Dominators.h"
#include "llvm/IR/IRBuilder.h"
#include "llvm/IR/InstVisitor.h"
#include "llvm/IR/IntrinsicsAMDGPU.h"
#include "llvm/IR/PatternMatch.h"
#include "llvm/InitializePasses.h"
#include "llvm/Pass.h"
#include "llvm/Support/KnownBits.h"
#include "llvm/Transforms/Utils/IntegerDivision.h"
#include "llvm/Transforms/Utils/Local.h"

Go to the source code of this file.

Classes

class  VectorSlice
 Helper class for "break large PHIs" (visitPHINode). More...
 

Macros

#define DEBUG_TYPE   "amdgpu-codegenprepare"
 

Functions

static bool promotedOpIsNSW (const Instruction &I)
 
static bool promotedOpIsNUW (const Instruction &I)
 
static void extractValues (IRBuilder<> &Builder, SmallVectorImpl< Value * > &Values, Value *V)
 
static ValueinsertValues (IRBuilder<> &Builder, Type *Ty, SmallVectorImpl< Value * > &Values)
 
static SelectInstfindSelectThroughCast (Value *V, CastInst *&Cast)
 
static ValueemitRsqIEEE1ULP (IRBuilder<> &Builder, Value *Src, bool IsNegative)
 Emit an expansion of 1.0 / sqrt(Src) good for 1ulp that supports denormals.
 
static std::pair< Value *, Value * > getMul64 (IRBuilder<> &Builder, Value *LHS, Value *RHS)
 
static ValuegetMulHu (IRBuilder<> &Builder, Value *LHS, Value *RHS)
 
static ValuegetSign32 (Value *V, IRBuilder<> &Builder, const DataLayout DL)
 
static bool areInSameBB (const Value *A, const Value *B)
 
static bool isInterestingPHIIncomingValue (const Value *V)
 
static void collectPHINodes (const PHINode &I, SmallPtrSet< const PHINode *, 8 > &SeenPHIs)
 
static bool isPtrKnownNeverNull (const Value *V, const DataLayout &DL, const AMDGPUTargetMachine &TM, unsigned AS)
 
static bool isOneOrNegOne (const Value *Val)
 
 INITIALIZE_PASS_BEGIN (AMDGPUCodeGenPrepare, DEBUG_TYPE, "AMDGPU IR optimizations", false, false) INITIALIZE_PASS_END(AMDGPUCodeGenPrepare
 

Variables

 DEBUG_TYPE
 
AMDGPU IR optimizations
 
AMDGPU IR false
 

Detailed Description

This pass does misc.

AMDGPU optimizations on IR before instruction selection.

Definition in file AMDGPUCodeGenPrepare.cpp.

Macro Definition Documentation

◆ DEBUG_TYPE

#define DEBUG_TYPE   "amdgpu-codegenprepare"

Definition at line 35 of file AMDGPUCodeGenPrepare.cpp.

Function Documentation

◆ areInSameBB()

static bool areInSameBB ( const Value A,
const Value B 
)
static

Definition at line 1750 of file AMDGPUCodeGenPrepare.cpp.

References A, and B.

Referenced by isInterestingPHIIncomingValue().

◆ collectPHINodes()

static void collectPHINodes ( const PHINode I,
SmallPtrSet< const PHINode *, 8 > &  SeenPHIs 
)
static

◆ emitRsqIEEE1ULP()

static Value * emitRsqIEEE1ULP ( IRBuilder<> &  Builder,
Value Src,
bool  IsNegative 
)
static

◆ extractValues()

static void extractValues ( IRBuilder<> &  Builder,
SmallVectorImpl< Value * > &  Values,
Value V 
)
static

◆ findSelectThroughCast()

static SelectInst * findSelectThroughCast ( Value V,
CastInst *&  Cast 
)
static

Definition at line 701 of file AMDGPUCodeGenPrepare.cpp.

References llvm::User::getOperand().

◆ getMul64()

static std::pair< Value *, Value * > getMul64 ( IRBuilder<> &  Builder,
Value LHS,
Value RHS 
)
static

◆ getMulHu()

static Value * getMulHu ( IRBuilder<> &  Builder,
Value LHS,
Value RHS 
)
static

Definition at line 1188 of file AMDGPUCodeGenPrepare.cpp.

References getMul64(), LHS, and RHS.

◆ getSign32()

static Value * getSign32 ( Value V,
IRBuilder<> &  Builder,
const DataLayout  DL 
)
static

◆ INITIALIZE_PASS_BEGIN()

INITIALIZE_PASS_BEGIN ( AMDGPUCodeGenPrepare  ,
DEBUG_TYPE  ,
"AMDGPU IR optimizations"  ,
false  ,
false   
)

◆ insertValues()

static Value * insertValues ( IRBuilder<> &  Builder,
Type Ty,
SmallVectorImpl< Value * > &  Values 
)
static

◆ isInterestingPHIIncomingValue()

static bool isInterestingPHIIncomingValue ( const Value V)
static

◆ isOneOrNegOne()

static bool isOneOrNegOne ( const Value Val)
static

◆ isPtrKnownNeverNull()

static bool isPtrKnownNeverNull ( const Value V,
const DataLayout DL,
const AMDGPUTargetMachine TM,
unsigned  AS 
)
static
Parameters
VValue to check
DLDataLayout
TMTargetMachine (TODO: remove once DL contains nullptr values)
ASTarget Address Space
Returns
true if V cannot be the null value of AS, false otherwise.

Definition at line 2044 of file AMDGPUCodeGenPrepare.cpp.

References assert(), llvm::computeKnownBits(), and DL.

◆ promotedOpIsNSW()

static bool promotedOpIsNSW ( const Instruction I)
static

Definition at line 438 of file AMDGPUCodeGenPrepare.cpp.

References I.

◆ promotedOpIsNUW()

static bool promotedOpIsNUW ( const Instruction I)
static

Definition at line 452 of file AMDGPUCodeGenPrepare.cpp.

References I.

Variable Documentation

◆ DEBUG_TYPE

DEBUG_TYPE

Definition at line 2322 of file AMDGPUCodeGenPrepare.cpp.

◆ false

AMDGPU IR false

Definition at line 2323 of file AMDGPUCodeGenPrepare.cpp.

◆ optimizations

AMDGPU IR optimizations

Definition at line 2322 of file AMDGPUCodeGenPrepare.cpp.