X86AsmBackend.cpp File Reference

#include "MCTargetDesc/X86BaseInfo.h"
#include "MCTargetDesc/X86EncodingOptimization.h"
#include "MCTargetDesc/X86FixupKinds.h"
#include "MCTargetDesc/X86MCAsmInfo.h"
#include "llvm/ADT/StringSwitch.h"
#include "llvm/BinaryFormat/ELF.h"
#include "llvm/BinaryFormat/MachO.h"
#include "llvm/MC/MCAsmBackend.h"
#include "llvm/MC/MCAssembler.h"
#include "llvm/MC/MCCodeEmitter.h"
#include "llvm/MC/MCContext.h"
#include "llvm/MC/MCDwarf.h"
#include "llvm/MC/MCELFObjectWriter.h"
#include "llvm/MC/MCELFStreamer.h"
#include "llvm/MC/MCExpr.h"
#include "llvm/MC/MCInst.h"
#include "llvm/MC/MCInstrInfo.h"
#include "llvm/MC/MCObjectStreamer.h"
#include "llvm/MC/MCObjectWriter.h"
#include "llvm/MC/MCRegisterInfo.h"
#include "llvm/MC/MCSection.h"
#include "llvm/MC/MCSubtargetInfo.h"
#include "llvm/MC/MCValue.h"
#include "llvm/MC/TargetRegistry.h"
#include "llvm/Support/CommandLine.h"
#include "llvm/Support/ErrorHandling.h"
#include "llvm/Support/raw_ostream.h"
#include "llvm/BinaryFormat/ELFRelocs/x86_64.def"
#include "llvm/BinaryFormat/ELFRelocs/i386.def"

Go to the source code of this file.

Namespaces
namespace	CU

Macros
#define	ELF_RELOC(X, Y)   .Case(#X, Y)
#define	ELF_RELOC(X, Y)   .Case(#X, Y)

Functions
static bool	isRelaxableBranch (unsigned Opcode)
static unsigned	getRelaxedOpcodeBranch (unsigned Opcode, bool Is16BitMode=false)
static unsigned	getRelaxedOpcode (const MCInst &MI, bool Is16BitMode)
static X86::CondCode	getCondFromBranch (const MCInst &MI, const MCInstrInfo &MCII)
static X86::SecondMacroFusionInstKind	classifySecondInstInMacroFusion (const MCInst &MI, const MCInstrInfo &MCII)
static bool	isRIPRelative (const MCInst &MI, const MCInstrInfo &MCII)
	Check if the instruction uses RIP relative addressing.
static bool	isPrefix (unsigned Opcode, const MCInstrInfo &MCII)
	Check if the instruction is a prefix.
static bool	isFirstMacroFusibleInst (const MCInst &Inst, const MCInstrInfo &MCII)
	Check if the instruction is valid as the first instruction in macro fusion.
static bool	hasVariantSymbol (const MCInst &MI)
	Check if the instruction has a variant symbol operand.
static bool	mayHaveInterruptDelaySlot (unsigned InstOpcode)
	X86 has certain instructions which enable interrupts exactly one instruction after the instruction which stores to SS.
static unsigned	getFixupKindSize (unsigned Kind)

Variables
constexpr char	GotSymName [] = "_GLOBAL_OFFSET_TABLE_"

Macro Definition Documentation

ELF_RELOC [1/2]

#define ELF_RELOC	(		X,
			Y
	)		.Case(#X, Y)

ELF_RELOC [2/2]

#define ELF_RELOC	(		X,
			Y
	)		.Case(#X, Y)

Function Documentation

classifySecondInstInMacroFusion()

static X86::SecondMacroFusionInstKind classifySecondInstInMacroFusion ( const MCInst &  MI, const MCInstrInfo &  MCII  )

static

Definition at line 244 of file X86AsmBackend.cpp.

References getCondFromBranch(), and MI.

getCondFromBranch()

static X86::CondCode getCondFromBranch ( const MCInst &  MI, const MCInstrInfo &  MCII  )

static

Definition at line 229 of file X86AsmBackend.cpp.

References llvm::X86::COND_INVALID, llvm::MCInstrInfo::get(), and MI.

Referenced by classifySecondInstInMacroFusion().

getFixupKindSize()

static unsigned getFixupKindSize ( unsigned  Kind )

static

Definition at line 622 of file X86AsmBackend.cpp.

References llvm::FK_Data_1, llvm::FK_Data_2, llvm::FK_Data_4, llvm::FK_Data_8, llvm::FK_NONE, llvm::FK_SecRel_1, llvm::FK_SecRel_2, llvm::FK_SecRel_4, llvm::FK_SecRel_8, llvm_unreachable, llvm::X86::reloc_branch_4byte_pcrel, llvm::X86::reloc_global_offset_table, llvm::X86::reloc_riprel_4byte, llvm::X86::reloc_riprel_4byte_movq_load, llvm::X86::reloc_riprel_4byte_movq_load_rex2, llvm::X86::reloc_riprel_4byte_relax, llvm::X86::reloc_riprel_4byte_relax_evex, llvm::X86::reloc_riprel_4byte_relax_rex, llvm::X86::reloc_riprel_4byte_relax_rex2, llvm::X86::reloc_signed_4byte, and llvm::X86::reloc_signed_4byte_relax.

getRelaxedOpcode()

static unsigned getRelaxedOpcode ( const MCInst &  MI, bool  Is16BitMode  )

static

Definition at line 223 of file X86AsmBackend.cpp.

References llvm::X86::getOpcodeForLongImmediateForm(), getRelaxedOpcodeBranch(), isRelaxableBranch(), and MI.

getRelaxedOpcodeBranch()

static unsigned getRelaxedOpcodeBranch ( unsigned  Opcode, bool  Is16BitMode = false  )

static

Definition at line 211 of file X86AsmBackend.cpp.

References llvm_unreachable.

Referenced by getRelaxedOpcode().

hasVariantSymbol()

static bool hasVariantSymbol ( const MCInst &  MI )

static

Check if the instruction has a variant symbol operand.

Definition at line 357 of file X86AsmBackend.cpp.

References llvm::MCExpr::getKind(), MI, and llvm::MCExpr::SymbolRef.

isFirstMacroFusibleInst()

static bool isFirstMacroFusibleInst ( const MCInst &  Inst, const MCInstrInfo &  MCII  )

static

Check if the instruction is valid as the first instruction in macro fusion.

Definition at line 269 of file X86AsmBackend.cpp.

References llvm::X86::classifyFirstOpcodeInMacroFusion(), llvm::MCInst::getOpcode(), and isRIPRelative().

isPrefix()

static bool isPrefix ( unsigned  Opcode, const MCInstrInfo &  MCII  )

static

Check if the instruction is a prefix.

Definition at line 264 of file X86AsmBackend.cpp.

References llvm::MCInstrInfo::get(), llvm::X86II::isPrefix(), and llvm::MCInstrDesc::TSFlags.

Referenced by readPrefixes().

isRelaxableBranch()

static bool isRelaxableBranch ( unsigned  Opcode )

static

Definition at line 207 of file X86AsmBackend.cpp.

Referenced by getRelaxedOpcode().

isRIPRelative()

static bool isRIPRelative ( const MCInst &  MI, const MCInstrInfo &  MCII  )

static

Check if the instruction uses RIP relative addressing.

Definition at line 250 of file X86AsmBackend.cpp.

References llvm::X86::AddrBaseReg, llvm::MCInstrInfo::get(), llvm::X86II::getMemoryOperandNo(), llvm::X86II::getOperandBias(), and MI.

Referenced by isFirstMacroFusibleInst().

mayHaveInterruptDelaySlot()

static bool mayHaveInterruptDelaySlot ( unsigned  InstOpcode )

static

X86 has certain instructions which enable interrupts exactly one instruction after the instruction which stores to SS.

Return true if the given instruction may have such an interrupt delay slot.

Definition at line 372 of file X86AsmBackend.cpp.

Variable Documentation

GotSymName

constexpr char GotSymName[] = "_GLOBAL_OFFSET_TABLE_"

constexpr

Definition at line 654 of file X86AsmBackend.cpp.