LLVM  12.0.0git
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AArch64PostLegalizerCombiner.cpp File Reference
#include "AArch64TargetMachine.h"
#include "llvm/CodeGen/GlobalISel/Combiner.h"
#include "llvm/CodeGen/GlobalISel/CombinerHelper.h"
#include "llvm/CodeGen/GlobalISel/CombinerInfo.h"
#include "llvm/CodeGen/GlobalISel/GISelKnownBits.h"
#include "llvm/CodeGen/GlobalISel/MIPatternMatch.h"
#include "llvm/CodeGen/MachineDominators.h"
#include "llvm/CodeGen/MachineFunctionPass.h"
#include "llvm/CodeGen/TargetPassConfig.h"
#include "llvm/Support/Debug.h"
#include "AArch64GenPostLegalizeGICombiner.inc"
Include dependency graph for AArch64PostLegalizerCombiner.cpp:

Go to the source code of this file.

Classes

struct  ShuffleVectorPseudo
 Represents a pseudo instruction which replaces a G_SHUFFLE_VECTOR. More...
 

Namespaces

 llvm
 This class represents lattice values for constants.
 

Macros

#define DEBUG_TYPE   "aarch64-postlegalizer-combiner"
 
#define AARCH64POSTLEGALIZERCOMBINERHELPER_GENCOMBINERHELPER_DEPS
 
#define AARCH64POSTLEGALIZERCOMBINERHELPER_GENCOMBINERHELPER_H
 
#define AARCH64POSTLEGALIZERCOMBINERHELPER_GENCOMBINERHELPER_CPP
 

Functions

static Optional< int > getSplatIndex (MachineInstr &MI)
 
static bool isREVMask (ArrayRef< int > M, unsigned EltSize, unsigned NumElts, unsigned BlockSize)
 Check if a vector shuffle corresponds to a REV instruction with the specified blocksize. More...
 
static bool isTRNMask (ArrayRef< int > M, unsigned NumElts, unsigned &WhichResult)
 Determines if M is a shuffle vector mask for a TRN of NumElts. More...
 
static Optional< std::pair< bool, uint64_t > > getExtMask (ArrayRef< int > M, unsigned NumElts)
 Check if a G_EXT instruction can handle a shuffle mask M when the vector sources of the shuffle are different. More...
 
static bool isUZPMask (ArrayRef< int > M, unsigned NumElts, unsigned &WhichResult)
 Determines if M is a shuffle vector mask for a UZP of NumElts. More...
 
static bool isZipMask (ArrayRef< int > M, unsigned NumElts, unsigned &WhichResult)
 
static bool matchREV (MachineInstr &MI, MachineRegisterInfo &MRI, ShuffleVectorPseudo &MatchInfo)
 
static bool matchTRN (MachineInstr &MI, MachineRegisterInfo &MRI, ShuffleVectorPseudo &MatchInfo)
 
static bool matchUZP (MachineInstr &MI, MachineRegisterInfo &MRI, ShuffleVectorPseudo &MatchInfo)
 
static bool matchZip (MachineInstr &MI, MachineRegisterInfo &MRI, ShuffleVectorPseudo &MatchInfo)
 
static bool matchDupFromInsertVectorElt (int Lane, MachineInstr &MI, MachineRegisterInfo &MRI, ShuffleVectorPseudo &MatchInfo)
 Helper function for matchDup. More...
 
static bool matchDupFromBuildVector (int Lane, MachineInstr &MI, MachineRegisterInfo &MRI, ShuffleVectorPseudo &MatchInfo)
 Helper function for matchDup. More...
 
static bool matchDup (MachineInstr &MI, MachineRegisterInfo &MRI, ShuffleVectorPseudo &MatchInfo)
 
static bool matchEXT (MachineInstr &MI, MachineRegisterInfo &MRI, ShuffleVectorPseudo &MatchInfo)
 
static bool applyShuffleVectorPseudo (MachineInstr &MI, ShuffleVectorPseudo &MatchInfo)
 Replace a G_SHUFFLE_VECTOR instruction with a pseudo. More...
 
static bool applyEXT (MachineInstr &MI, ShuffleVectorPseudo &MatchInfo)
 Replace a G_SHUFFLE_VECTOR instruction with G_EXT. More...
 
 INITIALIZE_PASS_BEGIN (AArch64PostLegalizerCombiner, DEBUG_TYPE, "Combine AArch64 MachineInstrs after legalization", false, false) INITIALIZE_PASS_END(AArch64PostLegalizerCombiner
 
FunctionPassllvm::createAArch64PostLegalizeCombiner (bool IsOptNone)
 

Variables

 DEBUG_TYPE
 
Combine AArch64 MachineInstrs after legalization
 
Combine AArch64 MachineInstrs after false
 

Macro Definition Documentation

◆ AARCH64POSTLEGALIZERCOMBINERHELPER_GENCOMBINERHELPER_CPP

#define AARCH64POSTLEGALIZERCOMBINERHELPER_GENCOMBINERHELPER_CPP

Definition at line 433 of file AArch64PostLegalizerCombiner.cpp.

◆ AARCH64POSTLEGALIZERCOMBINERHELPER_GENCOMBINERHELPER_DEPS

#define AARCH64POSTLEGALIZERCOMBINERHELPER_GENCOMBINERHELPER_DEPS

Definition at line 393 of file AArch64PostLegalizerCombiner.cpp.

◆ AARCH64POSTLEGALIZERCOMBINERHELPER_GENCOMBINERHELPER_H

#define AARCH64POSTLEGALIZERCOMBINERHELPER_GENCOMBINERHELPER_H

Definition at line 398 of file AArch64PostLegalizerCombiner.cpp.

◆ DEBUG_TYPE

#define DEBUG_TYPE   "aarch64-postlegalizer-combiner"

Definition at line 28 of file AArch64PostLegalizerCombiner.cpp.

Function Documentation

◆ applyEXT()

static bool applyEXT ( MachineInstr MI,
ShuffleVectorPseudo MatchInfo 
)
static

Replace a G_SHUFFLE_VECTOR instruction with G_EXT.

Special-cased because the constant operand must be emitted as a G_CONSTANT for the imported tablegen patterns to work.

Definition at line 382 of file AArch64PostLegalizerCombiner.cpp.

References llvm::MachineIRBuilder::buildConstant(), llvm::MachineIRBuilder::buildInstr(), llvm::MachineInstr::eraseFromParent(), ShuffleVectorPseudo::Opc, llvm::LLT::scalar(), and ShuffleVectorPseudo::SrcOps.

◆ applyShuffleVectorPseudo()

static bool applyShuffleVectorPseudo ( MachineInstr MI,
ShuffleVectorPseudo MatchInfo 
)
static

Replace a G_SHUFFLE_VECTOR instruction with a pseudo.

Opc is the opcode to use. MI is the G_SHUFFLE_VECTOR.

Definition at line 371 of file AArch64PostLegalizerCombiner.cpp.

References llvm::MachineIRBuilder::buildInstr(), llvm::MachineInstr::eraseFromParent(), ShuffleVectorPseudo::Opc, and ShuffleVectorPseudo::SrcOps.

◆ getExtMask()

static Optional<std::pair<bool, uint64_t> > getExtMask ( ArrayRef< int >  M,
unsigned  NumElts 
)
static

Check if a G_EXT instruction can handle a shuffle mask M when the vector sources of the shuffle are different.

Definition at line 116 of file AArch64PostLegalizerCombiner.cpp.

References llvm::any_of(), llvm::ArrayRef< T >::end(), llvm::find_if(), llvm::APInt::getZExtValue(), llvm::APInt::logBase2(), llvm::make_range(), and llvm::None.

Referenced by matchEXT().

◆ getSplatIndex()

static Optional<int> getSplatIndex ( MachineInstr MI)
static
Returns
The splat index of a G_SHUFFLE_VECTOR MI when MI is a splat. If MI is not a splat, returns None.

Definition at line 48 of file AArch64PostLegalizerCombiner.cpp.

References llvm::any_of(), assert(), llvm::find_if(), llvm::MachineInstr::getOpcode(), llvm::MachineInstr::getOperand(), llvm::MachineOperand::getShuffleMask(), llvm::make_range(), llvm::BitmaskEnumDetail::Mask(), and llvm::None.

◆ INITIALIZE_PASS_BEGIN()

INITIALIZE_PASS_BEGIN ( AArch64PostLegalizerCombiner  ,
DEBUG_TYPE  ,
"Combine AArch64 MachineInstrs after legalization ,
false  ,
false   
)

◆ isREVMask()

static bool isREVMask ( ArrayRef< int >  M,
unsigned  EltSize,
unsigned  NumElts,
unsigned  BlockSize 
)
static

Check if a vector shuffle corresponds to a REV instruction with the specified blocksize.

Definition at line 71 of file AArch64PostLegalizerCombiner.cpp.

References assert().

Referenced by matchREV().

◆ isTRNMask()

static bool isTRNMask ( ArrayRef< int >  M,
unsigned  NumElts,
unsigned WhichResult 
)
static

Determines if M is a shuffle vector mask for a TRN of NumElts.

Whether or not G_TRN1 or G_TRN2 should be used is stored in WhichResult.

Definition at line 100 of file AArch64PostLegalizerCombiner.cpp.

Referenced by matchTRN().

◆ isUZPMask()

static bool isUZPMask ( ArrayRef< int >  M,
unsigned  NumElts,
unsigned WhichResult 
)
static

Determines if M is a shuffle vector mask for a UZP of NumElts.

Whether or not G_UZP1 or G_UZP2 should be used is stored in WhichResult.

Definition at line 158 of file AArch64PostLegalizerCombiner.cpp.

Referenced by matchUZP().

◆ isZipMask()

static bool isZipMask ( ArrayRef< int >  M,
unsigned  NumElts,
unsigned WhichResult 
)
static
Returns
true if M is a zip mask for a shuffle vector of NumElts. Whether or not G_ZIP1 or G_ZIP2 should be used is stored in WhichResult.

Definition at line 173 of file AArch64PostLegalizerCombiner.cpp.

Referenced by matchZip().

◆ matchDup()

static bool matchDup ( MachineInstr MI,
MachineRegisterInfo MRI,
ShuffleVectorPseudo MatchInfo 
)
static

◆ matchDupFromBuildVector()

static bool matchDupFromBuildVector ( int  Lane,
MachineInstr MI,
MachineRegisterInfo MRI,
ShuffleVectorPseudo MatchInfo 
)
static

Helper function for matchDup.

Definition at line 315 of file AArch64PostLegalizerCombiner.cpp.

References assert(), llvm::getOpcodeDef(), llvm::MachineInstr::getOperand(), llvm::MachineOperand::getReg(), MRI, and Reg.

Referenced by matchDup().

◆ matchDupFromInsertVectorElt()

static bool matchDupFromInsertVectorElt ( int  Lane,
MachineInstr MI,
MachineRegisterInfo MRI,
ShuffleVectorPseudo MatchInfo 
)
static

◆ matchEXT()

static bool matchEXT ( MachineInstr MI,
MachineRegisterInfo MRI,
ShuffleVectorPseudo MatchInfo 
)
static

◆ matchREV()

static bool matchREV ( MachineInstr MI,
MachineRegisterInfo MRI,
ShuffleVectorPseudo MatchInfo 
)
static
Returns
true if a G_SHUFFLE_VECTOR instruction MI can be replaced with a G_REV instruction. Returns the appropriate G_REV opcode in Opc.

Definition at line 192 of file AArch64PostLegalizerCombiner.cpp.

References assert(), llvm::LLT::getNumElements(), llvm::MachineInstr::getOpcode(), llvm::MachineInstr::getOperand(), llvm::MachineOperand::getReg(), llvm::LLT::getScalarSizeInBits(), llvm::MachineOperand::getShuffleMask(), llvm::MachineRegisterInfo::getType(), and isREVMask().

◆ matchTRN()

static bool matchTRN ( MachineInstr MI,
MachineRegisterInfo MRI,
ShuffleVectorPseudo MatchInfo 
)
static

◆ matchUZP()

static bool matchUZP ( MachineInstr MI,
MachineRegisterInfo MRI,
ShuffleVectorPseudo MatchInfo 
)
static
Returns
true if a G_SHUFFLE_VECTOR instruction MI can be replaced with a G_UZP1 or G_UZP2 instruction.
Parameters
[in]MI- The shuffle vector instruction.
[out]MatchInfo- Either G_UZP1 or G_UZP2 on success.

Definition at line 242 of file AArch64PostLegalizerCombiner.cpp.

References assert(), llvm::LLT::getNumElements(), llvm::MachineInstr::getOpcode(), llvm::MachineInstr::getOperand(), llvm::MachineOperand::getReg(), llvm::MachineOperand::getShuffleMask(), llvm::MachineRegisterInfo::getType(), isUZPMask(), and llvm::NVPTX::PTXLdStInstCode::V2.

◆ matchZip()

static bool matchZip ( MachineInstr MI,
MachineRegisterInfo MRI,
ShuffleVectorPseudo MatchInfo 
)
static

Variable Documentation

◆ DEBUG_TYPE

DEBUG_TYPE

Definition at line 499 of file AArch64PostLegalizerCombiner.cpp.

◆ false

Combine AArch64 MachineInstrs after false

Definition at line 499 of file AArch64PostLegalizerCombiner.cpp.

◆ legalization

Combine AArch64 MachineInstrs after legalization

Definition at line 499 of file AArch64PostLegalizerCombiner.cpp.