#include "llvm/CodeGen/MachinePipeliner.h"
#include "llvm/ADT/ArrayRef.h"
#include "llvm/ADT/BitVector.h"
#include "llvm/ADT/DenseMap.h"
#include "llvm/ADT/PriorityQueue.h"
#include "llvm/ADT/STLExtras.h"
#include "llvm/ADT/SetOperations.h"
#include "llvm/ADT/SetVector.h"
#include "llvm/ADT/SmallPtrSet.h"
#include "llvm/ADT/SmallSet.h"
#include "llvm/ADT/SmallVector.h"
#include "llvm/ADT/Statistic.h"
#include "llvm/ADT/iterator_range.h"
#include "llvm/Analysis/AliasAnalysis.h"
#include "llvm/Analysis/MemoryLocation.h"
#include "llvm/Analysis/OptimizationRemarkEmitter.h"
#include "llvm/Analysis/ValueTracking.h"
#include "llvm/CodeGen/DFAPacketizer.h"
#include "llvm/CodeGen/LiveIntervals.h"
#include "llvm/CodeGen/MachineBasicBlock.h"
#include "llvm/CodeGen/MachineDominators.h"
#include "llvm/CodeGen/MachineFunction.h"
#include "llvm/CodeGen/MachineFunctionPass.h"
#include "llvm/CodeGen/MachineInstr.h"
#include "llvm/CodeGen/MachineInstrBuilder.h"
#include "llvm/CodeGen/MachineLoopInfo.h"
#include "llvm/CodeGen/MachineMemOperand.h"
#include "llvm/CodeGen/MachineOperand.h"
#include "llvm/CodeGen/MachineRegisterInfo.h"
#include "llvm/CodeGen/ModuloSchedule.h"
#include "llvm/CodeGen/Register.h"
#include "llvm/CodeGen/RegisterClassInfo.h"
#include "llvm/CodeGen/RegisterPressure.h"
#include "llvm/CodeGen/ScheduleDAG.h"
#include "llvm/CodeGen/ScheduleDAGMutation.h"
#include "llvm/CodeGen/TargetInstrInfo.h"
#include "llvm/CodeGen/TargetOpcodes.h"
#include "llvm/CodeGen/TargetPassConfig.h"
#include "llvm/CodeGen/TargetRegisterInfo.h"
#include "llvm/CodeGen/TargetSubtargetInfo.h"
#include "llvm/Config/llvm-config.h"
#include "llvm/IR/Attributes.h"
#include "llvm/IR/Function.h"
#include "llvm/MC/LaneBitmask.h"
#include "llvm/MC/MCInstrDesc.h"
#include "llvm/MC/MCInstrItineraries.h"
#include "llvm/Pass.h"
#include "llvm/Support/CommandLine.h"
#include "llvm/Support/Compiler.h"
#include "llvm/Support/Debug.h"
#include "llvm/Support/raw_ostream.h"
#include <algorithm>
#include <cassert>
#include <climits>
#include <cstdint>
#include <deque>
#include <functional>
#include <iomanip>
#include <iterator>
#include <map>
#include <memory>
#include <sstream>
#include <tuple>
#include <utility>
#include <vector>

Classes
struct	false::SUnitWithMemInfo
	This class holds an SUnit corresponding to a memory operation and other information related to the instruction. More...
class	false::LoopCarriedOrderDepsTracker
	Add loop-carried chain dependencies. More...

Namespaces
namespace	llvm
	This is an optimization pass for GlobalISel generic memory operations.
namespace	false

Macros
#define	DEBUG_TYPE "pipeliner"

Functions
	STATISTIC (NumTrytoPipeline, "Number of loops that we attempt to pipeline")
	STATISTIC (NumPipelined, "Number of loops software pipelined")
	STATISTIC (NumNodeOrderIssues, "Number of node order issues found")
	STATISTIC (NumFailBranch, "Pipeliner abort due to unknown branch")
	STATISTIC (NumFailLoop, "Pipeliner abort due to unsupported loop")
	STATISTIC (NumFailPreheader, "Pipeliner abort due to missing preheader")
	STATISTIC (NumFailLargeMaxMII, "Pipeliner abort due to MaxMII too large")
	STATISTIC (NumFailZeroMII, "Pipeliner abort due to zero MII")
	STATISTIC (NumFailNoSchedule, "Pipeliner abort due to no schedule found")
	STATISTIC (NumFailZeroStage, "Pipeliner abort due to zero stage")
	STATISTIC (NumFailLargeMaxStage, "Pipeliner abort due to too many stages")
cl::opt< bool >	llvm::SwpEnableCopyToPhi ("pipeliner-enable-copytophi", cl::ReallyHidden, cl::init(true), cl::desc("Enable CopyToPhi DAG Mutation"))
cl::opt< int >	llvm::SwpForceIssueWidth ("pipeliner-force-issue-width", cl::desc("Force pipeliner to use specified issue width."), cl::Hidden, cl::init(-1))
	A command line argument to force pipeliner to use specified issue width.
	INITIALIZE_PASS_BEGIN (MachinePipeliner, DEBUG_TYPE, "Modulo Software Pipelining", false, false) INITIALIZE_PASS_END(MachinePipeliner
static void	getPhiRegs (MachineInstr &Phi, MachineBasicBlock *Loop, Register &InitVal, Register &LoopVal)
	Return the register values for the operands of a Phi instruction.
static Register	getLoopPhiReg (const MachineInstr &Phi, const MachineBasicBlock *LoopBB)
	Return the Phi register value that comes the loop block.
static bool	isSuccOrder (SUnit SUa, SUnit SUb)
	Return true if SUb can be reached from SUa following the chain edges.
static bool	hasLoopCarriedMemDep (const SUnitWithMemInfo &Src, const SUnitWithMemInfo &Dst, BatchAAResults &BAA, const TargetInstrInfo TII, const TargetRegisterInfo TRI, const SwingSchedulerDAG *SSD, bool PerformCheapCheck)
	Returns true if there is a loop-carried order dependency from `Src` to `Dst`.
static void	computeScheduledInsts (const SwingSchedulerDAG SSD, SMSchedule &Schedule, std::vector< MachineInstr > &OrderedInsts, DenseMap< MachineInstr *, unsigned > &Stages)
	Create an instruction stream that represents a single iteration and stage of each instruction.
static bool	pred_L (SetVector< SUnit * > &NodeOrder, SmallSetVector< SUnit , 8 > &Preds, SwingSchedulerDDG DDG, const NodeSet *S=nullptr)
	Compute the Pred_L(O) set, as defined in the paper.
static bool	succ_L (SetVector< SUnit * > &NodeOrder, SmallSetVector< SUnit , 8 > &Succs, SwingSchedulerDDG DDG, const NodeSet *S=nullptr)
	Compute the Succ_L(O) set, as defined in the paper.
static bool	computePath (SUnit Cur, SetVector< SUnit > &Path, SetVector< SUnit * > &DestNodes, SetVector< SUnit * > &Exclude, SmallPtrSet< SUnit , 8 > &Visited, SwingSchedulerDDG DDG)
	Return true if there is a path from the specified node to any of the nodes in DestNodes.
static void	computeLiveOuts (MachineFunction &MF, RegPressureTracker &RPTracker, NodeSet &NS)
	Compute the live-out registers for the instructions in a node-set.
static bool	isIntersect (SmallSetVector< SUnit , 8 > &Set1, const NodeSet &Set2, SmallSetVector< SUnit , 8 > &Result)
	Return true if Set1 contains elements in Set2.
static Register	findUniqueOperandDefinedInLoop (const MachineInstr &MI)
static bool	findLoopIncrementValue (const MachineOperand &Op, int &Value)
	When Op is a value that is incremented recursively in a loop and there is a unique instruction that increments it, returns true and sets Value.
static SUnit *	multipleIterations (SUnit SU, SwingSchedulerDAG DAG)
	If an instruction has a use that spans multiple iterations, then return true.

Variables
static cl::opt< bool >	EnableSWP ("enable-pipeliner", cl::Hidden, cl::init(true), cl::desc("Enable Software Pipelining"))
	A command line option to turn software pipelining on or off.
static cl::opt< bool >	EnableSWPOptSize ("enable-pipeliner-opt-size", cl::desc("Enable SWP at Os."), cl::Hidden, cl::init(false))
	A command line option to enable SWP at -Os.
static cl::opt< int >	SwpMaxMii ("pipeliner-max-mii", cl::desc("Size limit for the MII."), cl::Hidden, cl::init(27))
	A command line argument to limit minimum initial interval for pipelining.
static cl::opt< int >	SwpForceII ("pipeliner-force-ii", cl::desc("Force pipeliner to use specified II."), cl::Hidden, cl::init(-1))
	A command line argument to force pipeliner to use specified initial interval.
static cl::opt< int >	SwpMaxStages ("pipeliner-max-stages", cl::desc("Maximum stages allowed in the generated scheduled."), cl::Hidden, cl::init(3))
	A command line argument to limit the number of stages in the pipeline.
static cl::opt< bool >	SwpPruneDeps ("pipeliner-prune-deps", cl::desc("Prune dependences between unrelated Phi nodes."), cl::Hidden, cl::init(true))
	A command line option to disable the pruning of chain dependences due to an unrelated Phi.
static cl::opt< bool >	SwpPruneLoopCarried ("pipeliner-prune-loop-carried", cl::desc("Prune loop carried order dependences."), cl::Hidden, cl::init(true))
	A command line option to disable the pruning of loop carried order dependences.
static cl::opt< int >	SwpLoopLimit ("pipeliner-max", cl::Hidden, cl::init(-1))
static cl::opt< bool >	SwpIgnoreRecMII ("pipeliner-ignore-recmii", cl::ReallyHidden, cl::desc("Ignore RecMII"))
static cl::opt< bool >	SwpShowResMask ("pipeliner-show-mask", cl::Hidden, cl::init(false))
static cl::opt< bool >	SwpDebugResource ("pipeliner-dbg-res", cl::Hidden, cl::init(false))
static cl::opt< bool >	EmitTestAnnotations ("pipeliner-annotate-for-testing", cl::Hidden, cl::init(false), cl::desc("Instead of emitting the pipelined code, annotate instructions " "with the generated schedule for feeding into the " "-modulo-schedule-test pass"))
static cl::opt< bool >	ExperimentalCodeGen ("pipeliner-experimental-cg", cl::Hidden, cl::init(false), cl::desc("Use the experimental peeling code generator for software pipelining"))
static cl::opt< int >	SwpIISearchRange ("pipeliner-ii-search-range", cl::desc("Range to search for II"), cl::Hidden, cl::init(10))
static cl::opt< bool >	LimitRegPressure ("pipeliner-register-pressure", cl::Hidden, cl::init(false), cl::desc("Limit register pressure of scheduled loop"))
static cl::opt< int >	RegPressureMargin ("pipeliner-register-pressure-margin", cl::Hidden, cl::init(5), cl::desc("Margin representing the unused percentage of " "the register pressure limit"))
static cl::opt< bool >	MVECodeGen ("pipeliner-mve-cg", cl::Hidden, cl::init(false), cl::desc("Use the MVE code generator for software pipelining"))
static cl::opt< WindowSchedulingFlag >	llvm::WindowSchedulingOption ("window-sched", cl::Hidden, cl::init(WindowSchedulingFlag::WS_On), cl::desc("Set how to use window scheduling algorithm."), cl::values(clEnumValN(WindowSchedulingFlag::WS_Off, "off", "Turn off window algorithm."), clEnumValN(WindowSchedulingFlag::WS_On, "on", "Use window algorithm after SMS algorithm fails."), clEnumValN(WindowSchedulingFlag::WS_Force, "force", "Use window algorithm instead of SMS algorithm.")))
	A command line argument to set the window scheduling option.
	DEBUG_TYPE
Modulo Software	Pipelining
Modulo Software	false

Macro Definition Documentation

◆ DEBUG_TYPE

#define DEBUG_TYPE "pipeliner"

Definition at line 100 of file MachinePipeliner.cpp.

Function Documentation

◆ computeLiveOuts()

void computeLiveOuts	(	MachineFunction &	MF,
		RegPressureTracker &	RPTracker,
		NodeSet &	NS )

static

Compute the live-out registers for the instructions in a node-set.

The live-out registers are those that are defined in the node-set, but not used. Except for use operands of Phis.

Definition at line 2211 of file MachinePipeliner.cpp.

References llvm::RegPressureTracker::addLiveRegs(), llvm::MachineInstr::all_defs(), llvm::SmallVectorImpl< T >::emplace_back(), llvm::SUnit::getInstr(), llvm::LaneBitmask::getNone(), llvm::MachineFunction::getRegInfo(), llvm::TargetSubtargetInfo::getRegisterInfo(), llvm::MachineFunction::getSubtarget(), MI, MRI, Reg, TRI, and Uses.

◆ computePath()

bool computePath	(	SUnit *	Cur,
		SetVector< SUnit * > &	Path,
		SetVector< SUnit * > &	DestNodes,
		SetVector< SUnit * > &	Exclude,
		SmallPtrSet< SUnit *, 8 > &	Visited,
		SwingSchedulerDDG *	DDG )

static

Return true if there is a path from the specified node to any of the nodes in DestNodes.

Keep track and return the nodes in any path.

Definition at line 2181 of file MachinePipeliner.cpp.

References computePath(), llvm::SetVector< T, Vector, Set, N >::contains(), llvm::SwingSchedulerDDG::getInEdges(), llvm::SwingSchedulerDDG::getOutEdges(), llvm::SmallPtrSetImpl< PtrType >::insert(), and llvm::SUnit::isBoundaryNode().

Referenced by computePath().

◆ computeScheduledInsts()

void computeScheduledInsts	(	const SwingSchedulerDAG *	SSD,
		SMSchedule &	Schedule,
		std::vector< MachineInstr * > &	OrderedInsts,
		DenseMap< MachineInstr *, unsigned > &	Stages )

static

Create an instruction stream that represents a single iteration and stage of each instruction.

This function differs from SMSchedule::finalizeSchedule in that this doesn't have any side-effect to SwingSchedulerDAG. That is, this function is an approximation of SMSchedule::finalizeSchedule with all non-const operations removed.

Definition at line 1312 of file MachinePipeliner.cpp.

References llvm::SMSchedule::getFinalCycle(), llvm::SMSchedule::getFirstCycle(), llvm::SMSchedule::getInitiationInterval(), llvm::SUnit::getInstr(), llvm::SMSchedule::getInstructions(), llvm::SMSchedule::getMaxStageCount(), MI, llvm::SMSchedule::reorderInstructions(), llvm::reverse(), and llvm::SMSchedule::stageScheduled().

◆ findLoopIncrementValue()

bool findLoopIncrementValue	(	const MachineOperand &	Op,
		int &	Value )

static

When Op is a value that is incremented recursively in a loop and there is a unique instruction that increments it, returns true and sets Value.

Definition at line 2777 of file MachinePipeliner.cpp.

References findUniqueOperandDefinedInLoop(), llvm::TargetSubtargetInfo::getInstrInfo(), getLoopPhiReg(), llvm::MachineBasicBlock::getParent(), llvm::MachineOperand::getReg(), llvm::MachineFunction::getRegInfo(), llvm::TargetSubtargetInfo::getRegisterInfo(), llvm::MachineFunction::getSubtarget(), llvm::Register::isValid(), llvm::Register::isVirtual(), MRI, llvm::Offset, TII, and TRI.

◆ findUniqueOperandDefinedInLoop()

Register findUniqueOperandDefinedInLoop ( const MachineInstr & MI )

static

Definition at line 2759 of file MachinePipeliner.cpp.

References MI, MRI, Reg, and Register.

Referenced by findLoopIncrementValue().

◆ getLoopPhiReg()

Register getLoopPhiReg	(	const MachineInstr &	Phi,
		const MachineBasicBlock *	LoopBB )

static

Return the Phi register value that comes the loop block.

Definition at line 897 of file MachinePipeliner.cpp.

References Register.

Referenced by findLoopIncrementValue(), and llvm::SMSchedule::isLoopCarriedDefOfUse().

◆ getPhiRegs()

void getPhiRegs	(	MachineInstr &	Phi,
		MachineBasicBlock *	Loop,
		Register &	InitVal,
		Register &	LoopVal )

static

Return the register values for the operands of a Phi instruction.

This function assume the instruction is a Phi.

Definition at line 881 of file MachinePipeliner.cpp.

References assert(), and Register.

Referenced by llvm::ModuloScheduleExpanderMVE::canApply(), getLoopPhiUser(), llvm::SMSchedule::isLoopCarried(), and llvm::SwingSchedulerDAG::mayOverlapInLaterIter().

◆ hasLoopCarriedMemDep()

bool hasLoopCarriedMemDep	(	const SUnitWithMemInfo &	Src,
		const SUnitWithMemInfo &	Dst,
		BatchAAResults &	BAA,
		const TargetInstrInfo *	TII,
		const TargetRegisterInfo *	TRI,
		const SwingSchedulerDAG *	SSD,
		bool	PerformCheapCheck )

static

Returns true if there is a loop-carried order dependency from Src to Dst.

Definition at line 973 of file MachinePipeliner.cpp.

References assert(), llvm::MemoryLocation::getBeforeOrAfter(), llvm::MachineOperand::isIdenticalTo(), llvm::BatchAAResults::isNoAlias(), isSuccOrder(), llvm::SwingSchedulerDAG::mayOverlapInLaterIter(), TII, and TRI.

◆ INITIALIZE_PASS_BEGIN()

INITIALIZE_PASS_BEGIN	(	MachinePipeliner	,
		DEBUG_TYPE	,
		"Modulo Software Pipelining"	,
		false	,
		false	)

References DEBUG_TYPE, and INITIALIZE_PASS_DEPENDENCY.

◆ isIntersect()

bool isIntersect	(	SmallSetVector< SUnit *, 8 > &	Set1,
		const NodeSet &	Set2,
		SmallSetVector< SUnit *, 8 > &	Result )

static

Return true if Set1 contains elements in Set2.

The elements in common are returned in a different container.

Definition at line 2418 of file MachinePipeliner.cpp.

References llvm::NodeSet::count().

◆ isSuccOrder()

bool isSuccOrder	(	SUnit *	SUa,
		SUnit *	SUb )

static

Return true if SUb can be reached from SUa following the chain edges.

Definition at line 906 of file MachinePipeliner.cpp.

References llvm::SmallPtrSetImpl< PtrType >::count(), llvm::SmallVectorTemplateCommon< T, typename >::empty(), llvm::SmallPtrSetImpl< PtrType >::insert(), llvm::SDep::Order, llvm::SmallVectorImpl< T >::pop_back_val(), llvm::SmallVectorTemplateBase< T, bool >::push_back(), and llvm::SUnit::Succs.

Referenced by hasLoopCarriedMemDep(), and llvm::LoopCarriedEdges::modifySUnits().

◆ multipleIterations()

SUnit * multipleIterations	(	SUnit *	SU,
		SwingSchedulerDAG *	DAG )

static

If an instruction has a use that spans multiple iterations, then return true.

These instructions are characterized by having a back-ege to a Phi, which contains a reference to another Phi.

Definition at line 3217 of file MachinePipeliner.cpp.

References llvm::SDep::Anti, llvm::SDep::Data, P, and llvm::SUnit::Preds.

Referenced by llvm::SMSchedule::computeStart().

◆ pred_L()

bool pred_L	(	SetVector< SUnit * > &	NodeOrder,
		SmallSetVector< SUnit *, 8 > &	Preds,
		SwingSchedulerDDG *	DDG,
		const NodeSet *	S = nullptr )

static

Compute the Pred_L(O) set, as defined in the paper.

The set is defined as the predecessors of the elements of NodeOrder that are not also in NodeOrder.

Definition at line 2110 of file MachinePipeliner.cpp.

References llvm::SetVector< T, Vector, Set, N >::clear(), llvm::SetVector< T, Vector, Set, N >::empty(), llvm::SwingSchedulerDDG::getInEdges(), llvm::SwingSchedulerDDG::getOutEdges(), llvm::SetVector< T, Vector, Set, N >::insert(), and llvm::NodeOrder.

◆ STATISTIC() [1/11]

STATISTIC	(	NumFailBranch	,
		"Pipeliner abort due to unknown branch"	)

◆ STATISTIC() [2/11]

STATISTIC	(	NumFailLargeMaxMII	,
		"Pipeliner abort due to MaxMII too large"	)

◆ STATISTIC() [3/11]

STATISTIC	(	NumFailLargeMaxStage	,
		"Pipeliner abort due to too many stages"	)

◆ STATISTIC() [4/11]

STATISTIC	(	NumFailLoop	,
		"Pipeliner abort due to unsupported loop"	)

◆ STATISTIC() [5/11]

STATISTIC	(	NumFailNoSchedule	,
		"Pipeliner abort due to no schedule found"	)

◆ STATISTIC() [6/11]

STATISTIC	(	NumFailPreheader	,
		"Pipeliner abort due to missing preheader"	)

◆ STATISTIC() [7/11]

STATISTIC	(	NumFailZeroMII	,
		"Pipeliner abort due to zero MII"	)

◆ STATISTIC() [8/11]

STATISTIC	(	NumFailZeroStage	,
		"Pipeliner abort due to zero stage"	)

◆ STATISTIC() [9/11]

STATISTIC	(	NumNodeOrderIssues	,
		"Number of node order issues found"	)

◆ STATISTIC() [10/11]

STATISTIC	(	NumPipelined	,
		"Number of loops software pipelined"	)

◆ STATISTIC() [11/11]

STATISTIC	(	NumTrytoPipeline	,
		"Number of loops that we attempt to pipeline"	)

◆ succ_L()

bool succ_L	(	SetVector< SUnit * > &	NodeOrder,
		SmallSetVector< SUnit *, 8 > &	Succs,
		SwingSchedulerDDG *	DDG,
		const NodeSet *	S = nullptr )

static

Compute the Succ_L(O) set, as defined in the paper.

The set is defined as the successors of the elements of NodeOrder that are not also in NodeOrder.

Definition at line 2146 of file MachinePipeliner.cpp.

References llvm::SetVector< T, Vector, Set, N >::clear(), llvm::SetVector< T, Vector, Set, N >::empty(), llvm::SwingSchedulerDDG::getInEdges(), llvm::SwingSchedulerDDG::getOutEdges(), llvm::SetVector< T, Vector, Set, N >::insert(), and llvm::NodeOrder.

Variable Documentation

◆ DEBUG_TYPE

DEBUG_TYPE

Definition at line 236 of file MachinePipeliner.cpp.

◆ EmitTestAnnotations

cl::opt< bool > EmitTestAnnotations("pipeliner-annotate-for-testing", cl::Hidden, cl::init(false), cl::desc("Instead of emitting the pipelined code, annotate instructions " "with the generated schedule for feeding into the " "-modulo-schedule-test pass"))	(	"pipeliner-annotate-for-testing"	,
		cl::Hidden	,
		cl::init(false)	,
		cl::desc("Instead of emitting the pipelined code, annotate instructions " "with the generated schedule for feeding into the " "-modulo-schedule-test pass")	)

static

Referenced by llvm::SwingSchedulerDAG::schedule().

◆ EnableSWP

cl::opt< bool > EnableSWP("enable-pipeliner", cl::Hidden, cl::init(true), cl::desc("Enable Software Pipelining"))	(	"enable-pipeliner"	,
		cl::Hidden	,
		cl::init(true)	,
		cl::desc("Enable Software Pipelining")	)

static

A command line option to turn software pipelining on or off.

Referenced by llvm::MachinePipeliner::runOnMachineFunction().

◆ EnableSWPOptSize

cl::opt< bool > EnableSWPOptSize("enable-pipeliner-opt-size", cl::desc("Enable SWP at Os."), cl::Hidden, cl::init(false))	(	"enable-pipeliner-opt-size"	,
		cl::desc("Enable SWP at Os.")	,
		cl::Hidden	,
		cl::init(false)	)

static

A command line option to enable SWP at -Os.

Referenced by llvm::MachinePipeliner::runOnMachineFunction().

◆ ExperimentalCodeGen

cl::opt< bool > ExperimentalCodeGen("pipeliner-experimental-cg", cl::Hidden, cl::init(false), cl::desc( "Use the experimental peeling code generator for software pipelining"))	(	"pipeliner-experimental-cg"	,
		cl::Hidden	,
		cl::init(false)	,
		cl::desc( "Use the experimental peeling code generator for software pipelining")	)

static

Referenced by llvm::SwingSchedulerDAG::schedule().

◆ false

Modulo Software false

Definition at line 237 of file MachinePipeliner.cpp.

◆ LimitRegPressure

cl::opt< bool > LimitRegPressure("pipeliner-register-pressure", cl::Hidden, cl::init(false), cl::desc("Limit register pressure of scheduled loop"))	(	"pipeliner-register-pressure"	,
		cl::Hidden	,
		cl::init(false)	,
		cl::desc("Limit register pressure of scheduled loop")	)

static

◆ MVECodeGen

cl::opt< bool > MVECodeGen("pipeliner-mve-cg", cl::Hidden, cl::init(false), cl::desc("Use the MVE code generator for software pipelining"))	(	"pipeliner-mve-cg"	,
		cl::Hidden	,
		cl::init(false)	,
		cl::desc("Use the MVE code generator for software pipelining")	)

static

Referenced by llvm::SwingSchedulerDAG::schedule().

◆ Pipelining

Modulo Software Pipelining

Definition at line 237 of file MachinePipeliner.cpp.

◆ RegPressureMargin

cl::opt< int > RegPressureMargin("pipeliner-register-pressure-margin", cl::Hidden, cl::init(5), cl::desc("Margin representing the unused percentage of " "the register pressure limit"))	(	"pipeliner-register-pressure-margin"	,
		cl::Hidden	,
		cl::init(5)	,
		cl::desc("Margin representing the unused percentage of " "the register pressure limit")	)

static

◆ SwpDebugResource

cl::opt< bool > SwpDebugResource("pipeliner-dbg-res", cl::Hidden, cl::init(false))	(	"pipeliner-dbg-res"	,
		cl::Hidden	,
		cl::init(false)	)

static

Referenced by llvm::ResourceManager::calculateResMII(), llvm::ResourceManager::canReserveResources(), and llvm::ResourceManager::reserveResources().

◆ SwpForceII

cl::opt< int > SwpForceII("pipeliner-force-ii", cl::desc("Force pipeliner to use specified II."), cl::Hidden, cl::init(-1))	(	"pipeliner-force-ii"	,
		cl::desc("Force pipeliner to use specified II.")	,
		cl::Hidden	,
		cl::init(-1)	)

static

A command line argument to force pipeliner to use specified initial interval.

◆ SwpIgnoreRecMII

cl::opt< bool > SwpIgnoreRecMII("pipeliner-ignore-recmii", cl::ReallyHidden, cl::desc("Ignore RecMII"))	(	"pipeliner-ignore-recmii"	,
		cl::ReallyHidden	,
		cl::desc("Ignore RecMII")	)

static

Referenced by llvm::SwingSchedulerDAG::schedule().

◆ SwpIISearchRange

cl::opt< int > SwpIISearchRange("pipeliner-ii-search-range", cl::desc("Range to search for II"), cl::Hidden, cl::init(10))	(	"pipeliner-ii-search-range"	,
		cl::desc("Range to search for II")	,
		cl::Hidden	,
		cl::init(10)	)

static

◆ SwpLoopLimit

cl::opt< int > SwpLoopLimit("pipeliner-max", cl::Hidden, cl::init(-1))	(	"pipeliner-max"	,
		cl::Hidden	,
		cl::init(-1)	)

static

◆ SwpMaxMii

cl::opt< int > SwpMaxMii("pipeliner-max-mii", cl::desc("Size limit for the MII."), cl::Hidden, cl::init(27))	(	"pipeliner-max-mii"	,
		cl::desc("Size limit for the MII.")	,
		cl::Hidden	,
		cl::init(27)	)

static

A command line argument to limit minimum initial interval for pipelining.

Referenced by llvm::SwingSchedulerDAG::schedule().

◆ SwpMaxStages

cl::opt< int > SwpMaxStages("pipeliner-max-stages", cl::desc("Maximum stages allowed in the generated scheduled."), cl::Hidden, cl::init(3))	(	"pipeliner-max-stages"	,
		cl::desc("Maximum stages allowed in the generated scheduled.")	,
		cl::Hidden	,
		cl::init(3)	)

static

A command line argument to limit the number of stages in the pipeline.

Referenced by llvm::SwingSchedulerDAG::schedule().

◆ SwpPruneDeps

cl::opt< bool > SwpPruneDeps("pipeliner-prune-deps", cl::desc("Prune dependences between unrelated Phi nodes."), cl::Hidden, cl::init(true))	(	"pipeliner-prune-deps"	,
		cl::desc("Prune dependences between unrelated Phi nodes.")	,
		cl::Hidden	,
		cl::init(true)	)

static

A command line option to disable the pruning of chain dependences due to an unrelated Phi.

◆ SwpPruneLoopCarried

cl::opt< bool > SwpPruneLoopCarried("pipeliner-prune-loop-carried", cl::desc("Prune loop carried order dependences."), cl::Hidden, cl::init(true))	(	"pipeliner-prune-loop-carried"	,
		cl::desc("Prune loop carried order dependences.")	,
		cl::Hidden	,
		cl::init(true)	)

static

A command line option to disable the pruning of loop carried order dependences.

Referenced by llvm::SwingSchedulerDAG::isLoopCarriedDep().

◆ SwpShowResMask

cl::opt< bool > SwpShowResMask("pipeliner-show-mask", cl::Hidden, cl::init(false))	(	"pipeliner-show-mask"	,
		cl::Hidden	,
		cl::init(false)	)

static

Referenced by llvm::ResourceManager::initProcResourceVectors().

Classes

Namespaces

Macros

Functions

Variables

Macro Definition Documentation

◆ DEBUG_TYPE

Function Documentation

◆ computeLiveOuts()

◆ computePath()

◆ computeScheduledInsts()

◆ findLoopIncrementValue()

◆ findUniqueOperandDefinedInLoop()

◆ getLoopPhiReg()

◆ getPhiRegs()

◆ hasLoopCarriedMemDep()

◆ INITIALIZE_PASS_BEGIN()

◆ isIntersect()

◆ isSuccOrder()

◆ multipleIterations()

◆ pred_L()

◆ STATISTIC() [1/11]

◆ STATISTIC() [2/11]

◆ STATISTIC() [3/11]

◆ STATISTIC() [4/11]

◆ STATISTIC() [5/11]

◆ STATISTIC() [6/11]

◆ STATISTIC() [7/11]

◆ STATISTIC() [8/11]

◆ STATISTIC() [9/11]

◆ STATISTIC() [10/11]

◆ STATISTIC() [11/11]

◆ succ_L()

Variable Documentation

◆ DEBUG_TYPE

◆ EmitTestAnnotations

◆ EnableSWP

◆ EnableSWPOptSize

◆ ExperimentalCodeGen

◆ false

◆ LimitRegPressure

◆ MVECodeGen

◆ Pipelining

◆ RegPressureMargin

◆ SwpDebugResource

◆ SwpForceII

◆ SwpIgnoreRecMII

◆ SwpIISearchRange

◆ SwpLoopLimit

◆ SwpMaxMii

◆ SwpMaxStages

◆ SwpPruneDeps

◆ SwpPruneLoopCarried

◆ SwpShowResMask