MipsISelLowering.cpp File Reference

#include "MipsISelLowering.h"
#include "MCTargetDesc/MipsBaseInfo.h"
#include "MCTargetDesc/MipsInstPrinter.h"
#include "MCTargetDesc/MipsMCTargetDesc.h"
#include "MipsCCState.h"
#include "MipsInstrInfo.h"
#include "MipsMachineFunction.h"
#include "MipsRegisterInfo.h"
#include "MipsSubtarget.h"
#include "MipsTargetMachine.h"
#include "MipsTargetObjectFile.h"
#include "llvm/ADT/APFloat.h"
#include "llvm/ADT/ArrayRef.h"
#include "llvm/ADT/SmallVector.h"
#include "llvm/ADT/Statistic.h"
#include "llvm/ADT/StringRef.h"
#include "llvm/ADT/StringSwitch.h"
#include "llvm/CodeGen/CallingConvLower.h"
#include "llvm/CodeGen/FunctionLoweringInfo.h"
#include "llvm/CodeGen/ISDOpcodes.h"
#include "llvm/CodeGen/MachineBasicBlock.h"
#include "llvm/CodeGen/MachineFrameInfo.h"
#include "llvm/CodeGen/MachineFunction.h"
#include "llvm/CodeGen/MachineInstr.h"
#include "llvm/CodeGen/MachineInstrBuilder.h"
#include "llvm/CodeGen/MachineJumpTableInfo.h"
#include "llvm/CodeGen/MachineMemOperand.h"
#include "llvm/CodeGen/MachineOperand.h"
#include "llvm/CodeGen/MachineRegisterInfo.h"
#include "llvm/CodeGen/RuntimeLibcalls.h"
#include "llvm/CodeGen/SelectionDAG.h"
#include "llvm/CodeGen/SelectionDAGNodes.h"
#include "llvm/CodeGen/TargetFrameLowering.h"
#include "llvm/CodeGen/TargetInstrInfo.h"
#include "llvm/CodeGen/TargetRegisterInfo.h"
#include "llvm/CodeGen/ValueTypes.h"
#include "llvm/IR/CallingConv.h"
#include "llvm/IR/Constants.h"
#include "llvm/IR/DataLayout.h"
#include "llvm/IR/DebugLoc.h"
#include "llvm/IR/DerivedTypes.h"
#include "llvm/IR/Function.h"
#include "llvm/IR/GlobalValue.h"
#include "llvm/IR/Type.h"
#include "llvm/IR/Value.h"
#include "llvm/MC/MCContext.h"
#include "llvm/MC/MCRegisterInfo.h"
#include "llvm/Support/Casting.h"
#include "llvm/Support/CodeGen.h"
#include "llvm/Support/CommandLine.h"
#include "llvm/Support/Compiler.h"
#include "llvm/Support/ErrorHandling.h"
#include "llvm/Support/MachineValueType.h"
#include "llvm/Support/MathExtras.h"
#include "llvm/Target/TargetMachine.h"
#include "llvm/Target/TargetOptions.h"
#include <algorithm>
#include <cassert>
#include <cctype>
#include <cstdint>
#include <deque>
#include <iterator>
#include <utility>
#include <vector>
#include "MipsGenCallingConv.inc"

Go to the source code of this file.

Macros
#define	DEBUG_TYPE   "mips-lower"

Functions
	STATISTIC (NumTailCalls, "Number of tail calls")
static bool	isShiftedMask (uint64_t I, uint64_t &Pos, uint64_t &Size)
static SDValue	performDivRemCombine (SDNode *N, SelectionDAG &DAG, TargetLowering::DAGCombinerInfo &DCI, const MipsSubtarget &Subtarget)
static Mips::CondCode	condCodeToFCC (ISD::CondCode CC)
static bool	invertFPCondCodeUser (Mips::CondCode CC)
	This function returns true if the floating point conditional branches and conditional moves which use condition code CC should be inverted. More...
static SDValue	createFPCmp (SelectionDAG &DAG, const SDValue &Op)
static SDValue	createCMovFP (SelectionDAG &DAG, SDValue Cond, SDValue True, SDValue False, const SDLoc &DL)
static SDValue	performSELECTCombine (SDNode *N, SelectionDAG &DAG, TargetLowering::DAGCombinerInfo &DCI, const MipsSubtarget &Subtarget)
static SDValue	performCMovFPCombine (SDNode *N, SelectionDAG &DAG, TargetLowering::DAGCombinerInfo &DCI, const MipsSubtarget &Subtarget)
static SDValue	performANDCombine (SDNode *N, SelectionDAG &DAG, TargetLowering::DAGCombinerInfo &DCI, const MipsSubtarget &Subtarget)
static SDValue	performORCombine (SDNode *N, SelectionDAG &DAG, TargetLowering::DAGCombinerInfo &DCI, const MipsSubtarget &Subtarget)
static SDValue	performMADD_MSUBCombine (SDNode *ROOTNode, SelectionDAG &CurDAG, const MipsSubtarget &Subtarget)
static SDValue	performSUBCombine (SDNode *N, SelectionDAG &DAG, TargetLowering::DAGCombinerInfo &DCI, const MipsSubtarget &Subtarget)
static SDValue	performADDCombine (SDNode *N, SelectionDAG &DAG, TargetLowering::DAGCombinerInfo &DCI, const MipsSubtarget &Subtarget)
static SDValue	performSHLCombine (SDNode *N, SelectionDAG &DAG, TargetLowering::DAGCombinerInfo &DCI, const MipsSubtarget &Subtarget)
static unsigned	addLiveIn (MachineFunction &MF, unsigned PReg, const TargetRegisterClass *RC)
static MachineBasicBlock *	insertDivByZeroTrap (MachineInstr &MI, MachineBasicBlock &MBB, const TargetInstrInfo &TII, bool Is64Bit, bool IsMicroMips)
static SDValue	lowerFCOPYSIGN32 (SDValue Op, SelectionDAG &DAG, bool HasExtractInsert)
static SDValue	lowerFCOPYSIGN64 (SDValue Op, SelectionDAG &DAG, bool HasExtractInsert)
static SDValue	lowerFABS32 (SDValue Op, SelectionDAG &DAG, bool HasExtractInsert)
static SDValue	lowerFABS64 (SDValue Op, SelectionDAG &DAG, bool HasExtractInsert)
static SDValue	createLoadLR (unsigned Opc, SelectionDAG &DAG, LoadSDNode *LD, SDValue Chain, SDValue Src, unsigned Offset)
static SDValue	createStoreLR (unsigned Opc, SelectionDAG &DAG, StoreSDNode *SD, SDValue Chain, unsigned Offset)
static SDValue	lowerUnalignedIntStore (StoreSDNode *SD, SelectionDAG &DAG, bool IsLittle)
static SDValue	lowerFP_TO_SINT_STORE (StoreSDNode *SD, SelectionDAG &DAG, bool SingleFloat)
static bool	CC_MipsO32 (unsigned ValNo, MVT ValVT, MVT LocVT, CCValAssign::LocInfo LocInfo, ISD::ArgFlagsTy ArgFlags, CCState &State, ArrayRef< MCPhysReg > F64Regs)
static bool	CC_MipsO32_FP32 (unsigned ValNo, MVT ValVT, MVT LocVT, CCValAssign::LocInfo LocInfo, ISD::ArgFlagsTy ArgFlags, CCState &State)
static bool	CC_MipsO32_FP64 (unsigned ValNo, MVT ValVT, MVT LocVT, CCValAssign::LocInfo LocInfo, ISD::ArgFlagsTy ArgFlags, CCState &State)
static bool	CC_MipsO32 (unsigned ValNo, MVT ValVT, MVT LocVT, CCValAssign::LocInfo LocInfo, ISD::ArgFlagsTy ArgFlags, CCState &State) LLVM_ATTRIBUTE_UNUSED
static unsigned	getNextIntArgReg (unsigned Reg)
static SDValue	UnpackFromArgumentSlot (SDValue Val, const CCValAssign &VA, EVT ArgVT, const SDLoc &DL, SelectionDAG &DAG)
static std::pair< bool, bool >	parsePhysicalReg (StringRef C, StringRef &Prefix, unsigned long long &Reg)
	This is a helper function to parse a physical register string and split it into non-numeric and numeric parts (Prefix and Reg). More...

Variables
static cl::opt< bool >	LargeGOT ("mxgot", cl::Hidden, cl::desc("MIPS: Enable GOT larger than 64k."), cl::init(false))
static cl::opt< bool >	NoZeroDivCheck ("mno-check-zero-division", cl::Hidden, cl::desc("MIPS: Don't trap on integer division by zero."), cl::init(false))
cl::opt< bool >	EmitJalrReloc
static const MCPhysReg	Mips64DPRegs [8]

Macro Definition Documentation

DEBUG_TYPE

#define DEBUG_TYPE   "mips-lower"

Definition at line 81 of file MipsISelLowering.cpp.

Function Documentation

addLiveIn()

static unsigned addLiveIn ( MachineFunction &  MF, unsigned  PReg, const TargetRegisterClass *  RC  )

static

Definition at line 1258 of file MipsISelLowering.cpp.

References llvm::MachineRegisterInfo::addLiveIn(), llvm::MachineRegisterInfo::createVirtualRegister(), and llvm::MachineFunction::getRegInfo().

Referenced by llvm::MachineBasicBlock::addLiveIn(), llvm::MachineFunction::getSublistAccess(), and UnpackFromArgumentSlot().

CC_MipsO32() [1/2]

static bool CC_MipsO32 ( unsigned  ValNo, MVT  ValVT, MVT  LocVT, CCValAssign::LocInfo  LocInfo, ISD::ArgFlagsTy  ArgFlags, CCState &  State, ArrayRef< MCPhysReg >  F64Regs  )

static

Definition at line 2739 of file MipsISelLowering.cpp.

References llvm::CCState::addLoc(), llvm::CCValAssign::AExt, llvm::CCValAssign::AExtUpper, llvm::CCState::AllocateReg(), llvm::CCState::AllocateStack(), llvm::MVT::f32, llvm::MVT::f64, llvm::CCState::getFirstUnallocated(), llvm::CCState::getMachineFunction(), llvm::CCValAssign::getMem(), llvm::ISD::ArgFlagsTy::getOrigAlign(), llvm::CCValAssign::getReg(), llvm::MVT::getStoreSize(), llvm::MachineFunction::getSubtarget(), llvm::MVT::i16, llvm::MVT::i32, llvm::MVT::i8, IntRegs, llvm::ISD::ArgFlagsTy::isByVal(), llvm::MVT::isFloatingPoint(), llvm::ISD::ArgFlagsTy::isInReg(), llvm::MipsSubtarget::isLittle(), llvm::ISD::ArgFlagsTy::isSExt(), llvm::ISD::ArgFlagsTy::isSplit(), llvm::CCState::isVarArg(), llvm::ISD::ArgFlagsTy::isZExt(), llvm_unreachable, Reg, llvm::CCValAssign::SExt, llvm::CCValAssign::SExtUpper, llvm::MipsTargetLowering::Subtarget, llvm::MipsCCState::WasOriginalArgVectorFloat(), llvm::CCValAssign::ZExt, and llvm::CCValAssign::ZExtUpper.

Referenced by CC_MipsO32_FP32(), and CC_MipsO32_FP64().

CC_MipsO32() [2/2]

static bool CC_MipsO32 ( unsigned  ValNo, MVT  ValVT, MVT  LocVT, CCValAssign::LocInfo  LocInfo, ISD::ArgFlagsTy  ArgFlags, CCState &  State  )

static

CC_MipsO32_FP32()

static bool CC_MipsO32_FP32 ( unsigned  ValNo, MVT  ValVT, MVT  LocVT, CCValAssign::LocInfo  LocInfo, ISD::ArgFlagsTy  ArgFlags, CCState &  State  )

static

Definition at line 2850 of file MipsISelLowering.cpp.

References CC_MipsO32().

CC_MipsO32_FP64()

static bool CC_MipsO32_FP64 ( unsigned  ValNo, MVT  ValVT, MVT  LocVT, CCValAssign::LocInfo  LocInfo, ISD::ArgFlagsTy  ArgFlags, CCState &  State  )

static

Definition at line 2858 of file MipsISelLowering.cpp.

References CC_MipsO32(), and LLVM_ATTRIBUTE_UNUSED.

condCodeToFCC()

static Mips::CondCode condCodeToFCC ( ISD::CondCode  CC )

static

Definition at line 606 of file MipsISelLowering.cpp.

References llvm::Mips::FCOND_OEQ, llvm::Mips::FCOND_OGE, llvm::Mips::FCOND_OGT, llvm::Mips::FCOND_OLE, llvm::Mips::FCOND_OLT, llvm::Mips::FCOND_ONE, llvm::Mips::FCOND_OR, llvm::Mips::FCOND_UEQ, llvm::Mips::FCOND_UGE, llvm::Mips::FCOND_UGT, llvm::Mips::FCOND_ULE, llvm::Mips::FCOND_ULT, llvm::Mips::FCOND_UN, llvm::Mips::FCOND_UNE, llvm_unreachable, llvm::ISD::SETEQ, llvm::ISD::SETGE, llvm::ISD::SETGT, llvm::ISD::SETLE, llvm::ISD::SETLT, llvm::ISD::SETNE, llvm::ISD::SETO, llvm::ISD::SETOEQ, llvm::ISD::SETOGE, llvm::ISD::SETOGT, llvm::ISD::SETOLE, llvm::ISD::SETOLT, llvm::ISD::SETONE, llvm::ISD::SETUEQ, llvm::ISD::SETUGE, llvm::ISD::SETUGT, llvm::ISD::SETULE, llvm::ISD::SETULT, llvm::ISD::SETUNE, and llvm::ISD::SETUO.

Referenced by createFPCmp().

createCMovFP()

static SDValue createCMovFP ( SelectionDAG &  DAG, SDValue  Cond, SDValue  True, SDValue  False, const SDLoc &  DL  )

static

Definition at line 668 of file MipsISelLowering.cpp.

createFPCmp()

static SDValue createFPCmp ( SelectionDAG &  DAG, const SDValue &  Op  )

static

Definition at line 646 of file MipsISelLowering.cpp.

References condCodeToFCC(), llvm::MipsISD::FPCmp, llvm::SelectionDAG::getConstant(), llvm::SelectionDAG::getNode(), llvm::SDValue::getOpcode(), llvm::SDValue::getOperand(), llvm::SDValue::getValueType(), llvm::MVT::Glue, llvm::MVT::i32, llvm::EVT::isFloatingPoint(), and llvm::ISD::SETCC.

Referenced by llvm::MipsTargetLowering::EmitInstrWithCustomInserter().

createLoadLR()

static SDValue createLoadLR ( unsigned  Opc, SelectionDAG &  DAG, LoadSDNode *  LD, SDValue  Chain, SDValue  Src, unsigned  Offset  )

static

Definition at line 2536 of file MipsISelLowering.cpp.

References llvm::ISD::ADD, llvm::LoadSDNode::getBasePtr(), llvm::SelectionDAG::getConstant(), llvm::SelectionDAG::getMemIntrinsicNode(), llvm::MemSDNode::getMemOperand(), llvm::MemSDNode::getMemoryVT(), llvm::SelectionDAG::getNode(), llvm::SDValue::getValueType(), llvm::SDNode::getValueType(), llvm::SelectionDAG::getVTList(), and llvm::MVT::Other.

Referenced by llvm::MipsTargetLowering::lowerLOAD().

createStoreLR()

static SDValue createStoreLR ( unsigned  Opc, SelectionDAG &  DAG, StoreSDNode *  SD, SDValue  Chain, unsigned  Offset  )

static

Definition at line 2618 of file MipsISelLowering.cpp.

References llvm::ISD::ADD, llvm::StoreSDNode::getBasePtr(), llvm::SelectionDAG::getConstant(), llvm::SelectionDAG::getMemIntrinsicNode(), llvm::MemSDNode::getMemOperand(), llvm::MemSDNode::getMemoryVT(), llvm::SelectionDAG::getNode(), llvm::StoreSDNode::getValue(), llvm::SDValue::getValueType(), llvm::SelectionDAG::getVTList(), and llvm::MVT::Other.

Referenced by lowerUnalignedIntStore().

getNextIntArgReg()

static unsigned getNextIntArgReg ( unsigned  Reg )

static

Definition at line 2884 of file MipsISelLowering.cpp.

References llvm::ISD::ADD, Arg, assert(), llvm::MachineFrameInfo::CreateFixedObject(), llvm::SelectionDAG::getDataLayout(), llvm::SelectionDAG::getFrameIndex(), llvm::MachineFunction::getFrameInfo(), llvm::SelectionDAG::getIntPtrConstant(), llvm::SelectionDAG::getMachineFunction(), llvm::SelectionDAG::getNode(), llvm::MipsTargetLowering::getOpndList(), llvm::TargetLoweringBase::getPointerTy(), llvm::SelectionDAG::getStore(), llvm::SDValue::getValueSizeInBits(), and llvm::MachineMemOperand::MOVolatile.

Referenced by UnpackFromArgumentSlot().

insertDivByZeroTrap()

static MachineBasicBlock* insertDivByZeroTrap ( MachineInstr &  MI, MachineBasicBlock &  MBB, const TargetInstrInfo &  TII, bool  Is64Bit, bool  IsMicroMips  )

static

Definition at line 1265 of file MipsISelLowering.cpp.

References llvm::MachineInstrBuilder::addImm(), llvm::MachineInstrBuilder::addReg(), llvm::BuildMI(), llvm::MCInstrInfo::get(), llvm::MachineInstr::getDebugLoc(), llvm::getKillRegState(), llvm::MachineInstr::getOperand(), llvm::MachineOperand::getReg(), I, llvm::MachineOperand::isKill(), NoZeroDivCheck, llvm::MachineOperand::setIsKill(), and llvm::MachineOperand::setSubReg().

Referenced by llvm::MipsTargetLowering::EmitInstrWithCustomInserter().

invertFPCondCodeUser()

static bool invertFPCondCodeUser ( Mips::CondCode  CC )

static

This function returns true if the floating point conditional branches and conditional moves which use condition code CC should be inverted.

Definition at line 634 of file MipsISelLowering.cpp.

References assert(), llvm::Mips::FCOND_F, llvm::Mips::FCOND_GT, llvm::Mips::FCOND_NGT, and llvm::Mips::FCOND_T.

Referenced by llvm::MipsTargetLowering::EmitInstrWithCustomInserter().

isShiftedMask()

static bool isShiftedMask ( uint64_t  I, uint64_t &  Pos, uint64_t &  Size  )

static

Definition at line 104 of file MipsISelLowering.cpp.

References llvm::countPopulation(), llvm::countTrailingZeros(), and llvm::isShiftedMask_64().

Referenced by performANDCombine(), performORCombine(), and performSHLCombine().

lowerFABS32()

static SDValue lowerFABS32 ( SDValue  Op, SelectionDAG &  DAG, bool  HasExtractInsert  )

static

Definition at line 2310 of file MipsISelLowering.cpp.

References llvm::ISD::BITCAST, llvm::MipsISD::BuildPairF64, llvm::MipsISD::ExtractElementF64, llvm::MVT::f32, llvm::MVT::f64, llvm::SelectionDAG::getConstant(), llvm::SelectionDAG::getNode(), llvm::SDValue::getOperand(), llvm::SelectionDAG::getRegister(), llvm::SDValue::getValueType(), llvm::MVT::i32, llvm::MipsISD::Ins, llvm::ISD::SHL, llvm::ISD::SRL, and X.

Referenced by lowerFABS64().

lowerFABS64()

static SDValue lowerFABS64 ( SDValue  Op, SelectionDAG &  DAG, bool  HasExtractInsert  )

static

Definition at line 2347 of file MipsISelLowering.cpp.

References llvm::MipsTargetLowering::ABI, llvm::MachineFunction::addLiveIn(), llvm::ISD::BITCAST, llvm::MipsISD::EH_RETURN, llvm::LLVMContext::emitError(), llvm::MVT::f64, llvm::SelectionDAG::getConstant(), llvm::SelectionDAG::getContext(), llvm::SelectionDAG::getCopyFromReg(), llvm::SelectionDAG::getCopyToReg(), llvm::MachineFunction::getDataLayout(), llvm::SelectionDAG::getEntryNode(), llvm::MachineFunction::getFrameInfo(), llvm::MachineFunction::getInfo(), llvm::SelectionDAG::getMachineFunction(), llvm::SelectionDAG::getNode(), llvm::SDValue::getOperand(), llvm::TargetLoweringBase::getPointerTy(), llvm::TargetLoweringBase::getRegClassFor(), llvm::SelectionDAG::getRegister(), llvm::SDValue::getSimpleValueType(), llvm::SDValue::getValue(), llvm::SDValue::getValueType(), llvm::MipsSubtarget::hasExtractInsert(), llvm::MipsISD::Hi, llvm::MVT::i32, llvm::MVT::i64, llvm::MipsISD::Ins, llvm::MipsSubtarget::isGP64bit(), llvm::MipsABIInfo::IsN32(), llvm::MipsABIInfo::IsN64(), llvm::MipsISD::Lo, lowerFABS32(), llvm::ISD::OR, llvm::MVT::Other, RA, Reg, llvm::MipsFunctionInfo::setCallsEhReturn(), llvm::MachineFrameInfo::setFrameAddressIsTaken(), llvm::MachineFrameInfo::setReturnAddressIsTaken(), llvm::ISD::SHL, llvm::ISD::SRL, llvm::MipsTargetLowering::Subtarget, llvm::MipsISD::Sync, llvm::TargetLowering::verifyReturnAddressArgumentIsConstant(), X, and llvm::ISD::XOR.

lowerFCOPYSIGN32()

static SDValue lowerFCOPYSIGN32 ( SDValue  Op, SelectionDAG &  DAG, bool  HasExtractInsert  )

static

Definition at line 2205 of file MipsISelLowering.cpp.

References llvm::ISD::BITCAST, llvm::MipsISD::BuildPairF64, E, llvm::MipsISD::Ext, llvm::MipsISD::ExtractElementF64, llvm::MVT::f32, llvm::MVT::f64, llvm::SelectionDAG::getConstant(), llvm::SelectionDAG::getNode(), llvm::SDValue::getOperand(), llvm::SDValue::getValueType(), llvm::MVT::i32, llvm::MipsISD::Ins, llvm::ISD::OR, llvm::ISD::SHL, llvm::ISD::SRL, X, and Y.

Referenced by lowerFCOPYSIGN64().

lowerFCOPYSIGN64()

static SDValue lowerFCOPYSIGN64 ( SDValue  Op, SelectionDAG &  DAG, bool  HasExtractInsert  )

static

Definition at line 2252 of file MipsISelLowering.cpp.

References llvm::ISD::BITCAST, E, llvm::MipsISD::Ext, llvm::SelectionDAG::getConstant(), llvm::MVT::getIntegerVT(), llvm::SelectionDAG::getNode(), llvm::SDValue::getOperand(), llvm::SDValue::getValueSizeInBits(), llvm::SDValue::getValueType(), llvm::MipsSubtarget::hasExtractInsert(), I, llvm::MVT::i32, llvm::MipsISD::Ins, llvm::MipsSubtarget::isGP64bit(), lowerFCOPYSIGN32(), llvm::ISD::OR, llvm::ISD::SHL, llvm::ISD::SRL, llvm::MipsTargetLowering::Subtarget, llvm::ISD::TRUNCATE, X, Y, and llvm::ISD::ZERO_EXTEND.

lowerFP_TO_SINT_STORE()

static SDValue lowerFP_TO_SINT_STORE ( StoreSDNode *  SD, SelectionDAG &  DAG, bool  SingleFloat  )

static

Definition at line 2664 of file MipsISelLowering.cpp.

References llvm::ISD::FP_TO_SINT, llvm::MemSDNode::getAlignment(), llvm::StoreSDNode::getBasePtr(), llvm::MemSDNode::getChain(), llvm::MachineMemOperand::getFlags(), llvm::EVT::getFloatingPointVT(), llvm::MemSDNode::getMemOperand(), llvm::SelectionDAG::getNode(), llvm::SDValue::getOpcode(), llvm::SDValue::getOperand(), llvm::MemSDNode::getPointerInfo(), llvm::SelectionDAG::getStore(), llvm::StoreSDNode::getValue(), llvm::SDValue::getValueSizeInBits(), and llvm::MipsISD::TruncIntFP.

Referenced by llvm::MipsTargetLowering::lowerSTORE().

lowerUnalignedIntStore()

static SDValue lowerUnalignedIntStore ( StoreSDNode *  SD, SelectionDAG &  DAG, bool  IsLittle  )

static

Definition at line 2635 of file MipsISelLowering.cpp.

References assert(), createStoreLR(), llvm::MemSDNode::getChain(), llvm::StoreSDNode::getValue(), llvm::SDValue::getValueType(), llvm::MVT::i32, llvm::MVT::i64, llvm::StoreSDNode::isTruncatingStore(), llvm::MipsISD::SDL, llvm::MipsISD::SDR, llvm::MipsISD::SWL, and llvm::MipsISD::SWR.

Referenced by llvm::MipsTargetLowering::lowerSTORE().

parsePhysicalReg()

static std::pair<bool, bool> parsePhysicalReg ( StringRef  C, StringRef &  Prefix, unsigned long long &  Reg  )

static

This is a helper function to parse a physical register string and split it into non-numeric and numeric parts (Prefix and Reg).

The first boolean flag that is returned indicates whether parsing was successful. The second flag is true if the numeric part exists.

Definition at line 3850 of file MipsISelLowering.cpp.

References B, llvm::StringRef::back(), llvm::StringRef::begin(), E, llvm::StringRef::end(), llvm::find_if(), llvm::StringRef::front(), llvm::getAsUnsignedInteger(), and I.

performADDCombine()

static SDValue performADDCombine ( SDNode *  N, SelectionDAG &  DAG, TargetLowering::DAGCombinerInfo &  DCI, const MipsSubtarget &  Subtarget  )

static

Definition at line 1072 of file MipsISelLowering.cpp.

References llvm::MCID::Add, llvm::ISD::ADD, llvm::SelectionDAG::getNode(), llvm::SDValue::getOpcode(), llvm::SDValue::getOperand(), llvm::SDNode::getOperand(), llvm::SDNode::getValueType(), llvm::MipsSubtarget::hasMips32(), llvm::MipsSubtarget::hasMips32r6(), llvm::MVT::i64, llvm::MipsSubtarget::inMips16Mode(), llvm::TargetLowering::DAGCombinerInfo::isBeforeLegalizeOps(), llvm::MipsISD::Lo, performMADD_MSUBCombine(), and llvm::ISD::TargetJumpTable.

Referenced by llvm::MipsTargetLowering::PerformDAGCombine().

performANDCombine()

static SDValue performANDCombine ( SDNode *  N, SelectionDAG &  DAG, TargetLowering::DAGCombinerInfo &  DCI, const MipsSubtarget &  Subtarget  )

static

Definition at line 784 of file MipsISelLowering.cpp.

References llvm::MipsISD::CIns, llvm::MipsISD::Ext, llvm::SelectionDAG::getConstant(), llvm::SelectionDAG::getNode(), llvm::SDValue::getOpcode(), llvm::SDValue::getOperand(), llvm::SDNode::getOperand(), llvm::EVT::getSizeInBits(), llvm::SDNode::getValueType(), llvm::ConstantSDNode::getZExtValue(), llvm::MipsSubtarget::hasCnMips(), llvm::MipsSubtarget::hasExtractInsert(), llvm::MVT::i32, llvm::TargetLowering::DAGCombinerInfo::isBeforeLegalizeOps(), isShiftedMask(), llvm::BitmaskEnumDetail::Mask(), llvm::ISD::SHL, llvm::ISD::SRA, and llvm::ISD::SRL.

Referenced by llvm::MipsTargetLowering::PerformDAGCombine().

performCMovFPCombine()

static SDValue performCMovFPCombine ( SDNode *  N, SelectionDAG &  DAG, TargetLowering::DAGCombinerInfo &  DCI, const MipsSubtarget &  Subtarget  )

static

Definition at line 757 of file MipsISelLowering.cpp.

References llvm::MipsISD::CMovFP_F, llvm::MipsISD::CMovFP_T, llvm::dyn_cast(), llvm::SelectionDAG::getNode(), llvm::SDNode::getOpcode(), llvm::SDNode::getOperand(), llvm::ConstantSDNode::getZExtValue(), and llvm::TargetLowering::DAGCombinerInfo::isBeforeLegalizeOps().

Referenced by llvm::MipsTargetLowering::PerformDAGCombine().

performDivRemCombine()

static SDValue performDivRemCombine ( SDNode *  N, SelectionDAG &  DAG, TargetLowering::DAGCombinerInfo &  DCI, const MipsSubtarget &  Subtarget  )

static

Definition at line 569 of file MipsISelLowering.cpp.

References llvm::MipsISD::DivRem, llvm::MipsISD::DivRem16, llvm::MipsISD::DivRemU16, llvm::SelectionDAG::getCopyFromReg(), llvm::SelectionDAG::getEntryNode(), llvm::SelectionDAG::getNode(), llvm::SDNode::getOpcode(), llvm::SDNode::getOperand(), llvm::SDValue::getValue(), llvm::SDNode::getValueType(), llvm::MVT::Glue, llvm::SDNode::hasAnyUseOfValue(), llvm::AArch64CC::HI, llvm::MVT::i32, llvm::TargetLowering::DAGCombinerInfo::isBeforeLegalizeOps(), llvm::AArch64CC::LO, llvm::SelectionDAG::ReplaceAllUsesOfValueWith(), and llvm::ISD::SDIVREM.

Referenced by llvm::MipsTargetLowering::PerformDAGCombine().

performMADD_MSUBCombine()

static SDValue performMADD_MSUBCombine ( SDNode *  ROOTNode, SelectionDAG &  CurDAG, const MipsSubtarget &  Subtarget  )

static

Definition at line 964 of file MipsISelLowering.cpp.

References llvm::ISD::ADD, llvm::ISD::BUILD_PAIR, llvm::ISD::EXTRACT_ELEMENT, llvm::SelectionDAG::getIntPtrConstant(), llvm::SelectionDAG::getNode(), llvm::SDValue::getOpcode(), llvm::SDNode::getOpcode(), llvm::SDNode::getOperand(), llvm::SDNode::getValueType(), llvm::MipsSubtarget::hasMips64(), llvm::SDValue::hasOneUse(), llvm::MVT::i32, llvm::MVT::i64, llvm::EVT::isVector(), llvm::MipsISD::MAdd, llvm::MipsISD::MAddu, llvm::MipsISD::MFHI, llvm::MipsISD::MFLO, llvm::MipsISD::MSub, llvm::MipsISD::MSubu, llvm::MipsISD::MTLOHI, llvm::ISD::MUL, llvm::MipsISD::Mult, llvm::ISD::SIGN_EXTEND, llvm::ISD::TRUNCATE, llvm::MVT::Untyped, and llvm::ISD::ZERO_EXTEND.

Referenced by performADDCombine(), and performSUBCombine().

performORCombine()

static SDValue performORCombine ( SDNode *  N, SelectionDAG &  DAG, TargetLowering::DAGCombinerInfo &  DCI, const MipsSubtarget &  Subtarget  )

static

Definition at line 866 of file MipsISelLowering.cpp.

References llvm::ISD::AND, llvm::SelectionDAG::getConstant(), llvm::SelectionDAG::getNode(), llvm::SDValue::getOpcode(), llvm::SDValue::getOperand(), llvm::SDNode::getOperand(), llvm::ConstantSDNode::getSExtValue(), llvm::EVT::getSizeInBits(), llvm::SDNode::getValueType(), llvm::ConstantSDNode::getZExtValue(), llvm::MipsSubtarget::hasExtractInsert(), llvm::MipsSubtarget::hasMips64r2(), llvm::MVT::i32, llvm::MipsISD::Ins, llvm::TargetLowering::DAGCombinerInfo::isBeforeLegalizeOps(), isShiftedMask(), llvm::ISD::SHL, and llvm::ISD::SRL.

Referenced by llvm::MipsTargetLowering::PerformDAGCombine().

performSELECTCombine()

static SDValue performSELECTCombine ( SDNode *  N, SelectionDAG &  DAG, TargetLowering::DAGCombinerInfo &  DCI, const MipsSubtarget &  Subtarget  )

static

Definition at line 678 of file MipsISelLowering.cpp.

References llvm::ISD::ADD, llvm::dyn_cast(), llvm::SelectionDAG::getNode(), llvm::SDValue::getOpcode(), llvm::SDValue::getOperand(), llvm::SDNode::getOperand(), llvm::SelectionDAG::getSetCC(), llvm::ISD::getSetCCInverse(), llvm::ConstantSDNode::getSExtValue(), llvm::SDValue::getValueType(), llvm::ConstantSDNode::getZExtValue(), llvm::MVT::i64, llvm::TargetLowering::DAGCombinerInfo::isBeforeLegalizeOps(), llvm::EVT::isInteger(), llvm::ISD::SELECT, and llvm::ISD::SETCC.

Referenced by llvm::MipsTargetLowering::PerformDAGCombine().

performSHLCombine()

static SDValue performSHLCombine ( SDNode *  N, SelectionDAG &  DAG, TargetLowering::DAGCombinerInfo &  DCI, const MipsSubtarget &  Subtarget  )

static

Definition at line 1104 of file MipsISelLowering.cpp.

References llvm::ISD::AND, llvm::MipsISD::CIns, llvm::SelectionDAG::getConstant(), llvm::SelectionDAG::getNode(), llvm::SDValue::getOpcode(), llvm::SDValue::getOperand(), llvm::SDNode::getOperand(), llvm::EVT::getSizeInBits(), llvm::SDNode::getValueType(), llvm::ConstantSDNode::getZExtValue(), llvm::MipsSubtarget::hasCnMips(), llvm::MVT::i32, llvm::TargetLowering::DAGCombinerInfo::isBeforeLegalizeOps(), and isShiftedMask().

Referenced by llvm::MipsTargetLowering::PerformDAGCombine().

performSUBCombine()

static SDValue performSUBCombine ( SDNode *  N, SelectionDAG &  DAG, TargetLowering::DAGCombinerInfo &  DCI, const MipsSubtarget &  Subtarget  )

static

Definition at line 1057 of file MipsISelLowering.cpp.

References llvm::SDNode::getValueType(), llvm::MipsSubtarget::hasMips32(), llvm::MipsSubtarget::hasMips32r6(), llvm::MVT::i64, llvm::MipsSubtarget::inMips16Mode(), llvm::TargetLowering::DAGCombinerInfo::isBeforeLegalizeOps(), and performMADD_MSUBCombine().

Referenced by llvm::MipsTargetLowering::PerformDAGCombine().

STATISTIC()

STATISTIC	(	NumTailCalls	,
		"Number of tail calls"
	)

UnpackFromArgumentSlot()

static SDValue UnpackFromArgumentSlot ( SDValue  Val, const CCValAssign &  VA, EVT  ArgVT, const SDLoc &  DL, SelectionDAG &  DAG  )

static

Definition at line 3406 of file MipsISelLowering.cpp.

References llvm::MipsTargetLowering::ABI, addLiveIn(), llvm::CCValAssign::AExt, llvm::CCValAssign::AExtUpper, llvm::CCState::AllocateStack(), llvm::MipsCCState::AnalyzeReturn(), llvm::ISD::ANY_EXTEND, llvm::Function::arg_begin(), llvm::Function::arg_empty(), assert(), llvm::ISD::AssertSext, llvm::ISD::AssertZext, llvm::CCValAssign::BCvt, llvm::ISD::BITCAST, llvm::MipsISD::BuildPairF64, llvm::TargetLowering::C_Memory, llvm::TargetLowering::C_RegisterClass, llvm::MipsCCState::CheckReturn(), Context, llvm::MachineFrameInfo::CreateFixedObject(), llvm::MachineRegisterInfo::createVirtualRegister(), llvm::TargetLowering::CW_Constant, llvm::TargetLowering::CW_Default, llvm::TargetLowering::CW_Invalid, llvm::TargetLowering::CW_Memory, llvm::TargetLowering::CW_Register, llvm::TargetLowering::CW_SpecificReg, llvm::MipsISD::ERet, llvm::MVT::f32, llvm::MVT::f64, llvm::CCValAssign::Full, getBitWidth(), llvm::ISD::ArgFlagsTy::getByValSize(), llvm::MipsABIInfo::GetCalleeAllocdArgSizeInBytes(), llvm::SelectionDAG::getConstant(), llvm::TargetLowering::getConstraintType(), llvm::SelectionDAG::getContext(), llvm::SelectionDAG::getCopyFromReg(), llvm::SelectionDAG::getCopyToReg(), llvm::SelectionDAG::getDataLayout(), llvm::SelectionDAG::getEntryNode(), llvm::MachinePointerInfo::getFixedStack(), llvm::SelectionDAG::getFrameIndex(), llvm::MachineFunction::getFrameInfo(), llvm::MachineFunction::getFunction(), llvm::MachineFunction::getInfo(), llvm::SelectionDAG::getLoad(), llvm::CCValAssign::getLocInfo(), llvm::CCValAssign::getLocMemOffset(), llvm::CCValAssign::getLocReg(), llvm::CCValAssign::getLocVT(), llvm::SelectionDAG::getMachineFunction(), getNextIntArgReg(), llvm::SDValue::getNode(), llvm::SelectionDAG::getNode(), llvm::TargetLoweringBase::getPointerTy(), llvm::TargetLoweringBase::getRegClassFor(), llvm::MachineFunction::getRegInfo(), llvm::SelectionDAG::getRegister(), llvm::TargetLowering::getSingleConstraintMatchWeight(), llvm::EVT::getSizeInBits(), llvm::MVT::getSizeInBits(), llvm::MipsFunctionInfo::getSRetReturnReg(), llvm::Value::getType(), llvm::SDValue::getValue(), llvm::SelectionDAG::getValueType(), llvm::CCValAssign::getValVT(), llvm::Function::hasFnAttribute(), llvm::MipsSubtarget::hasMSA(), llvm::Function::hasStructRetAttr(), llvm::MVT::i32, llvm::MVT::i64, info, llvm::ISD::ArgFlagsTy::isByVal(), llvm::MVT::isFloatingPoint(), llvm::Type::isFloatTy(), llvm::Type::isIntegerTy(), llvm::MipsSubtarget::isLittle(), llvm::CCValAssign::isMemLoc(), llvm::MipsABIInfo::IsN32(), llvm::MipsABIInfo::IsN64(), llvm::MipsABIInfo::IsO32(), llvm::CCValAssign::isRegLoc(), llvm::Type::isVectorTy(), LLVM_FALLTHROUGH, llvm_unreachable, llvm::MVT::Other, llvm::SmallVectorTemplateBase< T >::push_back(), Reg, llvm::report_fatal_error(), llvm::MipsISD::Ret, llvm::MipsFunctionInfo::setFormalArgInfo(), llvm::MipsFunctionInfo::setISR(), llvm::MipsFunctionInfo::setSRetReturnReg(), llvm::MipsFunctionInfo::setVarArgsFrameIndex(), llvm::CCValAssign::SExt, llvm::CCValAssign::SExtUpper, llvm::ISD::SHL, llvm::ISD::SIGN_EXTEND, llvm::SmallVectorBase::size(), llvm::StringRef::size(), llvm::ISD::SRA, llvm::ISD::SRL, llvm::MipsTargetLowering::Subtarget, std::swap(), llvm::ISD::TokenFactor, llvm::ISD::TRUNCATE, llvm::MipsSubtarget::useSoftFloat(), llvm::ISD::ZERO_EXTEND, llvm::CCValAssign::ZExt, and llvm::CCValAssign::ZExtUpper.

Variable Documentation

EmitJalrReloc

cl::opt<bool> EmitJalrReloc

LargeGOT

cl::opt<bool> LargeGOT("mxgot", cl::Hidden, cl::desc("MIPS: Enable GOT larger than 64k."), cl::init(false))

static

Referenced by llvm::MipsTargetLowering::createFastISel().

Mips64DPRegs

const MCPhysReg Mips64DPRegs[8]

static

Initial value:

= {
  Mips::D12_64, Mips::D13_64, Mips::D14_64, Mips::D15_64,
  Mips::D16_64, Mips::D17_64, Mips::D18_64, Mips::D19_64
}

Definition at line 96 of file MipsISelLowering.cpp.

Referenced by llvm::MipsTargetLowering::HandleByVal().

NoZeroDivCheck

cl::opt<bool> NoZeroDivCheck("mno-check-zero-division", cl::Hidden, cl::desc("MIPS: Don't trap on integer division by zero."), cl::init(false))

static

Referenced by insertDivByZeroTrap().