LLVM 20.0.0git
MipsRegisterInfo.h
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1//===- MipsRegisterInfo.h - Mips Register Information Impl ------*- C++ -*-===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8//
9// This file contains the Mips implementation of the TargetRegisterInfo class.
10//
11//===----------------------------------------------------------------------===//
12
13#ifndef LLVM_LIB_TARGET_MIPS_MIPSREGISTERINFO_H
14#define LLVM_LIB_TARGET_MIPS_MIPSREGISTERINFO_H
15
16#include "Mips.h"
18#include <cstdint>
19
20#define GET_REGINFO_HEADER
21#include "MipsGenRegisterInfo.inc"
22
23namespace llvm {
24
25class TargetRegisterClass;
26
28public:
29 enum class MipsPtrClass {
30 /// The default register class for integer values.
31 Default = 0,
32 /// The subset of registers permitted in certain microMIPS instructions
33 /// such as lw16.
34 GPR16MM = 1,
35 /// The stack pointer only.
36 StackPointer = 2,
37 /// The global pointer only.
38 GlobalPointer = 3,
39 };
40
42
43 /// Get PIC indirect call register
44 static unsigned getPICCallReg();
45
46 /// Code Generation virtual methods...
48 unsigned Kind) const override;
49
51 MachineFunction &MF) const override;
52 const MCPhysReg *getCalleeSavedRegs(const MachineFunction *MF) const override;
54 CallingConv::ID) const override;
55 static const uint32_t *getMips16RetHelperMask();
56
57 BitVector getReservedRegs(const MachineFunction &MF) const override;
58
59 /// Stack Frame Processing Methods
61 int SPAdj, unsigned FIOperandNum,
62 RegScavenger *RS = nullptr) const override;
63
64 // Stack realignment queries.
65 bool canRealignStack(const MachineFunction &MF) const override;
66
67 /// Debug information queries.
68 Register getFrameRegister(const MachineFunction &MF) const override;
69
70 /// Return GPR register class.
71 virtual const TargetRegisterClass *intRegClass(unsigned Size) const = 0;
72
73private:
74 virtual void eliminateFI(MachineBasicBlock::iterator II, unsigned OpNo,
75 int FrameIndex, uint64_t StackSize,
76 int64_t SPOffset) const = 0;
77};
78
79} // end namespace llvm
80
81#endif // LLVM_LIB_TARGET_MIPS_MIPSREGISTERINFO_H
uint64_t Size
uint64_t IntrinsicInst * II
static unsigned getPICCallReg()
Get PIC indirect call register.
const uint32_t * getCallPreservedMask(const MachineFunction &MF, CallingConv::ID) const override
Register getFrameRegister(const MachineFunction &MF) const override
Debug information queries.
bool eliminateFrameIndex(MachineBasicBlock::iterator II, int SPAdj, unsigned FIOperandNum, RegScavenger *RS=nullptr) const override
Stack Frame Processing Methods.
unsigned getRegPressureLimit(const TargetRegisterClass *RC, MachineFunction &MF) const override
static const uint32_t * getMips16RetHelperMask()
bool canRealignStack(const MachineFunction &MF) const override
BitVector getReservedRegs(const MachineFunction &MF) const override
const TargetRegisterClass * getPointerRegClass(const MachineFunction &MF, unsigned Kind) const override
Code Generation virtual methods...
@ StackPointer
The stack pointer only.
@ Default
The default register class for integer values.
@ GlobalPointer
The global pointer only.
@ GPR16MM
The subset of registers permitted in certain microMIPS instructions such as lw16.
const MCPhysReg * getCalleeSavedRegs(const MachineFunction *MF) const override
Mips Callee Saved Registers.
virtual const TargetRegisterClass * intRegClass(unsigned Size) const =0
Return GPR register class.
Wrapper class representing virtual and physical registers.
Definition: Register.h:19
This is an optimization pass for GlobalISel generic memory operations.
Definition: AddressRanges.h:18