LLVM 20.0.0git
Public Member Functions | Public Attributes | List of all members
llvm::TargetLowering::DAGCombinerInfo Struct Reference

#include "llvm/CodeGen/TargetLowering.h"

Public Member Functions

 DAGCombinerInfo (SelectionDAG &dag, CombineLevel level, bool cl, void *dc)
 
bool isBeforeLegalize () const
 
bool isBeforeLegalizeOps () const
 
bool isAfterLegalizeDAG () const
 
CombineLevel getDAGCombineLevel ()
 
bool isCalledByLegalizer () const
 
void AddToWorklist (SDNode *N)
 
SDValue CombineTo (SDNode *N, ArrayRef< SDValue > To, bool AddTo=true)
 
SDValue CombineTo (SDNode *N, SDValue Res, bool AddTo=true)
 
SDValue CombineTo (SDNode *N, SDValue Res0, SDValue Res1, bool AddTo=true)
 
bool recursivelyDeleteUnusedNodes (SDNode *N)
 
void CommitTargetLoweringOpt (const TargetLoweringOpt &TLO)
 

Public Attributes

void * DC
 
CombineLevel Level
 
bool CalledByLegalizer
 
SelectionDAG & DAG
 

Detailed Description

Definition at line 4225 of file TargetLowering.h.

Constructor & Destructor Documentation

◆ DAGCombinerInfo()

llvm::TargetLowering::DAGCombinerInfo::DAGCombinerInfo ( SelectionDAG &  dag,
CombineLevel  level,
bool  cl,
void *  dc 
)
inline

Definition at line 4233 of file TargetLowering.h.

Member Function Documentation

◆ AddToWorklist()

void TargetLowering::DAGCombinerInfo::AddToWorklist ( SDNode *  N)

Definition at line 904 of file DAGCombiner.cpp.

References DC, and N.

Referenced by combineAnd(), combineAndnp(), combineBT(), combineCVTPH2PS(), combineGatherScatter(), combineMaskedLoad(), combineMaskedStore(), combineOp_VLToVWOp_VL(), combineOr(), combineVEXTRACT_STORE(), combineVSelectToBLENDV(), combineX86GatherScatter(), distributeOpThroughSelect(), llvm::PPCTargetLowering::expandVSXLoadForLE(), llvm::PPCTargetLowering::expandVSXStoreForLE(), llvm::AMDGPUTargetLowering::foldFreeOpFromSelect(), PerformARMBUILD_VECTORCombine(), PerformBUILD_VECTORCombine(), llvm::RISCVTargetLowering::PerformDAGCombine(), llvm::AMDGPUTargetLowering::performFNegCombine(), PerformInsertEltCombine(), llvm::AMDGPUTargetLowering::performMulhsCombine(), llvm::AMDGPUTargetLowering::performMulhuCombine(), PerformSTORECombine(), llvm::AMDGPUTargetLowering::performTruncateCombine(), llvm::TargetLowering::SimplifyDemandedBits(), llvm::TargetLowering::SimplifyDemandedVectorElts(), llvm::TargetLowering::SimplifySetCC(), and llvm::AMDGPUTargetLowering::splitBinaryBitConstantOpImpl().

◆ CombineTo() [1/3]

SDValue TargetLowering::DAGCombinerInfo::CombineTo ( SDNode *  N,
ArrayRef< SDValue >  To,
bool  AddTo = true 
)

Definition at line 908 of file DAGCombiner.cpp.

References N, and llvm::ArrayRef< T >::size().

Referenced by combineADC(), combineBROADCAST_LOAD(), combineConstantPoolLoads(), combineCVTP2I_CVTTP2I(), combineCVTPH2PS(), combineExtractVectorElt(), combineLoad(), combineMaskedLoadConstantMask(), combineSext(), combineTargetShuffle(), CombineVLDDUP(), combineX86AddSub(), combineX86INT_TO_FP(), combineX86SubCmpForFlags(), combineZext(), PerformAddcSubcCombine(), PerformANDCombine(), performBRCONDCombine(), llvm::PPCTargetLowering::PerformDAGCombine(), llvm::RISCVTargetLowering::PerformDAGCombine(), PerformExtractEltToVMOVRRD(), performFlagSettingCombine(), performFPExtendCombine(), llvm::AMDGPUTargetLowering::performLoadCombine(), PerformMULCombine(), llvm::AMDGPUTargetLowering::performMulLoHiCombine(), PerformMVEVLDCombine(), performNEONPostLDSTCombine(), PerformORCombineToBFI(), performPostLD1Combine(), performSignExtendInRegCombine(), PerformVMOVRRDCombine(), reduceMaskedLoadToScalarLoad(), TryCombineBaseUpdate(), and tryCombineWhileLo().

◆ CombineTo() [2/3]

SDValue TargetLowering::DAGCombinerInfo::CombineTo ( SDNode *  N,
SDValue  Res,
bool  AddTo = true 
)

Definition at line 913 of file DAGCombiner.cpp.

References N.

◆ CombineTo() [3/3]

SDValue TargetLowering::DAGCombinerInfo::CombineTo ( SDNode *  N,
SDValue  Res0,
SDValue  Res1,
bool  AddTo = true 
)

Definition at line 918 of file DAGCombiner.cpp.

References N.

◆ CommitTargetLoweringOpt()

void TargetLowering::DAGCombinerInfo::CommitTargetLoweringOpt ( const TargetLoweringOpt &  TLO)

Definition at line 928 of file DAGCombiner.cpp.

Referenced by combineVSelectToBLENDV(), llvm::AMDGPUTargetLowering::PerformDAGCombine(), performTBISimplification(), llvm::TargetLowering::SimplifyDemandedBits(), and llvm::TargetLowering::SimplifyDemandedVectorElts().

◆ getDAGCombineLevel()

CombineLevel llvm::TargetLowering::DAGCombinerInfo::getDAGCombineLevel ( )
inline

Definition at line 4239 of file TargetLowering.h.

References Level.

Referenced by llvm::AMDGPUTargetLowering::combineFMinMaxLegacyImpl(), and llvm::AMDGPUTargetLowering::PerformDAGCombine().

◆ isAfterLegalizeDAG()

bool llvm::TargetLowering::DAGCombinerInfo::isAfterLegalizeDAG ( ) const
inline

Definition at line 4238 of file TargetLowering.h.

References llvm::AfterLegalizeDAG.

Referenced by combineExtractFromVectorLoad(), combineFP_EXTEND(), llvm::VETargetLowering::combineSelect(), llvm::VETargetLowering::combineSelectCC(), combineShiftRightLogical(), llvm::VETargetLowering::combineTRUNCATE(), combineVectorInsert(), performANDCombine(), llvm::PPCTargetLowering::PerformDAGCombine(), llvm::RISCVTargetLowering::PerformDAGCombine(), performDUPCombine(), PerformExtractEltToVMOVRRD(), llvm::ARMTargetLowering::PerformMVEExtCombine(), llvm::ARMTargetLowering::PerformMVETruncCombine(), performORCombine(), performSetccMergeZeroCombine(), and performSVEMulAddSubCombine().

◆ isBeforeLegalize()

bool llvm::TargetLowering::DAGCombinerInfo::isBeforeLegalize ( ) const
inline

Definition at line 4236 of file TargetLowering.h.

References llvm::BeforeLegalizeTypes.

Referenced by AddCombineBUILD_VECTORToVPADDL(), CombineANDShift(), combineBitcast(), combineBITREVERSE(), combineCMov(), combineExtractVectorElt(), combineGatherScatter(), combineINTRINSIC_VOID(), combineINTRINSIC_W_CHAIN(), combineINTRINSIC_WO_CHAIN(), combineLoad(), combineMul(), combineOp_VLToVWOp_VL(), combineOrCmpEqZeroToCtlzSrl(), combineSelect(), combineSetCC(), combineSIntToFP(), combineStore(), combineVSelectToBLENDV(), expandMul(), legalizeScatterGatherIndexType(), performADDCombine(), PerformADDECombine(), performANDSETCCCombine(), performBitcastCombine(), llvm::AMDGPUTargetLowering::PerformDAGCombine(), llvm::SITargetLowering::PerformDAGCombine(), llvm::PPCTargetLowering::PerformDAGCombine(), llvm::RISCVTargetLowering::PerformDAGCombine(), performFirstTrueTestVectorCombine(), performLastTrueTestVectorCombine(), llvm::AMDGPUTargetLowering::performLoadCombine(), performMaskedGatherScatterCombine(), PerformMULCombine(), PerformMVEVLDCombine(), performNEONPostLDSTCombine(), performSelectCombine(), performSETCCCombine(), PerformShiftCombine(), PerformSHLSimplify(), llvm::AMDGPUTargetLowering::performStoreCombine(), performTBISimplification(), performVecReduceBitwiseCombine(), PerformVLDCombine(), llvm::TargetLowering::SimplifyDemandedBits(), llvm::TargetLowering::SimplifyDemandedVectorElts(), llvm::TargetLowering::SimplifySetCC(), tryCombineWhileLo(), and tryConvertSVEWideCompare().

◆ isBeforeLegalizeOps()

bool llvm::TargetLowering::DAGCombinerInfo::isBeforeLegalizeOps ( ) const
inline

Definition at line 4237 of file TargetLowering.h.

References llvm::AfterLegalizeVectorOps.

Referenced by combineAnd(), combineCastedMaskArithmetic(), combineCMov(), combineEXTEND_VECTOR_INREG(), combineEXTRACT_SUBVECTOR(), combineExtractWithShuffle(), combineFMA(), combineFMADDSUB(), combineFneg(), combineGatherScatter(), combineINSERT_SUBVECTOR(), combineLoad(), combineOr(), combineSelect(), combineSext(), combineStore(), combineTargetShuffle(), combineToExtendBoolVectorInReg(), combineVSelectToBLENDV(), combineXor(), combineZext(), convertIntLogicToFPLogic(), llvm::PPCTargetLowering::expandVSXLoadForLE(), llvm::PPCTargetLowering::expandVSXStoreForLE(), performADDCombine(), performAddSubLongCombine(), performANDCombine(), performBITREV_WCombine(), performCMovFPCombine(), performConcatVectorsCombine(), llvm::AMDGPUTargetLowering::PerformDAGCombine(), llvm::R600TargetLowering::PerformDAGCombine(), llvm::HexagonTargetLowering::PerformDAGCombine(), performDivRemCombine(), performExtendCombine(), performExtractSubvectorCombine(), performFPExtendCombine(), performMulCombine(), performORCombine(), performPostLD1Combine(), performScalarToVectorCombine(), performSELECTCombine(), performSHLCombine(), performSignExtendInRegCombine(), performSRLCombine(), performSTORECombine(), performSUBCombine(), performSVEAndCombine(), performTBISimplification(), performXorCombine(), llvm::TargetLowering::SimplifyDemandedBits(), llvm::TargetLowering::SimplifyDemandedVectorElts(), llvm::TargetLowering::SimplifySetCC(), tryCombineFixedPointConvert(), tryCombineLongOpWithDup(), and tryCombineMULLWithUZP1().

◆ isCalledByLegalizer()

bool llvm::TargetLowering::DAGCombinerInfo::isCalledByLegalizer ( ) const
inline

Definition at line 4240 of file TargetLowering.h.

References CalledByLegalizer.

Referenced by CombineANDShift(), llvm::AMDGPUTargetLowering::combineFMinMaxLegacyImpl(), combineMul(), expandMul(), performADDCombine(), PerformMULCombine(), PerformMVEVLDCombine(), performNEONPostLDSTCombine(), PerformShiftCombine(), PerformVLDCombine(), and llvm::TargetLowering::SimplifySetCC().

◆ recursivelyDeleteUnusedNodes()

bool TargetLowering::DAGCombinerInfo::recursivelyDeleteUnusedNodes ( SDNode *  N)

Definition at line 923 of file DAGCombiner.cpp.

References N.

Referenced by combineCVTP2I_CVTTP2I(), combineCVTPH2PS(), combineTargetShuffle(), combineX86INT_TO_FP(), and llvm::RISCVTargetLowering::PerformDAGCombine().

Member Data Documentation

◆ CalledByLegalizer

bool llvm::TargetLowering::DAGCombinerInfo::CalledByLegalizer

Definition at line 4228 of file TargetLowering.h.

Referenced by isCalledByLegalizer().

◆ DAG

SelectionDAG& llvm::TargetLowering::DAGCombinerInfo::DAG

Definition at line 4231 of file TargetLowering.h.

Referenced by AddCombineBUILD_VECTORToVPADDL(), AddCombineTo64bitMLAL(), AddCombineTo64BitSMLAL16(), AddCombineTo64bitUMAAL(), AddCombineToVPADD(), AddCombineVUZPToVPADDL(), CombineANDShift(), CombineBaseUpdate(), llvm::AMDGPUTargetLowering::combineFMinMaxLegacy(), llvm::AMDGPUTargetLowering::combineFMinMaxLegacyImpl(), combineMADConstOne(), combineMulSelectConstOne(), combineOp_VLToVWOp_VL(), llvm::VETargetLowering::combineSelect(), combineSelectAndUse(), llvm::VETargetLowering::combineSelectCC(), llvm::VETargetLowering::combineTRUNCATE(), CombineVLDDUP(), distributeOpThroughSelect(), llvm::PPCTargetLowering::expandVSXLoadForLE(), llvm::PPCTargetLowering::expandVSXStoreForLE(), llvm::AMDGPUTargetLowering::foldFreeOpFromSelect(), legalizeScatterGatherIndexType(), matchPERM(), PerformADDCombine(), performADDCombine(), PerformADDCombineWithOperands(), PerformAddcSubcCombine(), PerformAddeSubeCombine(), performAddSubCombine(), performAddSubLongCombine(), performANDCombine(), PerformANDCombine(), performANDSETCCCombine(), PerformARMBUILD_VECTORCombine(), llvm::AMDGPUTargetLowering::performAssertSZExtCombine(), llvm::SparcTargetLowering::PerformBITCASTCombine(), performBitcastCombine(), PerformBITCASTCombine(), PerformBUILD_VECTORCombine(), performConcatVectorsCombine(), llvm::AMDGPUTargetLowering::performCtlz_CttzCombine(), llvm::AArch64TargetLowering::PerformDAGCombine(), llvm::AMDGPUTargetLowering::PerformDAGCombine(), llvm::R600TargetLowering::PerformDAGCombine(), llvm::SITargetLowering::PerformDAGCombine(), llvm::ARMTargetLowering::PerformDAGCombine(), llvm::HexagonTargetLowering::PerformDAGCombine(), llvm::LoongArchTargetLowering::PerformDAGCombine(), llvm::MipsTargetLowering::PerformDAGCombine(), llvm::MipsSETargetLowering::PerformDAGCombine(), llvm::PPCTargetLowering::PerformDAGCombine(), llvm::RISCVTargetLowering::PerformDAGCombine(), llvm::X86TargetLowering::PerformDAGCombine(), performDUPCombine(), PerformEXTRACTCombine(), PerformExtractEltCombine(), PerformExtractEltToVMOVRRD(), performExtractVectorEltCombine(), llvm::AMDGPUTargetLowering::performFAbsCombine(), performFADDCombine(), PerformFADDCombineWithOperands(), performFirstTrueTestVectorCombine(), performFlagSettingCombine(), llvm::AMDGPUTargetLowering::performFNegCombine(), performFP_TO_INT_SATCombine(), performFP_TO_INTCombine(), PerformHWLoopCombine(), PerformInsertEltCombine(), PerformInsertSubvectorCombine(), llvm::ARMTargetLowering::PerformIntrinsicCombine(), performIntrinsicCombine(), llvm::AMDGPUTargetLowering::performIntrinsicWOChainCombine(), performLastTrueTestVectorCombine(), llvm::AMDGPUTargetLowering::performLoadCombine(), PerformLOADCombine(), performMemPairCombine(), llvm::AMDGPUTargetLowering::performMulCombine(), PerformMULCombine(), llvm::AMDGPUTargetLowering::performMulhsCombine(), llvm::AMDGPUTargetLowering::performMulhuCombine(), llvm::AMDGPUTargetLowering::performMulLoHiCombine(), llvm::ARMTargetLowering::PerformMVEExtCombine(), llvm::ARMTargetLowering::PerformMVETruncCombine(), PerformMVEVLDCombine(), performORCombine(), PerformORCombine(), PerformORCombineToBFI(), PerformORCombineToSMULWBT(), performPostLD1Combine(), PerformPREDICATE_CASTCombine(), llvm::AMDGPUTargetLowering::performRcpCombine(), PerformREMCombine(), llvm::AMDGPUTargetLowering::performSelectCombine(), performSelectCombine(), PerformSELECTCombine(), performSETCCCombine(), PerformSETCCCombine(), performSetccMergeZeroCombine(), PerformShiftCombine(), llvm::AMDGPUTargetLowering::performShlCombine(), PerformSHLSimplify(), llvm::AMDGPUTargetLowering::performSraCombine(), llvm::AMDGPUTargetLowering::performSrlCombine(), llvm::AMDGPUTargetLowering::performStoreCombine(), PerformSTORECombine(), PerformSUBCombine(), performSVEAndCombine(), performSVEMulAddSubCombine(), llvm::AMDGPUTargetLowering::performTruncateCombine(), performTruncateCombine(), PerformVDUPLANECombine(), performVECTOR_SHUFFLECombine(), performVectorExtendCombine(), performVectorExtendToFPCombine(), performVectorShiftCombine(), performVectorTruncZeroCombine(), performVFMADD_VLCombine(), PerformVMOVhrCombine(), PerformVMOVNCombine(), PerformVMOVRRDCombine(), PerformVMULCombine(), PerformVQDMULHCombine(), PerformVQMOVNCombine(), PerformVSELECTCombine(), PerformVSetCCToVCTPCombine(), performVWADDSUBW_VLCombine(), PerformXORCombine(), llvm::TargetLowering::SimplifyDemandedBits(), llvm::TargetLowering::SimplifyDemandedVectorElts(), simplifyMul24(), llvm::TargetLowering::SimplifySetCC(), llvm::AMDGPUTargetLowering::splitBinaryBitConstantOpImpl(), TryCombineBaseUpdate(), tryCombineToBSL(), tryCombineWhileLo(), and TryMULWIDECombine().

◆ DC

void* llvm::TargetLowering::DAGCombinerInfo::DC

Definition at line 4226 of file TargetLowering.h.

Referenced by AddToWorklist().

◆ Level

CombineLevel llvm::TargetLowering::DAGCombinerInfo::Level

Definition at line 4227 of file TargetLowering.h.

Referenced by getDAGCombineLevel().

The documentation for this struct was generated from the following files:
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