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LivePhysRegs.h
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1//===- llvm/CodeGen/LivePhysRegs.h - Live Physical Register Set -*- C++ -*-===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8//
9/// \file
10/// This file implements the LivePhysRegs utility for tracking liveness of
11/// physical registers. This can be used for ad-hoc liveness tracking after
12/// register allocation. You can start with the live-ins/live-outs at the
13/// beginning/end of a block and update the information while walking the
14/// instructions inside the block. This implementation tracks the liveness on a
15/// sub-register granularity.
16///
17/// We assume that the high bits of a physical super-register are not preserved
18/// unless the instruction has an implicit-use operand reading the super-
19/// register.
20///
21/// X86 Example:
22/// %ymm0 = ...
23/// %xmm0 = ... (Kills %xmm0, all %xmm0s sub-registers, and %ymm0)
24///
25/// %ymm0 = ...
26/// %xmm0 = ..., implicit %ymm0 (%ymm0 and all its sub-registers are alive)
27//===----------------------------------------------------------------------===//
28
29#ifndef LLVM_CODEGEN_LIVEPHYSREGS_H
30#define LLVM_CODEGEN_LIVEPHYSREGS_H
31
32#include "llvm/ADT/SparseSet.h"
35#include "llvm/MC/MCRegister.h"
37#include <cassert>
38#include <utility>
39
40namespace llvm {
41
42template <typename T> class ArrayRef;
43
44class MachineInstr;
45class MachineFunction;
46class MachineOperand;
48class raw_ostream;
49
50/// A set of physical registers with utility functions to track liveness
51/// when walking backward/forward through a basic block.
53 const TargetRegisterInfo *TRI = nullptr;
54 using RegisterSet = SparseSet<MCPhysReg, MCPhysReg>;
55 RegisterSet LiveRegs;
56
57public:
58 /// Constructs an unitialized set. init() needs to be called to initialize it.
59 LivePhysRegs() = default;
60
61 /// Constructs and initializes an empty set.
62 LivePhysRegs(const TargetRegisterInfo &TRI) : TRI(&TRI) {
63 LiveRegs.setUniverse(TRI.getNumRegs());
64 }
65
66 LivePhysRegs(const LivePhysRegs&) = delete;
68
69 /// (re-)initializes and clears the set.
70 void init(const TargetRegisterInfo &TRI) {
71 this->TRI = &TRI;
72 LiveRegs.clear();
73 LiveRegs.setUniverse(TRI.getNumRegs());
74 }
75
76 /// Clears the set.
77 void clear() { LiveRegs.clear(); }
78
79 /// Returns true if the set is empty.
80 bool empty() const { return LiveRegs.empty(); }
81
82 /// Adds a physical register and all its sub-registers to the set.
84 assert(TRI && "LivePhysRegs is not initialized.");
85 assert(Reg < TRI->getNumRegs() && "Expected a physical register.");
86 // Constant registers are never considered live.
87 if (TRI->isConstantPhysReg(Reg))
88 return;
89 for (MCPhysReg SubReg : TRI->subregs_inclusive(Reg))
90 LiveRegs.insert(SubReg);
91 }
92
93 /// Removes a physical register, all its sub-registers, and all its
94 /// super-registers from the set.
96 assert(TRI && "LivePhysRegs is not initialized.");
97 assert(Reg < TRI->getNumRegs() && "Expected a physical register.");
98 for (MCRegAliasIterator R(Reg, TRI, true); R.isValid(); ++R)
99 LiveRegs.erase((*R).id());
100 }
101
102 /// Removes physical registers clobbered by the regmask operand \p MO.
103 void removeRegsInMask(const MachineOperand &MO,
104 SmallVectorImpl<std::pair<MCPhysReg, const MachineOperand*>> *Clobbers =
105 nullptr);
106
107 /// Returns true if register \p Reg is contained in the set. This also
108 /// works if only the super register of \p Reg has been defined, because
109 /// addReg() always adds all sub-registers to the set as well.
110 /// Note: Returns false if just some sub registers are live, use available()
111 /// when searching a free register.
112 bool contains(MCRegister Reg) const { return LiveRegs.count(Reg.id()); }
113
114 /// Returns true if register \p Reg and no aliasing register is in the set.
115 bool available(const MachineRegisterInfo &MRI, MCRegister Reg) const;
116
117 /// Remove defined registers and regmask kills from the set.
118 void removeDefs(const MachineInstr &MI);
119
120 /// Add uses to the set.
121 void addUses(const MachineInstr &MI);
122
123 /// Simulates liveness when stepping backwards over an instruction(bundle).
124 /// Remove Defs, add uses. This is the recommended way of calculating
125 /// liveness.
126 void stepBackward(const MachineInstr &MI);
127
128 /// Simulates liveness when stepping forward over an instruction(bundle).
129 /// Remove killed-uses, add defs. This is the not recommended way, because it
130 /// depends on accurate kill flags. If possible use stepBackward() instead of
131 /// this function. The clobbers set will be the list of registers either
132 /// defined or clobbered by a regmask. The operand will identify whether this
133 /// is a regmask or register operand.
134 void stepForward(const MachineInstr &MI,
135 SmallVectorImpl<std::pair<MCPhysReg, const MachineOperand*>> &Clobbers);
136
137 /// Adds all live-in registers of basic block \p MBB.
138 /// Live in registers are the registers in the blocks live-in list and the
139 /// pristine registers.
140 void addLiveIns(const MachineBasicBlock &MBB);
141
142 /// Adds all live-in registers of basic block \p MBB but skips pristine
143 /// registers.
145
146 /// Adds all live-out registers of basic block \p MBB.
147 /// Live out registers are the union of the live-in registers of the successor
148 /// blocks and pristine registers. Live out registers of the end block are the
149 /// callee saved registers.
150 /// If a register is not added by this method, it is guaranteed to not be
151 /// live out from MBB, although a sub-register may be. This is true
152 /// both before and after regalloc.
153 void addLiveOuts(const MachineBasicBlock &MBB);
154
155 /// Adds all live-out registers of basic block \p MBB but skips pristine
156 /// registers.
158
160
161 const_iterator begin() const { return LiveRegs.begin(); }
162 const_iterator end() const { return LiveRegs.end(); }
163
164 /// Prints the currently live registers to \p OS.
165 void print(raw_ostream &OS) const;
166
167 /// Dumps the currently live registers to the debug output.
168 void dump() const;
169
170private:
171 /// Adds a register, taking the lane mask into consideration.
172 void addRegMaskPair(const MachineBasicBlock::RegisterMaskPair &Pair);
173
174 /// Adds live-in registers from basic block \p MBB, taking associated
175 /// lane masks into consideration.
177
178 /// Adds live-out registers from basic block \p MBB, taking associated
179 /// lane masks into consideration.
181
182 /// Adds pristine registers. Pristine registers are callee saved registers
183 /// that are unused in the function.
184 void addPristines(const MachineFunction &MF);
185};
186
188 LR.print(OS);
189 return OS;
190}
191
192/// Computes registers live-in to \p MBB assuming all of its successors
193/// live-in lists are up-to-date. Puts the result into the given LivePhysReg
194/// instance \p LiveRegs.
195void computeLiveIns(LivePhysRegs &LiveRegs, const MachineBasicBlock &MBB);
196
197/// Recomputes dead and kill flags in \p MBB.
198void recomputeLivenessFlags(MachineBasicBlock &MBB);
199
200/// Adds registers contained in \p LiveRegs to the block live-in list of \p MBB.
201/// Does not add reserved registers.
202void addLiveIns(MachineBasicBlock &MBB, const LivePhysRegs &LiveRegs);
203
204/// Convenience function combining computeLiveIns() and addLiveIns().
205void computeAndAddLiveIns(LivePhysRegs &LiveRegs,
206 MachineBasicBlock &MBB);
207
208/// Check if physical register \p Reg is used after \p MBI.
210
211/// Convenience function for recomputing live-in's for a MBB. Returns true if
212/// any changes were made.
214 LivePhysRegs LPR;
215 std::vector<MachineBasicBlock::RegisterMaskPair> OldLiveIns;
216
217 MBB.clearLiveIns(OldLiveIns);
219 MBB.sortUniqueLiveIns();
220
221 const std::vector<MachineBasicBlock::RegisterMaskPair> &NewLiveIns =
222 MBB.getLiveIns();
223 return OldLiveIns != NewLiveIns;
224}
225
226/// Convenience function for recomputing live-in's for a set of MBBs until the
227/// computation converges.
229 MachineBasicBlock *const *Data = MBBs.data();
230 const size_t Len = MBBs.size();
231 while (true) {
232 bool AnyChange = false;
233 for (size_t I = 0; I < Len; ++I)
234 if (recomputeLiveIns(*Data[I]))
235 AnyChange = true;
236 if (!AnyChange)
237 return;
238 }
239}
240
241
242} // end namespace llvm
243
244#endif // LLVM_CODEGEN_LIVEPHYSREGS_H
unsigned SubReg
unsigned const MachineRegisterInfo * MRI
assert(UImm &&(UImm !=~static_cast< T >(0)) &&"Invalid immediate!")
MachineBasicBlock & MBB
IRTranslator LLVM IR MI
static void addBlockLiveOuts(LiveRegUnits &LiveUnits, const MachineBasicBlock &MBB)
Add live-out registers of basic block MBB to LiveUnits.
static void addBlockLiveIns(LiveRegUnits &LiveUnits, const MachineBasicBlock &MBB)
Add live-in registers of basic block MBB to LiveUnits.
#define I(x, y, z)
Definition MD5.cpp:57
Register Reg
Promote Memory to Register
Definition Mem2Reg.cpp:110
This file defines the SparseSet class derived from the version described in Briggs,...
ArrayRef - Represent a constant reference to an array (0 or more elements consecutively in memory),...
Definition ArrayRef.h:40
size_t size() const
size - Get the array size.
Definition ArrayRef.h:142
const T * data() const
Definition ArrayRef.h:139
A set of physical registers with utility functions to track liveness when walking backward/forward th...
void addReg(MCRegister Reg)
Adds a physical register and all its sub-registers to the set.
RegisterSet::const_iterator const_iterator
const_iterator end() const
void clear()
Clears the set.
void stepForward(const MachineInstr &MI, SmallVectorImpl< std::pair< MCPhysReg, const MachineOperand * > > &Clobbers)
Simulates liveness when stepping forward over an instruction(bundle).
LivePhysRegs(const LivePhysRegs &)=delete
void print(raw_ostream &OS) const
Prints the currently live registers to OS.
void stepBackward(const MachineInstr &MI)
Simulates liveness when stepping backwards over an instruction(bundle).
void init(const TargetRegisterInfo &TRI)
(re-)initializes and clears the set.
void addLiveIns(const MachineBasicBlock &MBB)
Adds all live-in registers of basic block MBB.
bool available(const MachineRegisterInfo &MRI, MCRegister Reg) const
Returns true if register Reg and no aliasing register is in the set.
void addUses(const MachineInstr &MI)
Add uses to the set.
void removeDefs(const MachineInstr &MI)
Remove defined registers and regmask kills from the set.
void addLiveOutsNoPristines(const MachineBasicBlock &MBB)
Adds all live-out registers of basic block MBB but skips pristine registers.
LivePhysRegs(const TargetRegisterInfo &TRI)
Constructs and initializes an empty set.
void addLiveOuts(const MachineBasicBlock &MBB)
Adds all live-out registers of basic block MBB.
LivePhysRegs()=default
Constructs an unitialized set. init() needs to be called to initialize it.
void removeReg(MCRegister Reg)
Removes a physical register, all its sub-registers, and all its super-registers from the set.
const_iterator begin() const
void addLiveInsNoPristines(const MachineBasicBlock &MBB)
Adds all live-in registers of basic block MBB but skips pristine registers.
bool contains(MCRegister Reg) const
Returns true if register Reg is contained in the set.
LivePhysRegs & operator=(const LivePhysRegs &)=delete
void removeRegsInMask(const MachineOperand &MO, SmallVectorImpl< std::pair< MCPhysReg, const MachineOperand * > > *Clobbers=nullptr)
Removes physical registers clobbered by the regmask operand MO.
bool empty() const
Returns true if the set is empty.
void dump() const
Dumps the currently live registers to the debug output.
MCRegAliasIterator enumerates all registers aliasing Reg.
Wrapper class representing physical registers. Should be passed by value.
Definition MCRegister.h:41
MachineInstrBundleIterator< MachineInstr > iterator
Representation of each machine instruction.
MachineOperand class - Representation of each machine instruction operand.
MachineRegisterInfo - Keep track of information for virtual and physical registers,...
This class consists of common code factored out of the SmallVector class to reduce code duplication b...
SparseSet - Fast set implementation for objects that can be identified by small unsigned keys.
Definition SparseSet.h:117
typename DenseT::const_iterator const_iterator
Definition SparseSet.h:168
TargetRegisterInfo base class - We assume that the target defines a static array of TargetRegisterDes...
This class implements an extremely fast bulk output stream that can only output to a stream.
Definition raw_ostream.h:53
This is an optimization pass for GlobalISel generic memory operations.
Definition Types.h:26
FunctionAddr VTableAddr uintptr_t uintptr_t Data
Definition InstrProf.h:189
void recomputeLivenessFlags(MachineBasicBlock &MBB)
Recomputes dead and kill flags in MBB.
uint16_t MCPhysReg
An unsigned integer type large enough to represent all physical registers, but not necessarily virtua...
Definition MCRegister.h:21
bool isPhysRegUsedAfter(Register Reg, MachineBasicBlock::iterator MBI)
Check if physical register Reg is used after MBI.
raw_ostream & operator<<(raw_ostream &OS, const APFixedPoint &FX)
void computeAndAddLiveIns(LivePhysRegs &LiveRegs, MachineBasicBlock &MBB)
Convenience function combining computeLiveIns() and addLiveIns().
void computeLiveIns(LivePhysRegs &LiveRegs, const MachineBasicBlock &MBB)
Computes registers live-in to MBB assuming all of its successors live-in lists are up-to-date.
void fullyRecomputeLiveIns(ArrayRef< MachineBasicBlock * > MBBs)
Convenience function for recomputing live-in's for a set of MBBs until the computation converges.
void addLiveIns(MachineBasicBlock &MBB, const LivePhysRegs &LiveRegs)
Adds registers contained in LiveRegs to the block live-in list of MBB.
static bool recomputeLiveIns(MachineBasicBlock &MBB)
Convenience function for recomputing live-in's for a MBB.
Pair of physical register and lane mask.