LLVM  10.0.0svn
BranchFolding.cpp
Go to the documentation of this file.
1 //===- BranchFolding.cpp - Fold machine code branch instructions ----------===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // This pass forwards branches to unconditional branches to make them branch
10 // directly to the target block. This pass often results in dead MBB's, which
11 // it then removes.
12 //
13 // Note that this pass must be run after register allocation, it cannot handle
14 // SSA form. It also must handle virtual registers for targets that emit virtual
15 // ISA (e.g. NVPTX).
16 //
17 //===----------------------------------------------------------------------===//
18 
19 #include "BranchFolding.h"
20 #include "llvm/ADT/BitVector.h"
21 #include "llvm/ADT/DenseMap.h"
22 #include "llvm/ADT/STLExtras.h"
23 #include "llvm/ADT/SmallPtrSet.h"
24 #include "llvm/ADT/SmallSet.h"
25 #include "llvm/ADT/SmallVector.h"
26 #include "llvm/ADT/Statistic.h"
27 #include "llvm/CodeGen/Analysis.h"
47 #include "llvm/IR/DebugLoc.h"
48 #include "llvm/IR/Function.h"
49 #include "llvm/MC/LaneBitmask.h"
50 #include "llvm/MC/MCRegisterInfo.h"
51 #include "llvm/Pass.h"
55 #include "llvm/Support/Debug.h"
59 #include <cassert>
60 #include <cstddef>
61 #include <iterator>
62 #include <numeric>
63 #include <vector>
64 
65 using namespace llvm;
66 
67 #define DEBUG_TYPE "branch-folder"
68 
69 STATISTIC(NumDeadBlocks, "Number of dead blocks removed");
70 STATISTIC(NumBranchOpts, "Number of branches optimized");
71 STATISTIC(NumTailMerge , "Number of block tails merged");
72 STATISTIC(NumHoist , "Number of times common instructions are hoisted");
73 STATISTIC(NumTailCalls, "Number of tail calls optimized");
74 
75 static cl::opt<cl::boolOrDefault> FlagEnableTailMerge("enable-tail-merge",
77 
78 // Throttle for huge numbers of predecessors (compile speed problems)
79 static cl::opt<unsigned>
80 TailMergeThreshold("tail-merge-threshold",
81  cl::desc("Max number of predecessors to consider tail merging"),
82  cl::init(150), cl::Hidden);
83 
84 // Heuristic for tail merging (and, inversely, tail duplication).
85 // TODO: This should be replaced with a target query.
86 static cl::opt<unsigned>
87 TailMergeSize("tail-merge-size",
88  cl::desc("Min number of instructions to consider tail merging"),
89  cl::init(3), cl::Hidden);
90 
91 namespace {
92 
93  /// BranchFolderPass - Wrap branch folder in a machine function pass.
94  class BranchFolderPass : public MachineFunctionPass {
95  public:
96  static char ID;
97 
98  explicit BranchFolderPass(): MachineFunctionPass(ID) {}
99 
100  bool runOnMachineFunction(MachineFunction &MF) override;
101 
102  void getAnalysisUsage(AnalysisUsage &AU) const override {
107  }
108  };
109 
110 } // end anonymous namespace
111 
112 char BranchFolderPass::ID = 0;
113 
115 
116 INITIALIZE_PASS(BranchFolderPass, DEBUG_TYPE,
117  "Control Flow Optimizer", false, false)
118 
119 bool BranchFolderPass::runOnMachineFunction(MachineFunction &MF) {
120  if (skipFunction(MF.getFunction()))
121  return false;
122 
123  TargetPassConfig *PassConfig = &getAnalysis<TargetPassConfig>();
124  // TailMerge can create jump into if branches that make CFG irreducible for
125  // HW that requires structurized CFG.
126  bool EnableTailMerge = !MF.getTarget().requiresStructuredCFG() &&
127  PassConfig->getEnableTailMerge();
128  BranchFolder::MBFIWrapper MBBFreqInfo(
129  getAnalysis<MachineBlockFrequencyInfo>());
130  BranchFolder Folder(EnableTailMerge, /*CommonHoist=*/true, MBBFreqInfo,
131  getAnalysis<MachineBranchProbabilityInfo>());
132  auto *MMIWP = getAnalysisIfAvailable<MachineModuleInfoWrapperPass>();
133  return Folder.OptimizeFunction(
134  MF, MF.getSubtarget().getInstrInfo(), MF.getSubtarget().getRegisterInfo(),
135  MMIWP ? &MMIWP->getMMI() : nullptr);
136 }
137 
138 BranchFolder::BranchFolder(bool defaultEnableTailMerge, bool CommonHoist,
139  MBFIWrapper &FreqInfo,
140  const MachineBranchProbabilityInfo &ProbInfo,
141  unsigned MinTailLength)
142  : EnableHoistCommonCode(CommonHoist), MinCommonTailLength(MinTailLength),
143  MBBFreqInfo(FreqInfo), MBPI(ProbInfo) {
144  if (MinCommonTailLength == 0)
145  MinCommonTailLength = TailMergeSize;
146  switch (FlagEnableTailMerge) {
147  case cl::BOU_UNSET: EnableTailMerge = defaultEnableTailMerge; break;
148  case cl::BOU_TRUE: EnableTailMerge = true; break;
149  case cl::BOU_FALSE: EnableTailMerge = false; break;
150  }
151 }
152 
153 void BranchFolder::RemoveDeadBlock(MachineBasicBlock *MBB) {
154  assert(MBB->pred_empty() && "MBB must be dead!");
155  LLVM_DEBUG(dbgs() << "\nRemoving MBB: " << *MBB);
156 
157  MachineFunction *MF = MBB->getParent();
158  // drop all successors.
159  while (!MBB->succ_empty())
160  MBB->removeSuccessor(MBB->succ_end()-1);
161 
162  // Avoid matching if this pointer gets reused.
163  TriedMerging.erase(MBB);
164 
165  // Update call site info.
166  std::for_each(MBB->begin(), MBB->end(), [MF](const MachineInstr &MI) {
167  if (MI.isCall(MachineInstr::IgnoreBundle))
168  MF->eraseCallSiteInfo(&MI);
169  });
170  // Remove the block.
171  MF->erase(MBB);
172  EHScopeMembership.erase(MBB);
173  if (MLI)
174  MLI->removeBlock(MBB);
175 }
176 
178  const TargetInstrInfo *tii,
179  const TargetRegisterInfo *tri,
180  MachineModuleInfo *mmi,
181  MachineLoopInfo *mli, bool AfterPlacement) {
182  if (!tii) return false;
183 
184  TriedMerging.clear();
185 
186  MachineRegisterInfo &MRI = MF.getRegInfo();
187  AfterBlockPlacement = AfterPlacement;
188  TII = tii;
189  TRI = tri;
190  MMI = mmi;
191  MLI = mli;
192  this->MRI = &MRI;
193 
194  UpdateLiveIns = MRI.tracksLiveness() && TRI->trackLivenessAfterRegAlloc(MF);
195  if (!UpdateLiveIns)
196  MRI.invalidateLiveness();
197 
198  // Fix CFG. The later algorithms expect it to be right.
199  bool MadeChange = false;
200  for (MachineBasicBlock &MBB : MF) {
201  MachineBasicBlock *TBB = nullptr, *FBB = nullptr;
203  if (!TII->analyzeBranch(MBB, TBB, FBB, Cond, true))
204  MadeChange |= MBB.CorrectExtraCFGEdges(TBB, FBB, !Cond.empty());
205  }
206 
207  // Recalculate EH scope membership.
208  EHScopeMembership = getEHScopeMembership(MF);
209 
210  bool MadeChangeThisIteration = true;
211  while (MadeChangeThisIteration) {
212  MadeChangeThisIteration = TailMergeBlocks(MF);
213  // No need to clean up if tail merging does not change anything after the
214  // block placement.
215  if (!AfterBlockPlacement || MadeChangeThisIteration)
216  MadeChangeThisIteration |= OptimizeBranches(MF);
217  if (EnableHoistCommonCode)
218  MadeChangeThisIteration |= HoistCommonCode(MF);
219  MadeChange |= MadeChangeThisIteration;
220  }
221 
222  // See if any jump tables have become dead as the code generator
223  // did its thing.
224  MachineJumpTableInfo *JTI = MF.getJumpTableInfo();
225  if (!JTI)
226  return MadeChange;
227 
228  // Walk the function to find jump tables that are live.
229  BitVector JTIsLive(JTI->getJumpTables().size());
230  for (const MachineBasicBlock &BB : MF) {
231  for (const MachineInstr &I : BB)
232  for (const MachineOperand &Op : I.operands()) {
233  if (!Op.isJTI()) continue;
234 
235  // Remember that this JT is live.
236  JTIsLive.set(Op.getIndex());
237  }
238  }
239 
240  // Finally, remove dead jump tables. This happens when the
241  // indirect jump was unreachable (and thus deleted).
242  for (unsigned i = 0, e = JTIsLive.size(); i != e; ++i)
243  if (!JTIsLive.test(i)) {
244  JTI->RemoveJumpTable(i);
245  MadeChange = true;
246  }
247 
248  return MadeChange;
249 }
250 
251 //===----------------------------------------------------------------------===//
252 // Tail Merging of Blocks
253 //===----------------------------------------------------------------------===//
254 
255 /// HashMachineInstr - Compute a hash value for MI and its operands.
256 static unsigned HashMachineInstr(const MachineInstr &MI) {
257  unsigned Hash = MI.getOpcode();
258  for (unsigned i = 0, e = MI.getNumOperands(); i != e; ++i) {
259  const MachineOperand &Op = MI.getOperand(i);
260 
261  // Merge in bits from the operand if easy. We can't use MachineOperand's
262  // hash_code here because it's not deterministic and we sort by hash value
263  // later.
264  unsigned OperandHash = 0;
265  switch (Op.getType()) {
267  OperandHash = Op.getReg();
268  break;
270  OperandHash = Op.getImm();
271  break;
273  OperandHash = Op.getMBB()->getNumber();
274  break;
278  OperandHash = Op.getIndex();
279  break;
282  // Global address / external symbol are too hard, don't bother, but do
283  // pull in the offset.
284  OperandHash = Op.getOffset();
285  break;
286  default:
287  break;
288  }
289 
290  Hash += ((OperandHash << 3) | Op.getType()) << (i & 31);
291  }
292  return Hash;
293 }
294 
295 /// HashEndOfMBB - Hash the last instruction in the MBB.
296 static unsigned HashEndOfMBB(const MachineBasicBlock &MBB) {
298  if (I == MBB.end())
299  return 0;
300 
301  return HashMachineInstr(*I);
302 }
303 
304 /// Whether MI should be counted as an instruction when calculating common tail.
305 static bool countsAsInstruction(const MachineInstr &MI) {
306  return !(MI.isDebugInstr() || MI.isCFIInstruction());
307 }
308 
309 /// ComputeCommonTailLength - Given two machine basic blocks, compute the number
310 /// of instructions they actually have in common together at their end. Return
311 /// iterators for the first shared instruction in each block.
313  MachineBasicBlock *MBB2,
316  I1 = MBB1->end();
317  I2 = MBB2->end();
318 
319  unsigned TailLen = 0;
320  while (I1 != MBB1->begin() && I2 != MBB2->begin()) {
321  --I1; --I2;
322  // Skip debugging pseudos; necessary to avoid changing the code.
323  while (!countsAsInstruction(*I1)) {
324  if (I1==MBB1->begin()) {
325  while (!countsAsInstruction(*I2)) {
326  if (I2==MBB2->begin()) {
327  // I1==DBG at begin; I2==DBG at begin
328  goto SkipTopCFIAndReturn;
329  }
330  --I2;
331  }
332  ++I2;
333  // I1==DBG at begin; I2==non-DBG, or first of DBGs not at begin
334  goto SkipTopCFIAndReturn;
335  }
336  --I1;
337  }
338  // I1==first (untested) non-DBG preceding known match
339  while (!countsAsInstruction(*I2)) {
340  if (I2==MBB2->begin()) {
341  ++I1;
342  // I1==non-DBG, or first of DBGs not at begin; I2==DBG at begin
343  goto SkipTopCFIAndReturn;
344  }
345  --I2;
346  }
347  // I1, I2==first (untested) non-DBGs preceding known match
348  if (!I1->isIdenticalTo(*I2) ||
349  // FIXME: This check is dubious. It's used to get around a problem where
350  // people incorrectly expect inline asm directives to remain in the same
351  // relative order. This is untenable because normal compiler
352  // optimizations (like this one) may reorder and/or merge these
353  // directives.
354  I1->isInlineAsm()) {
355  ++I1; ++I2;
356  break;
357  }
358  ++TailLen;
359  }
360  // Back past possible debugging pseudos at beginning of block. This matters
361  // when one block differs from the other only by whether debugging pseudos
362  // are present at the beginning. (This way, the various checks later for
363  // I1==MBB1->begin() work as expected.)
364  if (I1 == MBB1->begin() && I2 != MBB2->begin()) {
365  --I2;
366  while (I2->isDebugInstr()) {
367  if (I2 == MBB2->begin())
368  return TailLen;
369  --I2;
370  }
371  ++I2;
372  }
373  if (I2 == MBB2->begin() && I1 != MBB1->begin()) {
374  --I1;
375  while (I1->isDebugInstr()) {
376  if (I1 == MBB1->begin())
377  return TailLen;
378  --I1;
379  }
380  ++I1;
381  }
382 
383 SkipTopCFIAndReturn:
384  // Ensure that I1 and I2 do not point to a CFI_INSTRUCTION. This can happen if
385  // I1 and I2 are non-identical when compared and then one or both of them ends
386  // up pointing to a CFI instruction after being incremented. For example:
387  /*
388  BB1:
389  ...
390  INSTRUCTION_A
391  ADD32ri8 <- last common instruction
392  ...
393  BB2:
394  ...
395  INSTRUCTION_B
396  CFI_INSTRUCTION
397  ADD32ri8 <- last common instruction
398  ...
399  */
400  // When INSTRUCTION_A and INSTRUCTION_B are compared as not equal, after
401  // incrementing the iterators, I1 will point to ADD, however I2 will point to
402  // the CFI instruction. Later on, this leads to BB2 being 'hacked off' at the
403  // wrong place (in ReplaceTailWithBranchTo()) which results in losing this CFI
404  // instruction.
405  while (I1 != MBB1->end() && I1->isCFIInstruction()) {
406  ++I1;
407  }
408 
409  while (I2 != MBB2->end() && I2->isCFIInstruction()) {
410  ++I2;
411  }
412 
413  return TailLen;
414 }
415 
416 void BranchFolder::replaceTailWithBranchTo(MachineBasicBlock::iterator OldInst,
417  MachineBasicBlock &NewDest) {
418  if (UpdateLiveIns) {
419  // OldInst should always point to an instruction.
420  MachineBasicBlock &OldMBB = *OldInst->getParent();
421  LiveRegs.clear();
422  LiveRegs.addLiveOuts(OldMBB);
423  // Move backward to the place where will insert the jump.
424  MachineBasicBlock::iterator I = OldMBB.end();
425  do {
426  --I;
427  LiveRegs.stepBackward(*I);
428  } while (I != OldInst);
429 
430  // Merging the tails may have switched some undef operand to non-undef ones.
431  // Add IMPLICIT_DEFS into OldMBB as necessary to have a definition of the
432  // register.
433  for (MachineBasicBlock::RegisterMaskPair P : NewDest.liveins()) {
434  // We computed the liveins with computeLiveIn earlier and should only see
435  // full registers:
436  assert(P.LaneMask == LaneBitmask::getAll() &&
437  "Can only handle full register.");
438  MCPhysReg Reg = P.PhysReg;
439  if (!LiveRegs.available(*MRI, Reg))
440  continue;
441  DebugLoc DL;
442  BuildMI(OldMBB, OldInst, DL, TII->get(TargetOpcode::IMPLICIT_DEF), Reg);
443  }
444  }
445 
446  TII->ReplaceTailWithBranchTo(OldInst, &NewDest);
447  ++NumTailMerge;
448 }
449 
450 MachineBasicBlock *BranchFolder::SplitMBBAt(MachineBasicBlock &CurMBB,
452  const BasicBlock *BB) {
453  if (!TII->isLegalToSplitMBBAt(CurMBB, BBI1))
454  return nullptr;
455 
456  MachineFunction &MF = *CurMBB.getParent();
457 
458  // Create the fall-through block.
459  MachineFunction::iterator MBBI = CurMBB.getIterator();
461  CurMBB.getParent()->insert(++MBBI, NewMBB);
462 
463  // Move all the successors of this block to the specified block.
464  NewMBB->transferSuccessors(&CurMBB);
465 
466  // Add an edge from CurMBB to NewMBB for the fall-through.
467  CurMBB.addSuccessor(NewMBB);
468 
469  // Splice the code over.
470  NewMBB->splice(NewMBB->end(), &CurMBB, BBI1, CurMBB.end());
471 
472  // NewMBB belongs to the same loop as CurMBB.
473  if (MLI)
474  if (MachineLoop *ML = MLI->getLoopFor(&CurMBB))
475  ML->addBasicBlockToLoop(NewMBB, MLI->getBase());
476 
477  // NewMBB inherits CurMBB's block frequency.
478  MBBFreqInfo.setBlockFreq(NewMBB, MBBFreqInfo.getBlockFreq(&CurMBB));
479 
480  if (UpdateLiveIns)
481  computeAndAddLiveIns(LiveRegs, *NewMBB);
482 
483  // Add the new block to the EH scope.
484  const auto &EHScopeI = EHScopeMembership.find(&CurMBB);
485  if (EHScopeI != EHScopeMembership.end()) {
486  auto n = EHScopeI->second;
487  EHScopeMembership[NewMBB] = n;
488  }
489 
490  return NewMBB;
491 }
492 
493 /// EstimateRuntime - Make a rough estimate for how long it will take to run
494 /// the specified code.
497  unsigned Time = 0;
498  for (; I != E; ++I) {
499  if (!countsAsInstruction(*I))
500  continue;
501  if (I->isCall())
502  Time += 10;
503  else if (I->mayLoad() || I->mayStore())
504  Time += 2;
505  else
506  ++Time;
507  }
508  return Time;
509 }
510 
511 // CurMBB needs to add an unconditional branch to SuccMBB (we removed these
512 // branches temporarily for tail merging). In the case where CurMBB ends
513 // with a conditional branch to the next block, optimize by reversing the
514 // test and conditionally branching to SuccMBB instead.
515 static void FixTail(MachineBasicBlock *CurMBB, MachineBasicBlock *SuccBB,
516  const TargetInstrInfo *TII) {
517  MachineFunction *MF = CurMBB->getParent();
519  MachineBasicBlock *TBB = nullptr, *FBB = nullptr;
521  DebugLoc dl = CurMBB->findBranchDebugLoc();
522  if (I != MF->end() && !TII->analyzeBranch(*CurMBB, TBB, FBB, Cond, true)) {
523  MachineBasicBlock *NextBB = &*I;
524  if (TBB == NextBB && !Cond.empty() && !FBB) {
525  if (!TII->reverseBranchCondition(Cond)) {
526  TII->removeBranch(*CurMBB);
527  TII->insertBranch(*CurMBB, SuccBB, nullptr, Cond, dl);
528  return;
529  }
530  }
531  }
532  TII->insertBranch(*CurMBB, SuccBB, nullptr,
534 }
535 
536 bool
537 BranchFolder::MergePotentialsElt::operator<(const MergePotentialsElt &o) const {
538  if (getHash() < o.getHash())
539  return true;
540  if (getHash() > o.getHash())
541  return false;
542  if (getBlock()->getNumber() < o.getBlock()->getNumber())
543  return true;
544  if (getBlock()->getNumber() > o.getBlock()->getNumber())
545  return false;
546  // _GLIBCXX_DEBUG checks strict weak ordering, which involves comparing
547  // an object with itself.
548 #ifndef _GLIBCXX_DEBUG
549  llvm_unreachable("Predecessor appears twice");
550 #else
551  return false;
552 #endif
553 }
554 
557  auto I = MergedBBFreq.find(MBB);
558 
559  if (I != MergedBBFreq.end())
560  return I->second;
561 
562  return MBFI.getBlockFreq(MBB);
563 }
564 
566  BlockFrequency F) {
567  MergedBBFreq[MBB] = F;
568 }
569 
570 raw_ostream &
572  const MachineBasicBlock *MBB) const {
573  return MBFI.printBlockFreq(OS, getBlockFreq(MBB));
574 }
575 
576 raw_ostream &
578  const BlockFrequency Freq) const {
579  return MBFI.printBlockFreq(OS, Freq);
580 }
581 
583  MBFI.view(Name, isSimple);
584 }
585 
586 uint64_t
588  return MBFI.getEntryFreq();
589 }
590 
591 /// CountTerminators - Count the number of terminators in the given
592 /// block and set I to the position of the first non-terminator, if there
593 /// is one, or MBB->end() otherwise.
594 static unsigned CountTerminators(MachineBasicBlock *MBB,
596  I = MBB->end();
597  unsigned NumTerms = 0;
598  while (true) {
599  if (I == MBB->begin()) {
600  I = MBB->end();
601  break;
602  }
603  --I;
604  if (!I->isTerminator()) break;
605  ++NumTerms;
606  }
607  return NumTerms;
608 }
609 
610 /// A no successor, non-return block probably ends in unreachable and is cold.
611 /// Also consider a block that ends in an indirect branch to be a return block,
612 /// since many targets use plain indirect branches to return.
613 static bool blockEndsInUnreachable(const MachineBasicBlock *MBB) {
614  if (!MBB->succ_empty())
615  return false;
616  if (MBB->empty())
617  return true;
618  return !(MBB->back().isReturn() || MBB->back().isIndirectBranch());
619 }
620 
621 /// ProfitableToMerge - Check if two machine basic blocks have a common tail
622 /// and decide if it would be profitable to merge those tails. Return the
623 /// length of the common tail and iterators to the first common instruction
624 /// in each block.
625 /// MBB1, MBB2 The blocks to check
626 /// MinCommonTailLength Minimum size of tail block to be merged.
627 /// CommonTailLen Out parameter to record the size of the shared tail between
628 /// MBB1 and MBB2
629 /// I1, I2 Iterator references that will be changed to point to the first
630 /// instruction in the common tail shared by MBB1,MBB2
631 /// SuccBB A common successor of MBB1, MBB2 which are in a canonical form
632 /// relative to SuccBB
633 /// PredBB The layout predecessor of SuccBB, if any.
634 /// EHScopeMembership map from block to EH scope #.
635 /// AfterPlacement True if we are merging blocks after layout. Stricter
636 /// thresholds apply to prevent undoing tail-duplication.
637 static bool
639  unsigned MinCommonTailLength, unsigned &CommonTailLen,
642  MachineBasicBlock *PredBB,
643  DenseMap<const MachineBasicBlock *, int> &EHScopeMembership,
644  bool AfterPlacement) {
645  // It is never profitable to tail-merge blocks from two different EH scopes.
646  if (!EHScopeMembership.empty()) {
647  auto EHScope1 = EHScopeMembership.find(MBB1);
648  assert(EHScope1 != EHScopeMembership.end());
649  auto EHScope2 = EHScopeMembership.find(MBB2);
650  assert(EHScope2 != EHScopeMembership.end());
651  if (EHScope1->second != EHScope2->second)
652  return false;
653  }
654 
655  CommonTailLen = ComputeCommonTailLength(MBB1, MBB2, I1, I2);
656  if (CommonTailLen == 0)
657  return false;
658  LLVM_DEBUG(dbgs() << "Common tail length of " << printMBBReference(*MBB1)
659  << " and " << printMBBReference(*MBB2) << " is "
660  << CommonTailLen << '\n');
661 
662  // It's almost always profitable to merge any number of non-terminator
663  // instructions with the block that falls through into the common successor.
664  // This is true only for a single successor. For multiple successors, we are
665  // trading a conditional branch for an unconditional one.
666  // TODO: Re-visit successor size for non-layout tail merging.
667  if ((MBB1 == PredBB || MBB2 == PredBB) &&
668  (!AfterPlacement || MBB1->succ_size() == 1)) {
670  unsigned NumTerms = CountTerminators(MBB1 == PredBB ? MBB2 : MBB1, I);
671  if (CommonTailLen > NumTerms)
672  return true;
673  }
674 
675  // If these are identical non-return blocks with no successors, merge them.
676  // Such blocks are typically cold calls to noreturn functions like abort, and
677  // are unlikely to become a fallthrough target after machine block placement.
678  // Tail merging these blocks is unlikely to create additional unconditional
679  // branches, and will reduce the size of this cold code.
680  if (I1 == MBB1->begin() && I2 == MBB2->begin() &&
682  return true;
683 
684  // If one of the blocks can be completely merged and happens to be in
685  // a position where the other could fall through into it, merge any number
686  // of instructions, because it can be done without a branch.
687  // TODO: If the blocks are not adjacent, move one of them so that they are?
688  if (MBB1->isLayoutSuccessor(MBB2) && I2 == MBB2->begin())
689  return true;
690  if (MBB2->isLayoutSuccessor(MBB1) && I1 == MBB1->begin())
691  return true;
692 
693  // If both blocks are identical and end in a branch, merge them unless they
694  // both have a fallthrough predecessor and successor.
695  // We can only do this after block placement because it depends on whether
696  // there are fallthroughs, and we don't know until after layout.
697  if (AfterPlacement && I1 == MBB1->begin() && I2 == MBB2->begin()) {
698  auto BothFallThrough = [](MachineBasicBlock *MBB) {
699  if (MBB->succ_size() != 0 && !MBB->canFallThrough())
700  return false;
702  MachineFunction *MF = MBB->getParent();
703  return (MBB != &*MF->begin()) && std::prev(I)->canFallThrough();
704  };
705  if (!BothFallThrough(MBB1) || !BothFallThrough(MBB2))
706  return true;
707  }
708 
709  // If both blocks have an unconditional branch temporarily stripped out,
710  // count that as an additional common instruction for the following
711  // heuristics. This heuristic is only accurate for single-succ blocks, so to
712  // make sure that during layout merging and duplicating don't crash, we check
713  // for that when merging during layout.
714  unsigned EffectiveTailLen = CommonTailLen;
715  if (SuccBB && MBB1 != PredBB && MBB2 != PredBB &&
716  (MBB1->succ_size() == 1 || !AfterPlacement) &&
717  !MBB1->back().isBarrier() &&
718  !MBB2->back().isBarrier())
719  ++EffectiveTailLen;
720 
721  // Check if the common tail is long enough to be worthwhile.
722  if (EffectiveTailLen >= MinCommonTailLength)
723  return true;
724 
725  // If we are optimizing for code size, 2 instructions in common is enough if
726  // we don't have to split a block. At worst we will be introducing 1 new
727  // branch instruction, which is likely to be smaller than the 2
728  // instructions that would be deleted in the merge.
729  MachineFunction *MF = MBB1->getParent();
730  return EffectiveTailLen >= 2 && MF->getFunction().hasOptSize() &&
731  (I1 == MBB1->begin() || I2 == MBB2->begin());
732 }
733 
734 unsigned BranchFolder::ComputeSameTails(unsigned CurHash,
735  unsigned MinCommonTailLength,
736  MachineBasicBlock *SuccBB,
737  MachineBasicBlock *PredBB) {
738  unsigned maxCommonTailLength = 0U;
739  SameTails.clear();
740  MachineBasicBlock::iterator TrialBBI1, TrialBBI2;
741  MPIterator HighestMPIter = std::prev(MergePotentials.end());
742  for (MPIterator CurMPIter = std::prev(MergePotentials.end()),
743  B = MergePotentials.begin();
744  CurMPIter != B && CurMPIter->getHash() == CurHash; --CurMPIter) {
745  for (MPIterator I = std::prev(CurMPIter); I->getHash() == CurHash; --I) {
746  unsigned CommonTailLen;
747  if (ProfitableToMerge(CurMPIter->getBlock(), I->getBlock(),
748  MinCommonTailLength,
749  CommonTailLen, TrialBBI1, TrialBBI2,
750  SuccBB, PredBB,
751  EHScopeMembership,
752  AfterBlockPlacement)) {
753  if (CommonTailLen > maxCommonTailLength) {
754  SameTails.clear();
755  maxCommonTailLength = CommonTailLen;
756  HighestMPIter = CurMPIter;
757  SameTails.push_back(SameTailElt(CurMPIter, TrialBBI1));
758  }
759  if (HighestMPIter == CurMPIter &&
760  CommonTailLen == maxCommonTailLength)
761  SameTails.push_back(SameTailElt(I, TrialBBI2));
762  }
763  if (I == B)
764  break;
765  }
766  }
767  return maxCommonTailLength;
768 }
769 
770 void BranchFolder::RemoveBlocksWithHash(unsigned CurHash,
771  MachineBasicBlock *SuccBB,
772  MachineBasicBlock *PredBB) {
773  MPIterator CurMPIter, B;
774  for (CurMPIter = std::prev(MergePotentials.end()),
775  B = MergePotentials.begin();
776  CurMPIter->getHash() == CurHash; --CurMPIter) {
777  // Put the unconditional branch back, if we need one.
778  MachineBasicBlock *CurMBB = CurMPIter->getBlock();
779  if (SuccBB && CurMBB != PredBB)
780  FixTail(CurMBB, SuccBB, TII);
781  if (CurMPIter == B)
782  break;
783  }
784  if (CurMPIter->getHash() != CurHash)
785  CurMPIter++;
786  MergePotentials.erase(CurMPIter, MergePotentials.end());
787 }
788 
789 bool BranchFolder::CreateCommonTailOnlyBlock(MachineBasicBlock *&PredBB,
790  MachineBasicBlock *SuccBB,
791  unsigned maxCommonTailLength,
792  unsigned &commonTailIndex) {
793  commonTailIndex = 0;
794  unsigned TimeEstimate = ~0U;
795  for (unsigned i = 0, e = SameTails.size(); i != e; ++i) {
796  // Use PredBB if possible; that doesn't require a new branch.
797  if (SameTails[i].getBlock() == PredBB) {
798  commonTailIndex = i;
799  break;
800  }
801  // Otherwise, make a (fairly bogus) choice based on estimate of
802  // how long it will take the various blocks to execute.
803  unsigned t = EstimateRuntime(SameTails[i].getBlock()->begin(),
804  SameTails[i].getTailStartPos());
805  if (t <= TimeEstimate) {
806  TimeEstimate = t;
807  commonTailIndex = i;
808  }
809  }
810 
812  SameTails[commonTailIndex].getTailStartPos();
813  MachineBasicBlock *MBB = SameTails[commonTailIndex].getBlock();
814 
815  LLVM_DEBUG(dbgs() << "\nSplitting " << printMBBReference(*MBB) << ", size "
816  << maxCommonTailLength);
817 
818  // If the split block unconditionally falls-thru to SuccBB, it will be
819  // merged. In control flow terms it should then take SuccBB's name. e.g. If
820  // SuccBB is an inner loop, the common tail is still part of the inner loop.
821  const BasicBlock *BB = (SuccBB && MBB->succ_size() == 1) ?
822  SuccBB->getBasicBlock() : MBB->getBasicBlock();
823  MachineBasicBlock *newMBB = SplitMBBAt(*MBB, BBI, BB);
824  if (!newMBB) {
825  LLVM_DEBUG(dbgs() << "... failed!");
826  return false;
827  }
828 
829  SameTails[commonTailIndex].setBlock(newMBB);
830  SameTails[commonTailIndex].setTailStartPos(newMBB->begin());
831 
832  // If we split PredBB, newMBB is the new predecessor.
833  if (PredBB == MBB)
834  PredBB = newMBB;
835 
836  return true;
837 }
838 
839 static void
841  MachineBasicBlock &MBBCommon) {
842  MachineBasicBlock *MBB = MBBIStartPos->getParent();
843  // Note CommonTailLen does not necessarily matches the size of
844  // the common BB nor all its instructions because of debug
845  // instructions differences.
846  unsigned CommonTailLen = 0;
847  for (auto E = MBB->end(); MBBIStartPos != E; ++MBBIStartPos)
848  ++CommonTailLen;
849 
852  MachineBasicBlock::reverse_iterator MBBICommon = MBBCommon.rbegin();
853  MachineBasicBlock::reverse_iterator MBBIECommon = MBBCommon.rend();
854 
855  while (CommonTailLen--) {
856  assert(MBBI != MBBIE && "Reached BB end within common tail length!");
857  (void)MBBIE;
858 
859  if (!countsAsInstruction(*MBBI)) {
860  ++MBBI;
861  continue;
862  }
863 
864  while ((MBBICommon != MBBIECommon) && !countsAsInstruction(*MBBICommon))
865  ++MBBICommon;
866 
867  assert(MBBICommon != MBBIECommon &&
868  "Reached BB end within common tail length!");
869  assert(MBBICommon->isIdenticalTo(*MBBI) && "Expected matching MIIs!");
870 
871  // Merge MMOs from memory operations in the common block.
872  if (MBBICommon->mayLoad() || MBBICommon->mayStore())
873  MBBICommon->cloneMergedMemRefs(*MBB->getParent(), {&*MBBICommon, &*MBBI});
874  // Drop undef flags if they aren't present in all merged instructions.
875  for (unsigned I = 0, E = MBBICommon->getNumOperands(); I != E; ++I) {
876  MachineOperand &MO = MBBICommon->getOperand(I);
877  if (MO.isReg() && MO.isUndef()) {
878  const MachineOperand &OtherMO = MBBI->getOperand(I);
879  if (!OtherMO.isUndef())
880  MO.setIsUndef(false);
881  }
882  }
883 
884  ++MBBI;
885  ++MBBICommon;
886  }
887 }
888 
889 void BranchFolder::mergeCommonTails(unsigned commonTailIndex) {
890  MachineBasicBlock *MBB = SameTails[commonTailIndex].getBlock();
891 
892  std::vector<MachineBasicBlock::iterator> NextCommonInsts(SameTails.size());
893  for (unsigned int i = 0 ; i != SameTails.size() ; ++i) {
894  if (i != commonTailIndex) {
895  NextCommonInsts[i] = SameTails[i].getTailStartPos();
896  mergeOperations(SameTails[i].getTailStartPos(), *MBB);
897  } else {
898  assert(SameTails[i].getTailStartPos() == MBB->begin() &&
899  "MBB is not a common tail only block");
900  }
901  }
902 
903  for (auto &MI : *MBB) {
904  if (!countsAsInstruction(MI))
905  continue;
906  DebugLoc DL = MI.getDebugLoc();
907  for (unsigned int i = 0 ; i < NextCommonInsts.size() ; i++) {
908  if (i == commonTailIndex)
909  continue;
910 
911  auto &Pos = NextCommonInsts[i];
912  assert(Pos != SameTails[i].getBlock()->end() &&
913  "Reached BB end within common tail");
914  while (!countsAsInstruction(*Pos)) {
915  ++Pos;
916  assert(Pos != SameTails[i].getBlock()->end() &&
917  "Reached BB end within common tail");
918  }
919  assert(MI.isIdenticalTo(*Pos) && "Expected matching MIIs!");
920  DL = DILocation::getMergedLocation(DL, Pos->getDebugLoc());
921  NextCommonInsts[i] = ++Pos;
922  }
923  MI.setDebugLoc(DL);
924  }
925 
926  if (UpdateLiveIns) {
927  LivePhysRegs NewLiveIns(*TRI);
928  computeLiveIns(NewLiveIns, *MBB);
929  LiveRegs.init(*TRI);
930 
931  // The flag merging may lead to some register uses no longer using the
932  // <undef> flag, add IMPLICIT_DEFs in the predecessors as necessary.
933  for (MachineBasicBlock *Pred : MBB->predecessors()) {
934  LiveRegs.clear();
935  LiveRegs.addLiveOuts(*Pred);
936  MachineBasicBlock::iterator InsertBefore = Pred->getFirstTerminator();
937  for (unsigned Reg : NewLiveIns) {
938  if (!LiveRegs.available(*MRI, Reg))
939  continue;
940  DebugLoc DL;
941  BuildMI(*Pred, InsertBefore, DL, TII->get(TargetOpcode::IMPLICIT_DEF),
942  Reg);
943  }
944  }
945 
946  MBB->clearLiveIns();
947  addLiveIns(*MBB, NewLiveIns);
948  }
949 }
950 
951 // See if any of the blocks in MergePotentials (which all have SuccBB as a
952 // successor, or all have no successor if it is null) can be tail-merged.
953 // If there is a successor, any blocks in MergePotentials that are not
954 // tail-merged and are not immediately before Succ must have an unconditional
955 // branch to Succ added (but the predecessor/successor lists need no
956 // adjustment). The lone predecessor of Succ that falls through into Succ,
957 // if any, is given in PredBB.
958 // MinCommonTailLength - Except for the special cases below, tail-merge if
959 // there are at least this many instructions in common.
960 bool BranchFolder::TryTailMergeBlocks(MachineBasicBlock *SuccBB,
961  MachineBasicBlock *PredBB,
962  unsigned MinCommonTailLength) {
963  bool MadeChange = false;
964 
965  LLVM_DEBUG(
966  dbgs() << "\nTryTailMergeBlocks: ";
967  for (unsigned i = 0, e = MergePotentials.size(); i != e; ++i) dbgs()
968  << printMBBReference(*MergePotentials[i].getBlock())
969  << (i == e - 1 ? "" : ", ");
970  dbgs() << "\n"; if (SuccBB) {
971  dbgs() << " with successor " << printMBBReference(*SuccBB) << '\n';
972  if (PredBB)
973  dbgs() << " which has fall-through from "
974  << printMBBReference(*PredBB) << "\n";
975  } dbgs() << "Looking for common tails of at least "
976  << MinCommonTailLength << " instruction"
977  << (MinCommonTailLength == 1 ? "" : "s") << '\n';);
978 
979  // Sort by hash value so that blocks with identical end sequences sort
980  // together.
981  array_pod_sort(MergePotentials.begin(), MergePotentials.end());
982 
983  // Walk through equivalence sets looking for actual exact matches.
984  while (MergePotentials.size() > 1) {
985  unsigned CurHash = MergePotentials.back().getHash();
986 
987  // Build SameTails, identifying the set of blocks with this hash code
988  // and with the maximum number of instructions in common.
989  unsigned maxCommonTailLength = ComputeSameTails(CurHash,
990  MinCommonTailLength,
991  SuccBB, PredBB);
992 
993  // If we didn't find any pair that has at least MinCommonTailLength
994  // instructions in common, remove all blocks with this hash code and retry.
995  if (SameTails.empty()) {
996  RemoveBlocksWithHash(CurHash, SuccBB, PredBB);
997  continue;
998  }
999 
1000  // If one of the blocks is the entire common tail (and not the entry
1001  // block, which we can't jump to), we can treat all blocks with this same
1002  // tail at once. Use PredBB if that is one of the possibilities, as that
1003  // will not introduce any extra branches.
1004  MachineBasicBlock *EntryBB =
1005  &MergePotentials.front().getBlock()->getParent()->front();
1006  unsigned commonTailIndex = SameTails.size();
1007  // If there are two blocks, check to see if one can be made to fall through
1008  // into the other.
1009  if (SameTails.size() == 2 &&
1010  SameTails[0].getBlock()->isLayoutSuccessor(SameTails[1].getBlock()) &&
1011  SameTails[1].tailIsWholeBlock())
1012  commonTailIndex = 1;
1013  else if (SameTails.size() == 2 &&
1014  SameTails[1].getBlock()->isLayoutSuccessor(
1015  SameTails[0].getBlock()) &&
1016  SameTails[0].tailIsWholeBlock())
1017  commonTailIndex = 0;
1018  else {
1019  // Otherwise just pick one, favoring the fall-through predecessor if
1020  // there is one.
1021  for (unsigned i = 0, e = SameTails.size(); i != e; ++i) {
1022  MachineBasicBlock *MBB = SameTails[i].getBlock();
1023  if (MBB == EntryBB && SameTails[i].tailIsWholeBlock())
1024  continue;
1025  if (MBB == PredBB) {
1026  commonTailIndex = i;
1027  break;
1028  }
1029  if (SameTails[i].tailIsWholeBlock())
1030  commonTailIndex = i;
1031  }
1032  }
1033 
1034  if (commonTailIndex == SameTails.size() ||
1035  (SameTails[commonTailIndex].getBlock() == PredBB &&
1036  !SameTails[commonTailIndex].tailIsWholeBlock())) {
1037  // None of the blocks consist entirely of the common tail.
1038  // Split a block so that one does.
1039  if (!CreateCommonTailOnlyBlock(PredBB, SuccBB,
1040  maxCommonTailLength, commonTailIndex)) {
1041  RemoveBlocksWithHash(CurHash, SuccBB, PredBB);
1042  continue;
1043  }
1044  }
1045 
1046  MachineBasicBlock *MBB = SameTails[commonTailIndex].getBlock();
1047 
1048  // Recompute common tail MBB's edge weights and block frequency.
1049  setCommonTailEdgeWeights(*MBB);
1050 
1051  // Merge debug locations, MMOs and undef flags across identical instructions
1052  // for common tail.
1053  mergeCommonTails(commonTailIndex);
1054 
1055  // MBB is common tail. Adjust all other BB's to jump to this one.
1056  // Traversal must be forwards so erases work.
1057  LLVM_DEBUG(dbgs() << "\nUsing common tail in " << printMBBReference(*MBB)
1058  << " for ");
1059  for (unsigned int i=0, e = SameTails.size(); i != e; ++i) {
1060  if (commonTailIndex == i)
1061  continue;
1062  LLVM_DEBUG(dbgs() << printMBBReference(*SameTails[i].getBlock())
1063  << (i == e - 1 ? "" : ", "));
1064  // Hack the end off BB i, making it jump to BB commonTailIndex instead.
1065  replaceTailWithBranchTo(SameTails[i].getTailStartPos(), *MBB);
1066  // BB i is no longer a predecessor of SuccBB; remove it from the worklist.
1067  MergePotentials.erase(SameTails[i].getMPIter());
1068  }
1069  LLVM_DEBUG(dbgs() << "\n");
1070  // We leave commonTailIndex in the worklist in case there are other blocks
1071  // that match it with a smaller number of instructions.
1072  MadeChange = true;
1073  }
1074  return MadeChange;
1075 }
1076 
1077 bool BranchFolder::TailMergeBlocks(MachineFunction &MF) {
1078  bool MadeChange = false;
1079  if (!EnableTailMerge)
1080  return MadeChange;
1081 
1082  // First find blocks with no successors.
1083  // Block placement may create new tail merging opportunities for these blocks.
1084  MergePotentials.clear();
1085  for (MachineBasicBlock &MBB : MF) {
1086  if (MergePotentials.size() == TailMergeThreshold)
1087  break;
1088  if (!TriedMerging.count(&MBB) && MBB.succ_empty())
1089  MergePotentials.push_back(MergePotentialsElt(HashEndOfMBB(MBB), &MBB));
1090  }
1091 
1092  // If this is a large problem, avoid visiting the same basic blocks
1093  // multiple times.
1094  if (MergePotentials.size() == TailMergeThreshold)
1095  for (unsigned i = 0, e = MergePotentials.size(); i != e; ++i)
1096  TriedMerging.insert(MergePotentials[i].getBlock());
1097 
1098  // See if we can do any tail merging on those.
1099  if (MergePotentials.size() >= 2)
1100  MadeChange |= TryTailMergeBlocks(nullptr, nullptr, MinCommonTailLength);
1101 
1102  // Look at blocks (IBB) with multiple predecessors (PBB).
1103  // We change each predecessor to a canonical form, by
1104  // (1) temporarily removing any unconditional branch from the predecessor
1105  // to IBB, and
1106  // (2) alter conditional branches so they branch to the other block
1107  // not IBB; this may require adding back an unconditional branch to IBB
1108  // later, where there wasn't one coming in. E.g.
1109  // Bcc IBB
1110  // fallthrough to QBB
1111  // here becomes
1112  // Bncc QBB
1113  // with a conceptual B to IBB after that, which never actually exists.
1114  // With those changes, we see whether the predecessors' tails match,
1115  // and merge them if so. We change things out of canonical form and
1116  // back to the way they were later in the process. (OptimizeBranches
1117  // would undo some of this, but we can't use it, because we'd get into
1118  // a compile-time infinite loop repeatedly doing and undoing the same
1119  // transformations.)
1120 
1121  for (MachineFunction::iterator I = std::next(MF.begin()), E = MF.end();
1122  I != E; ++I) {
1123  if (I->pred_size() < 2) continue;
1125  MachineBasicBlock *IBB = &*I;
1126  MachineBasicBlock *PredBB = &*std::prev(I);
1127  MergePotentials.clear();
1128  MachineLoop *ML;
1129 
1130  // Bail if merging after placement and IBB is the loop header because
1131  // -- If merging predecessors that belong to the same loop as IBB, the
1132  // common tail of merged predecessors may become the loop top if block
1133  // placement is called again and the predecessors may branch to this common
1134  // tail and require more branches. This can be relaxed if
1135  // MachineBlockPlacement::findBestLoopTop is more flexible.
1136  // --If merging predecessors that do not belong to the same loop as IBB, the
1137  // loop info of IBB's loop and the other loops may be affected. Calling the
1138  // block placement again may make big change to the layout and eliminate the
1139  // reason to do tail merging here.
1140  if (AfterBlockPlacement && MLI) {
1141  ML = MLI->getLoopFor(IBB);
1142  if (ML && IBB == ML->getHeader())
1143  continue;
1144  }
1145 
1146  for (MachineBasicBlock *PBB : I->predecessors()) {
1147  if (MergePotentials.size() == TailMergeThreshold)
1148  break;
1149 
1150  if (TriedMerging.count(PBB))
1151  continue;
1152 
1153  // Skip blocks that loop to themselves, can't tail merge these.
1154  if (PBB == IBB)
1155  continue;
1156 
1157  // Visit each predecessor only once.
1158  if (!UniquePreds.insert(PBB).second)
1159  continue;
1160 
1161  // Skip blocks which may jump to a landing pad. Can't tail merge these.
1162  if (PBB->hasEHPadSuccessor())
1163  continue;
1164 
1165  // After block placement, only consider predecessors that belong to the
1166  // same loop as IBB. The reason is the same as above when skipping loop
1167  // header.
1168  if (AfterBlockPlacement && MLI)
1169  if (ML != MLI->getLoopFor(PBB))
1170  continue;
1171 
1172  MachineBasicBlock *TBB = nullptr, *FBB = nullptr;
1174  if (!TII->analyzeBranch(*PBB, TBB, FBB, Cond, true)) {
1175  // Failing case: IBB is the target of a cbr, and we cannot reverse the
1176  // branch.
1177  SmallVector<MachineOperand, 4> NewCond(Cond);
1178  if (!Cond.empty() && TBB == IBB) {
1179  if (TII->reverseBranchCondition(NewCond))
1180  continue;
1181  // This is the QBB case described above
1182  if (!FBB) {
1183  auto Next = ++PBB->getIterator();
1184  if (Next != MF.end())
1185  FBB = &*Next;
1186  }
1187  }
1188 
1189  // Remove the unconditional branch at the end, if any.
1190  if (TBB && (Cond.empty() || FBB)) {
1191  DebugLoc dl = PBB->findBranchDebugLoc();
1192  TII->removeBranch(*PBB);
1193  if (!Cond.empty())
1194  // reinsert conditional branch only, for now
1195  TII->insertBranch(*PBB, (TBB == IBB) ? FBB : TBB, nullptr,
1196  NewCond, dl);
1197  }
1198 
1199  MergePotentials.push_back(MergePotentialsElt(HashEndOfMBB(*PBB), PBB));
1200  }
1201  }
1202 
1203  // If this is a large problem, avoid visiting the same basic blocks multiple
1204  // times.
1205  if (MergePotentials.size() == TailMergeThreshold)
1206  for (unsigned i = 0, e = MergePotentials.size(); i != e; ++i)
1207  TriedMerging.insert(MergePotentials[i].getBlock());
1208 
1209  if (MergePotentials.size() >= 2)
1210  MadeChange |= TryTailMergeBlocks(IBB, PredBB, MinCommonTailLength);
1211 
1212  // Reinsert an unconditional branch if needed. The 1 below can occur as a
1213  // result of removing blocks in TryTailMergeBlocks.
1214  PredBB = &*std::prev(I); // this may have been changed in TryTailMergeBlocks
1215  if (MergePotentials.size() == 1 &&
1216  MergePotentials.begin()->getBlock() != PredBB)
1217  FixTail(MergePotentials.begin()->getBlock(), IBB, TII);
1218  }
1219 
1220  return MadeChange;
1221 }
1222 
1223 void BranchFolder::setCommonTailEdgeWeights(MachineBasicBlock &TailMBB) {
1224  SmallVector<BlockFrequency, 2> EdgeFreqLs(TailMBB.succ_size());
1225  BlockFrequency AccumulatedMBBFreq;
1226 
1227  // Aggregate edge frequency of successor edge j:
1228  // edgeFreq(j) = sum (freq(bb) * edgeProb(bb, j)),
1229  // where bb is a basic block that is in SameTails.
1230  for (const auto &Src : SameTails) {
1231  const MachineBasicBlock *SrcMBB = Src.getBlock();
1232  BlockFrequency BlockFreq = MBBFreqInfo.getBlockFreq(SrcMBB);
1233  AccumulatedMBBFreq += BlockFreq;
1234 
1235  // It is not necessary to recompute edge weights if TailBB has less than two
1236  // successors.
1237  if (TailMBB.succ_size() <= 1)
1238  continue;
1239 
1240  auto EdgeFreq = EdgeFreqLs.begin();
1241 
1242  for (auto SuccI = TailMBB.succ_begin(), SuccE = TailMBB.succ_end();
1243  SuccI != SuccE; ++SuccI, ++EdgeFreq)
1244  *EdgeFreq += BlockFreq * MBPI.getEdgeProbability(SrcMBB, *SuccI);
1245  }
1246 
1247  MBBFreqInfo.setBlockFreq(&TailMBB, AccumulatedMBBFreq);
1248 
1249  if (TailMBB.succ_size() <= 1)
1250  return;
1251 
1252  auto SumEdgeFreq =
1253  std::accumulate(EdgeFreqLs.begin(), EdgeFreqLs.end(), BlockFrequency(0))
1254  .getFrequency();
1255  auto EdgeFreq = EdgeFreqLs.begin();
1256 
1257  if (SumEdgeFreq > 0) {
1258  for (auto SuccI = TailMBB.succ_begin(), SuccE = TailMBB.succ_end();
1259  SuccI != SuccE; ++SuccI, ++EdgeFreq) {
1261  EdgeFreq->getFrequency(), SumEdgeFreq);
1262  TailMBB.setSuccProbability(SuccI, Prob);
1263  }
1264  }
1265 }
1266 
1267 //===----------------------------------------------------------------------===//
1268 // Branch Optimization
1269 //===----------------------------------------------------------------------===//
1270 
1271 bool BranchFolder::OptimizeBranches(MachineFunction &MF) {
1272  bool MadeChange = false;
1273 
1274  // Make sure blocks are numbered in order
1275  MF.RenumberBlocks();
1276  // Renumbering blocks alters EH scope membership, recalculate it.
1277  EHScopeMembership = getEHScopeMembership(MF);
1278 
1279  for (MachineFunction::iterator I = std::next(MF.begin()), E = MF.end();
1280  I != E; ) {
1281  MachineBasicBlock *MBB = &*I++;
1282  MadeChange |= OptimizeBlock(MBB);
1283 
1284  // If it is dead, remove it.
1285  if (MBB->pred_empty()) {
1286  RemoveDeadBlock(MBB);
1287  MadeChange = true;
1288  ++NumDeadBlocks;
1289  }
1290  }
1291 
1292  return MadeChange;
1293 }
1294 
1295 // Blocks should be considered empty if they contain only debug info;
1296 // else the debug info would affect codegen.
1297 static bool IsEmptyBlock(MachineBasicBlock *MBB) {
1298  return MBB->getFirstNonDebugInstr() == MBB->end();
1299 }
1300 
1301 // Blocks with only debug info and branches should be considered the same
1302 // as blocks with only branches.
1305  assert(I != MBB->end() && "empty block!");
1306  return I->isBranch();
1307 }
1308 
1309 /// IsBetterFallthrough - Return true if it would be clearly better to
1310 /// fall-through to MBB1 than to fall through into MBB2. This has to return
1311 /// a strict ordering, returning true for both (MBB1,MBB2) and (MBB2,MBB1) will
1312 /// result in infinite loops.
1314  MachineBasicBlock *MBB2) {
1315  assert(MBB1 && MBB2 && "Unknown MachineBasicBlock");
1316 
1317  // Right now, we use a simple heuristic. If MBB2 ends with a call, and
1318  // MBB1 doesn't, we prefer to fall through into MBB1. This allows us to
1319  // optimize branches that branch to either a return block or an assert block
1320  // into a fallthrough to the return.
1323  if (MBB1I == MBB1->end() || MBB2I == MBB2->end())
1324  return false;
1325 
1326  // If there is a clear successor ordering we make sure that one block
1327  // will fall through to the next
1328  if (MBB1->isSuccessor(MBB2)) return true;
1329  if (MBB2->isSuccessor(MBB1)) return false;
1330 
1331  return MBB2I->isCall() && !MBB1I->isCall();
1332 }
1333 
1334 /// getBranchDebugLoc - Find and return, if any, the DebugLoc of the branch
1335 /// instructions on the block.
1338  if (I != MBB.end() && I->isBranch())
1339  return I->getDebugLoc();
1340  return DebugLoc();
1341 }
1342 
1344  MachineBasicBlock &MBB,
1345  MachineBasicBlock &PredMBB) {
1346  auto InsertBefore = PredMBB.getFirstTerminator();
1347  for (MachineInstr &MI : MBB.instrs())
1348  if (MI.isDebugInstr()) {
1349  TII->duplicate(PredMBB, InsertBefore, MI);
1350  LLVM_DEBUG(dbgs() << "Copied debug entity from empty block to pred: "
1351  << MI);
1352  }
1353 }
1354 
1356  MachineBasicBlock &MBB,
1357  MachineBasicBlock &SuccMBB) {
1358  auto InsertBefore = SuccMBB.SkipPHIsAndLabels(SuccMBB.begin());
1359  for (MachineInstr &MI : MBB.instrs())
1360  if (MI.isDebugInstr()) {
1361  TII->duplicate(SuccMBB, InsertBefore, MI);
1362  LLVM_DEBUG(dbgs() << "Copied debug entity from empty block to succ: "
1363  << MI);
1364  }
1365 }
1366 
1367 // Try to salvage DBG_VALUE instructions from an otherwise empty block. If such
1368 // a basic block is removed we would lose the debug information unless we have
1369 // copied the information to a predecessor/successor.
1370 //
1371 // TODO: This function only handles some simple cases. An alternative would be
1372 // to run a heavier analysis, such as the LiveDebugValues pass, before we do
1373 // branch folding.
1375  MachineBasicBlock &MBB) {
1376  assert(IsEmptyBlock(&MBB) && "Expected an empty block (except debug info).");
1377  // If this MBB is the only predecessor of a successor it is legal to copy
1378  // DBG_VALUE instructions to the beginning of the successor.
1379  for (MachineBasicBlock *SuccBB : MBB.successors())
1380  if (SuccBB->pred_size() == 1)
1381  copyDebugInfoToSuccessor(TII, MBB, *SuccBB);
1382  // If this MBB is the only successor of a predecessor it is legal to copy the
1383  // DBG_VALUE instructions to the end of the predecessor (just before the
1384  // terminators, assuming that the terminator isn't affecting the DBG_VALUE).
1385  for (MachineBasicBlock *PredBB : MBB.predecessors())
1386  if (PredBB->succ_size() == 1)
1387  copyDebugInfoToPredecessor(TII, MBB, *PredBB);
1388 }
1389 
1390 bool BranchFolder::OptimizeBlock(MachineBasicBlock *MBB) {
1391  bool MadeChange = false;
1392  MachineFunction &MF = *MBB->getParent();
1393 ReoptimizeBlock:
1394 
1395  MachineFunction::iterator FallThrough = MBB->getIterator();
1396  ++FallThrough;
1397 
1398  // Make sure MBB and FallThrough belong to the same EH scope.
1399  bool SameEHScope = true;
1400  if (!EHScopeMembership.empty() && FallThrough != MF.end()) {
1401  auto MBBEHScope = EHScopeMembership.find(MBB);
1402  assert(MBBEHScope != EHScopeMembership.end());
1403  auto FallThroughEHScope = EHScopeMembership.find(&*FallThrough);
1404  assert(FallThroughEHScope != EHScopeMembership.end());
1405  SameEHScope = MBBEHScope->second == FallThroughEHScope->second;
1406  }
1407 
1408  // If this block is empty, make everyone use its fall-through, not the block
1409  // explicitly. Landing pads should not do this since the landing-pad table
1410  // points to this block. Blocks with their addresses taken shouldn't be
1411  // optimized away.
1412  if (IsEmptyBlock(MBB) && !MBB->isEHPad() && !MBB->hasAddressTaken() &&
1413  SameEHScope) {
1414  salvageDebugInfoFromEmptyBlock(TII, *MBB);
1415  // Dead block? Leave for cleanup later.
1416  if (MBB->pred_empty()) return MadeChange;
1417 
1418  if (FallThrough == MF.end()) {
1419  // TODO: Simplify preds to not branch here if possible!
1420  } else if (FallThrough->isEHPad()) {
1421  // Don't rewrite to a landing pad fallthough. That could lead to the case
1422  // where a BB jumps to more than one landing pad.
1423  // TODO: Is it ever worth rewriting predecessors which don't already
1424  // jump to a landing pad, and so can safely jump to the fallthrough?
1425  } else if (MBB->isSuccessor(&*FallThrough)) {
1426  // Rewrite all predecessors of the old block to go to the fallthrough
1427  // instead.
1428  while (!MBB->pred_empty()) {
1429  MachineBasicBlock *Pred = *(MBB->pred_end()-1);
1430  Pred->ReplaceUsesOfBlockWith(MBB, &*FallThrough);
1431  }
1432  // If MBB was the target of a jump table, update jump tables to go to the
1433  // fallthrough instead.
1434  if (MachineJumpTableInfo *MJTI = MF.getJumpTableInfo())
1435  MJTI->ReplaceMBBInJumpTables(MBB, &*FallThrough);
1436  MadeChange = true;
1437  }
1438  return MadeChange;
1439  }
1440 
1441  // Check to see if we can simplify the terminator of the block before this
1442  // one.
1443  MachineBasicBlock &PrevBB = *std::prev(MachineFunction::iterator(MBB));
1444 
1445  MachineBasicBlock *PriorTBB = nullptr, *PriorFBB = nullptr;
1447  bool PriorUnAnalyzable =
1448  TII->analyzeBranch(PrevBB, PriorTBB, PriorFBB, PriorCond, true);
1449  if (!PriorUnAnalyzable) {
1450  // If the CFG for the prior block has extra edges, remove them.
1451  MadeChange |= PrevBB.CorrectExtraCFGEdges(PriorTBB, PriorFBB,
1452  !PriorCond.empty());
1453 
1454  // If the previous branch is conditional and both conditions go to the same
1455  // destination, remove the branch, replacing it with an unconditional one or
1456  // a fall-through.
1457  if (PriorTBB && PriorTBB == PriorFBB) {
1458  DebugLoc dl = getBranchDebugLoc(PrevBB);
1459  TII->removeBranch(PrevBB);
1460  PriorCond.clear();
1461  if (PriorTBB != MBB)
1462  TII->insertBranch(PrevBB, PriorTBB, nullptr, PriorCond, dl);
1463  MadeChange = true;
1464  ++NumBranchOpts;
1465  goto ReoptimizeBlock;
1466  }
1467 
1468  // If the previous block unconditionally falls through to this block and
1469  // this block has no other predecessors, move the contents of this block
1470  // into the prior block. This doesn't usually happen when SimplifyCFG
1471  // has been used, but it can happen if tail merging splits a fall-through
1472  // predecessor of a block.
1473  // This has to check PrevBB->succ_size() because EH edges are ignored by
1474  // AnalyzeBranch.
1475  if (PriorCond.empty() && !PriorTBB && MBB->pred_size() == 1 &&
1476  PrevBB.succ_size() == 1 &&
1477  !MBB->hasAddressTaken() && !MBB->isEHPad()) {
1478  LLVM_DEBUG(dbgs() << "\nMerging into block: " << PrevBB
1479  << "From MBB: " << *MBB);
1480  // Remove redundant DBG_VALUEs first.
1481  if (PrevBB.begin() != PrevBB.end()) {
1482  MachineBasicBlock::iterator PrevBBIter = PrevBB.end();
1483  --PrevBBIter;
1484  MachineBasicBlock::iterator MBBIter = MBB->begin();
1485  // Check if DBG_VALUE at the end of PrevBB is identical to the
1486  // DBG_VALUE at the beginning of MBB.
1487  while (PrevBBIter != PrevBB.begin() && MBBIter != MBB->end()
1488  && PrevBBIter->isDebugInstr() && MBBIter->isDebugInstr()) {
1489  if (!MBBIter->isIdenticalTo(*PrevBBIter))
1490  break;
1491  MachineInstr &DuplicateDbg = *MBBIter;
1492  ++MBBIter; -- PrevBBIter;
1493  DuplicateDbg.eraseFromParent();
1494  }
1495  }
1496  PrevBB.splice(PrevBB.end(), MBB, MBB->begin(), MBB->end());
1497  PrevBB.removeSuccessor(PrevBB.succ_begin());
1498  assert(PrevBB.succ_empty());
1499  PrevBB.transferSuccessors(MBB);
1500  MadeChange = true;
1501  return MadeChange;
1502  }
1503 
1504  // If the previous branch *only* branches to *this* block (conditional or
1505  // not) remove the branch.
1506  if (PriorTBB == MBB && !PriorFBB) {
1507  TII->removeBranch(PrevBB);
1508  MadeChange = true;
1509  ++NumBranchOpts;
1510  goto ReoptimizeBlock;
1511  }
1512 
1513  // If the prior block branches somewhere else on the condition and here if
1514  // the condition is false, remove the uncond second branch.
1515  if (PriorFBB == MBB) {
1516  DebugLoc dl = getBranchDebugLoc(PrevBB);
1517  TII->removeBranch(PrevBB);
1518  TII->insertBranch(PrevBB, PriorTBB, nullptr, PriorCond, dl);
1519  MadeChange = true;
1520  ++NumBranchOpts;
1521  goto ReoptimizeBlock;
1522  }
1523 
1524  // If the prior block branches here on true and somewhere else on false, and
1525  // if the branch condition is reversible, reverse the branch to create a
1526  // fall-through.
1527  if (PriorTBB == MBB) {
1528  SmallVector<MachineOperand, 4> NewPriorCond(PriorCond);
1529  if (!TII->reverseBranchCondition(NewPriorCond)) {
1530  DebugLoc dl = getBranchDebugLoc(PrevBB);
1531  TII->removeBranch(PrevBB);
1532  TII->insertBranch(PrevBB, PriorFBB, nullptr, NewPriorCond, dl);
1533  MadeChange = true;
1534  ++NumBranchOpts;
1535  goto ReoptimizeBlock;
1536  }
1537  }
1538 
1539  // If this block has no successors (e.g. it is a return block or ends with
1540  // a call to a no-return function like abort or __cxa_throw) and if the pred
1541  // falls through into this block, and if it would otherwise fall through
1542  // into the block after this, move this block to the end of the function.
1543  //
1544  // We consider it more likely that execution will stay in the function (e.g.
1545  // due to loops) than it is to exit it. This asserts in loops etc, moving
1546  // the assert condition out of the loop body.
1547  if (MBB->succ_empty() && !PriorCond.empty() && !PriorFBB &&
1548  MachineFunction::iterator(PriorTBB) == FallThrough &&
1549  !MBB->canFallThrough()) {
1550  bool DoTransform = true;
1551 
1552  // We have to be careful that the succs of PredBB aren't both no-successor
1553  // blocks. If neither have successors and if PredBB is the second from
1554  // last block in the function, we'd just keep swapping the two blocks for
1555  // last. Only do the swap if one is clearly better to fall through than
1556  // the other.
1557  if (FallThrough == --MF.end() &&
1558  !IsBetterFallthrough(PriorTBB, MBB))
1559  DoTransform = false;
1560 
1561  if (DoTransform) {
1562  // Reverse the branch so we will fall through on the previous true cond.
1563  SmallVector<MachineOperand, 4> NewPriorCond(PriorCond);
1564  if (!TII->reverseBranchCondition(NewPriorCond)) {
1565  LLVM_DEBUG(dbgs() << "\nMoving MBB: " << *MBB
1566  << "To make fallthrough to: " << *PriorTBB << "\n");
1567 
1568  DebugLoc dl = getBranchDebugLoc(PrevBB);
1569  TII->removeBranch(PrevBB);
1570  TII->insertBranch(PrevBB, MBB, nullptr, NewPriorCond, dl);
1571 
1572  // Move this block to the end of the function.
1573  MBB->moveAfter(&MF.back());
1574  MadeChange = true;
1575  ++NumBranchOpts;
1576  return MadeChange;
1577  }
1578  }
1579  }
1580  }
1581 
1582  if (!IsEmptyBlock(MBB) && MBB->pred_size() == 1 &&
1583  MF.getFunction().hasOptSize()) {
1584  // Changing "Jcc foo; foo: jmp bar;" into "Jcc bar;" might change the branch
1585  // direction, thereby defeating careful block placement and regressing
1586  // performance. Therefore, only consider this for optsize functions.
1588  if (TII->isUnconditionalTailCall(TailCall)) {
1589  MachineBasicBlock *Pred = *MBB->pred_begin();
1590  MachineBasicBlock *PredTBB = nullptr, *PredFBB = nullptr;
1592  bool PredAnalyzable =
1593  !TII->analyzeBranch(*Pred, PredTBB, PredFBB, PredCond, true);
1594 
1595  if (PredAnalyzable && !PredCond.empty() && PredTBB == MBB &&
1596  PredTBB != PredFBB) {
1597  // The predecessor has a conditional branch to this block which consists
1598  // of only a tail call. Try to fold the tail call into the conditional
1599  // branch.
1600  if (TII->canMakeTailCallConditional(PredCond, TailCall)) {
1601  // TODO: It would be nice if analyzeBranch() could provide a pointer
1602  // to the branch instruction so replaceBranchWithTailCall() doesn't
1603  // have to search for it.
1604  TII->replaceBranchWithTailCall(*Pred, PredCond, TailCall);
1605  ++NumTailCalls;
1606  Pred->removeSuccessor(MBB);
1607  MadeChange = true;
1608  return MadeChange;
1609  }
1610  }
1611  // If the predecessor is falling through to this block, we could reverse
1612  // the branch condition and fold the tail call into that. However, after
1613  // that we might have to re-arrange the CFG to fall through to the other
1614  // block and there is a high risk of regressing code size rather than
1615  // improving it.
1616  }
1617  }
1618 
1619  // Analyze the branch in the current block.
1620  MachineBasicBlock *CurTBB = nullptr, *CurFBB = nullptr;
1622  bool CurUnAnalyzable =
1623  TII->analyzeBranch(*MBB, CurTBB, CurFBB, CurCond, true);
1624  if (!CurUnAnalyzable) {
1625  // If the CFG for the prior block has extra edges, remove them.
1626  MadeChange |= MBB->CorrectExtraCFGEdges(CurTBB, CurFBB, !CurCond.empty());
1627 
1628  // If this is a two-way branch, and the FBB branches to this block, reverse
1629  // the condition so the single-basic-block loop is faster. Instead of:
1630  // Loop: xxx; jcc Out; jmp Loop
1631  // we want:
1632  // Loop: xxx; jncc Loop; jmp Out
1633  if (CurTBB && CurFBB && CurFBB == MBB && CurTBB != MBB) {
1634  SmallVector<MachineOperand, 4> NewCond(CurCond);
1635  if (!TII->reverseBranchCondition(NewCond)) {
1636  DebugLoc dl = getBranchDebugLoc(*MBB);
1637  TII->removeBranch(*MBB);
1638  TII->insertBranch(*MBB, CurFBB, CurTBB, NewCond, dl);
1639  MadeChange = true;
1640  ++NumBranchOpts;
1641  goto ReoptimizeBlock;
1642  }
1643  }
1644 
1645  // If this branch is the only thing in its block, see if we can forward
1646  // other blocks across it.
1647  if (CurTBB && CurCond.empty() && !CurFBB &&
1648  IsBranchOnlyBlock(MBB) && CurTBB != MBB &&
1649  !MBB->hasAddressTaken() && !MBB->isEHPad()) {
1650  DebugLoc dl = getBranchDebugLoc(*MBB);
1651  // This block may contain just an unconditional branch. Because there can
1652  // be 'non-branch terminators' in the block, try removing the branch and
1653  // then seeing if the block is empty.
1654  TII->removeBranch(*MBB);
1655  // If the only things remaining in the block are debug info, remove these
1656  // as well, so this will behave the same as an empty block in non-debug
1657  // mode.
1658  if (IsEmptyBlock(MBB)) {
1659  // Make the block empty, losing the debug info (we could probably
1660  // improve this in some cases.)
1661  MBB->erase(MBB->begin(), MBB->end());
1662  }
1663  // If this block is just an unconditional branch to CurTBB, we can
1664  // usually completely eliminate the block. The only case we cannot
1665  // completely eliminate the block is when the block before this one
1666  // falls through into MBB and we can't understand the prior block's branch
1667  // condition.
1668  if (MBB->empty()) {
1669  bool PredHasNoFallThrough = !PrevBB.canFallThrough();
1670  if (PredHasNoFallThrough || !PriorUnAnalyzable ||
1671  !PrevBB.isSuccessor(MBB)) {
1672  // If the prior block falls through into us, turn it into an
1673  // explicit branch to us to make updates simpler.
1674  if (!PredHasNoFallThrough && PrevBB.isSuccessor(MBB) &&
1675  PriorTBB != MBB && PriorFBB != MBB) {
1676  if (!PriorTBB) {
1677  assert(PriorCond.empty() && !PriorFBB &&
1678  "Bad branch analysis");
1679  PriorTBB = MBB;
1680  } else {
1681  assert(!PriorFBB && "Machine CFG out of date!");
1682  PriorFBB = MBB;
1683  }
1684  DebugLoc pdl = getBranchDebugLoc(PrevBB);
1685  TII->removeBranch(PrevBB);
1686  TII->insertBranch(PrevBB, PriorTBB, PriorFBB, PriorCond, pdl);
1687  }
1688 
1689  // Iterate through all the predecessors, revectoring each in-turn.
1690  size_t PI = 0;
1691  bool DidChange = false;
1692  bool HasBranchToSelf = false;
1693  while(PI != MBB->pred_size()) {
1694  MachineBasicBlock *PMBB = *(MBB->pred_begin() + PI);
1695  if (PMBB == MBB) {
1696  // If this block has an uncond branch to itself, leave it.
1697  ++PI;
1698  HasBranchToSelf = true;
1699  } else {
1700  DidChange = true;
1701  PMBB->ReplaceUsesOfBlockWith(MBB, CurTBB);
1702  // If this change resulted in PMBB ending in a conditional
1703  // branch where both conditions go to the same destination,
1704  // change this to an unconditional branch (and fix the CFG).
1705  MachineBasicBlock *NewCurTBB = nullptr, *NewCurFBB = nullptr;
1706  SmallVector<MachineOperand, 4> NewCurCond;
1707  bool NewCurUnAnalyzable = TII->analyzeBranch(
1708  *PMBB, NewCurTBB, NewCurFBB, NewCurCond, true);
1709  if (!NewCurUnAnalyzable && NewCurTBB && NewCurTBB == NewCurFBB) {
1710  DebugLoc pdl = getBranchDebugLoc(*PMBB);
1711  TII->removeBranch(*PMBB);
1712  NewCurCond.clear();
1713  TII->insertBranch(*PMBB, NewCurTBB, nullptr, NewCurCond, pdl);
1714  MadeChange = true;
1715  ++NumBranchOpts;
1716  PMBB->CorrectExtraCFGEdges(NewCurTBB, nullptr, false);
1717  }
1718  }
1719  }
1720 
1721  // Change any jumptables to go to the new MBB.
1722  if (MachineJumpTableInfo *MJTI = MF.getJumpTableInfo())
1723  MJTI->ReplaceMBBInJumpTables(MBB, CurTBB);
1724  if (DidChange) {
1725  ++NumBranchOpts;
1726  MadeChange = true;
1727  if (!HasBranchToSelf) return MadeChange;
1728  }
1729  }
1730  }
1731 
1732  // Add the branch back if the block is more than just an uncond branch.
1733  TII->insertBranch(*MBB, CurTBB, nullptr, CurCond, dl);
1734  }
1735  }
1736 
1737  // If the prior block doesn't fall through into this block, and if this
1738  // block doesn't fall through into some other block, see if we can find a
1739  // place to move this block where a fall-through will happen.
1740  if (!PrevBB.canFallThrough()) {
1741  // Now we know that there was no fall-through into this block, check to
1742  // see if it has a fall-through into its successor.
1743  bool CurFallsThru = MBB->canFallThrough();
1744 
1745  if (!MBB->isEHPad()) {
1746  // Check all the predecessors of this block. If one of them has no fall
1747  // throughs, move this block right after it.
1748  for (MachineBasicBlock *PredBB : MBB->predecessors()) {
1749  // Analyze the branch at the end of the pred.
1750  MachineBasicBlock *PredTBB = nullptr, *PredFBB = nullptr;
1752  if (PredBB != MBB && !PredBB->canFallThrough() &&
1753  !TII->analyzeBranch(*PredBB, PredTBB, PredFBB, PredCond, true) &&
1754  (!CurFallsThru || !CurTBB || !CurFBB) &&
1755  (!CurFallsThru || MBB->getNumber() >= PredBB->getNumber())) {
1756  // If the current block doesn't fall through, just move it.
1757  // If the current block can fall through and does not end with a
1758  // conditional branch, we need to append an unconditional jump to
1759  // the (current) next block. To avoid a possible compile-time
1760  // infinite loop, move blocks only backward in this case.
1761  // Also, if there are already 2 branches here, we cannot add a third;
1762  // this means we have the case
1763  // Bcc next
1764  // B elsewhere
1765  // next:
1766  if (CurFallsThru) {
1767  MachineBasicBlock *NextBB = &*std::next(MBB->getIterator());
1768  CurCond.clear();
1769  TII->insertBranch(*MBB, NextBB, nullptr, CurCond, DebugLoc());
1770  }
1771  MBB->moveAfter(PredBB);
1772  MadeChange = true;
1773  goto ReoptimizeBlock;
1774  }
1775  }
1776  }
1777 
1778  if (!CurFallsThru) {
1779  // Check all successors to see if we can move this block before it.
1780  for (MachineBasicBlock *SuccBB : MBB->successors()) {
1781  // Analyze the branch at the end of the block before the succ.
1782  MachineFunction::iterator SuccPrev = --SuccBB->getIterator();
1783 
1784  // If this block doesn't already fall-through to that successor, and if
1785  // the succ doesn't already have a block that can fall through into it,
1786  // and if the successor isn't an EH destination, we can arrange for the
1787  // fallthrough to happen.
1788  if (SuccBB != MBB && &*SuccPrev != MBB &&
1789  !SuccPrev->canFallThrough() && !CurUnAnalyzable &&
1790  !SuccBB->isEHPad()) {
1791  MBB->moveBefore(SuccBB);
1792  MadeChange = true;
1793  goto ReoptimizeBlock;
1794  }
1795  }
1796 
1797  // Okay, there is no really great place to put this block. If, however,
1798  // the block before this one would be a fall-through if this block were
1799  // removed, move this block to the end of the function. There is no real
1800  // advantage in "falling through" to an EH block, so we don't want to
1801  // perform this transformation for that case.
1802  //
1803  // Also, Windows EH introduced the possibility of an arbitrary number of
1804  // successors to a given block. The analyzeBranch call does not consider
1805  // exception handling and so we can get in a state where a block
1806  // containing a call is followed by multiple EH blocks that would be
1807  // rotated infinitely at the end of the function if the transformation
1808  // below were performed for EH "FallThrough" blocks. Therefore, even if
1809  // that appears not to be happening anymore, we should assume that it is
1810  // possible and not remove the "!FallThrough()->isEHPad" condition below.
1811  MachineBasicBlock *PrevTBB = nullptr, *PrevFBB = nullptr;
1813  if (FallThrough != MF.end() &&
1814  !FallThrough->isEHPad() &&
1815  !TII->analyzeBranch(PrevBB, PrevTBB, PrevFBB, PrevCond, true) &&
1816  PrevBB.isSuccessor(&*FallThrough)) {
1817  MBB->moveAfter(&MF.back());
1818  MadeChange = true;
1819  return MadeChange;
1820  }
1821  }
1822  }
1823 
1824  return MadeChange;
1825 }
1826 
1827 //===----------------------------------------------------------------------===//
1828 // Hoist Common Code
1829 //===----------------------------------------------------------------------===//
1830 
1831 bool BranchFolder::HoistCommonCode(MachineFunction &MF) {
1832  bool MadeChange = false;
1833  for (MachineFunction::iterator I = MF.begin(), E = MF.end(); I != E; ) {
1834  MachineBasicBlock *MBB = &*I++;
1835  MadeChange |= HoistCommonCodeInSuccs(MBB);
1836  }
1837 
1838  return MadeChange;
1839 }
1840 
1841 /// findFalseBlock - BB has a fallthrough. Find its 'false' successor given
1842 /// its 'true' successor.
1844  MachineBasicBlock *TrueBB) {
1845  for (MachineBasicBlock *SuccBB : BB->successors())
1846  if (SuccBB != TrueBB)
1847  return SuccBB;
1848  return nullptr;
1849 }
1850 
1851 template <class Container>
1852 static void addRegAndItsAliases(unsigned Reg, const TargetRegisterInfo *TRI,
1853  Container &Set) {
1854  if (Register::isPhysicalRegister(Reg)) {
1855  for (MCRegAliasIterator AI(Reg, TRI, true); AI.isValid(); ++AI)
1856  Set.insert(*AI);
1857  } else {
1858  Set.insert(Reg);
1859  }
1860 }
1861 
1862 /// findHoistingInsertPosAndDeps - Find the location to move common instructions
1863 /// in successors to. The location is usually just before the terminator,
1864 /// however if the terminator is a conditional branch and its previous
1865 /// instruction is the flag setting instruction, the previous instruction is
1866 /// the preferred location. This function also gathers uses and defs of the
1867 /// instructions from the insertion point to the end of the block. The data is
1868 /// used by HoistCommonCodeInSuccs to ensure safety.
1869 static
1871  const TargetInstrInfo *TII,
1872  const TargetRegisterInfo *TRI,
1873  SmallSet<unsigned,4> &Uses,
1874  SmallSet<unsigned,4> &Defs) {
1876  if (!TII->isUnpredicatedTerminator(*Loc))
1877  return MBB->end();
1878 
1879  for (const MachineOperand &MO : Loc->operands()) {
1880  if (!MO.isReg())
1881  continue;
1882  Register Reg = MO.getReg();
1883  if (!Reg)
1884  continue;
1885  if (MO.isUse()) {
1886  addRegAndItsAliases(Reg, TRI, Uses);
1887  } else {
1888  if (!MO.isDead())
1889  // Don't try to hoist code in the rare case the terminator defines a
1890  // register that is later used.
1891  return MBB->end();
1892 
1893  // If the terminator defines a register, make sure we don't hoist
1894  // the instruction whose def might be clobbered by the terminator.
1895  addRegAndItsAliases(Reg, TRI, Defs);
1896  }
1897  }
1898 
1899  if (Uses.empty())
1900  return Loc;
1901  // If the terminator is the only instruction in the block and Uses is not
1902  // empty (or we would have returned above), we can still safely hoist
1903  // instructions just before the terminator as long as the Defs/Uses are not
1904  // violated (which is checked in HoistCommonCodeInSuccs).
1905  if (Loc == MBB->begin())
1906  return Loc;
1907 
1908  // The terminator is probably a conditional branch, try not to separate the
1909  // branch from condition setting instruction.
1911  skipDebugInstructionsBackward(std::prev(Loc), MBB->begin());
1912 
1913  bool IsDef = false;
1914  for (const MachineOperand &MO : PI->operands()) {
1915  // If PI has a regmask operand, it is probably a call. Separate away.
1916  if (MO.isRegMask())
1917  return Loc;
1918  if (!MO.isReg() || MO.isUse())
1919  continue;
1920  Register Reg = MO.getReg();
1921  if (!Reg)
1922  continue;
1923  if (Uses.count(Reg)) {
1924  IsDef = true;
1925  break;
1926  }
1927  }
1928  if (!IsDef)
1929  // The condition setting instruction is not just before the conditional
1930  // branch.
1931  return Loc;
1932 
1933  // Be conservative, don't insert instruction above something that may have
1934  // side-effects. And since it's potentially bad to separate flag setting
1935  // instruction from the conditional branch, just abort the optimization
1936  // completely.
1937  // Also avoid moving code above predicated instruction since it's hard to
1938  // reason about register liveness with predicated instruction.
1939  bool DontMoveAcrossStore = true;
1940  if (!PI->isSafeToMove(nullptr, DontMoveAcrossStore) || TII->isPredicated(*PI))
1941  return MBB->end();
1942 
1943  // Find out what registers are live. Note this routine is ignoring other live
1944  // registers which are only used by instructions in successor blocks.
1945  for (const MachineOperand &MO : PI->operands()) {
1946  if (!MO.isReg())
1947  continue;
1948  Register Reg = MO.getReg();
1949  if (!Reg)
1950  continue;
1951  if (MO.isUse()) {
1952  addRegAndItsAliases(Reg, TRI, Uses);
1953  } else {
1954  if (Uses.erase(Reg)) {
1955  if (Register::isPhysicalRegister(Reg)) {
1956  for (MCSubRegIterator SubRegs(Reg, TRI); SubRegs.isValid(); ++SubRegs)
1957  Uses.erase(*SubRegs); // Use sub-registers to be conservative
1958  }
1959  }
1960  addRegAndItsAliases(Reg, TRI, Defs);
1961  }
1962  }
1963 
1964  return PI;
1965 }
1966 
1967 bool BranchFolder::HoistCommonCodeInSuccs(MachineBasicBlock *MBB) {
1968  MachineBasicBlock *TBB = nullptr, *FBB = nullptr;
1970  if (TII->analyzeBranch(*MBB, TBB, FBB, Cond, true) || !TBB || Cond.empty())
1971  return false;
1972 
1973  if (!FBB) FBB = findFalseBlock(MBB, TBB);
1974  if (!FBB)
1975  // Malformed bcc? True and false blocks are the same?
1976  return false;
1977 
1978  // Restrict the optimization to cases where MBB is the only predecessor,
1979  // it is an obvious win.
1980  if (TBB->pred_size() > 1 || FBB->pred_size() > 1)
1981  return false;
1982 
1983  // Find a suitable position to hoist the common instructions to. Also figure
1984  // out which registers are used or defined by instructions from the insertion
1985  // point to the end of the block.
1986  SmallSet<unsigned, 4> Uses, Defs;
1988  findHoistingInsertPosAndDeps(MBB, TII, TRI, Uses, Defs);
1989  if (Loc == MBB->end())
1990  return false;
1991 
1992  bool HasDups = false;
1993  SmallSet<unsigned, 4> ActiveDefsSet, AllDefsSet;
1994  MachineBasicBlock::iterator TIB = TBB->begin();
1995  MachineBasicBlock::iterator FIB = FBB->begin();
1996  MachineBasicBlock::iterator TIE = TBB->end();
1997  MachineBasicBlock::iterator FIE = FBB->end();
1998  while (TIB != TIE && FIB != FIE) {
1999  // Skip dbg_value instructions. These do not count.
2000  TIB = skipDebugInstructionsForward(TIB, TIE);
2001  FIB = skipDebugInstructionsForward(FIB, FIE);
2002  if (TIB == TIE || FIB == FIE)
2003  break;
2004 
2005  if (!TIB->isIdenticalTo(*FIB, MachineInstr::CheckKillDead))
2006  break;
2007 
2008  if (TII->isPredicated(*TIB))
2009  // Hard to reason about register liveness with predicated instruction.
2010  break;
2011 
2012  bool IsSafe = true;
2013  for (MachineOperand &MO : TIB->operands()) {
2014  // Don't attempt to hoist instructions with register masks.
2015  if (MO.isRegMask()) {
2016  IsSafe = false;
2017  break;
2018  }
2019  if (!MO.isReg())
2020  continue;
2021  Register Reg = MO.getReg();
2022  if (!Reg)
2023  continue;
2024  if (MO.isDef()) {
2025  if (Uses.count(Reg)) {
2026  // Avoid clobbering a register that's used by the instruction at
2027  // the point of insertion.
2028  IsSafe = false;
2029  break;
2030  }
2031 
2032  if (Defs.count(Reg) && !MO.isDead()) {
2033  // Don't hoist the instruction if the def would be clobber by the
2034  // instruction at the point insertion. FIXME: This is overly
2035  // conservative. It should be possible to hoist the instructions
2036  // in BB2 in the following example:
2037  // BB1:
2038  // r1, eflag = op1 r2, r3
2039  // brcc eflag
2040  //
2041  // BB2:
2042  // r1 = op2, ...
2043  // = op3, killed r1
2044  IsSafe = false;
2045  break;
2046  }
2047  } else if (!ActiveDefsSet.count(Reg)) {
2048  if (Defs.count(Reg)) {
2049  // Use is defined by the instruction at the point of insertion.
2050  IsSafe = false;
2051  break;
2052  }
2053 
2054  if (MO.isKill() && Uses.count(Reg))
2055  // Kills a register that's read by the instruction at the point of
2056  // insertion. Remove the kill marker.
2057  MO.setIsKill(false);
2058  }
2059  }
2060  if (!IsSafe)
2061  break;
2062 
2063  bool DontMoveAcrossStore = true;
2064  if (!TIB->isSafeToMove(nullptr, DontMoveAcrossStore))
2065  break;
2066 
2067  // Remove kills from ActiveDefsSet, these registers had short live ranges.
2068  for (const MachineOperand &MO : TIB->operands()) {
2069  if (!MO.isReg() || !MO.isUse() || !MO.isKill())
2070  continue;
2071  Register Reg = MO.getReg();
2072  if (!Reg)
2073  continue;
2074  if (!AllDefsSet.count(Reg)) {
2075  continue;
2076  }
2077  if (Register::isPhysicalRegister(Reg)) {
2078  for (MCRegAliasIterator AI(Reg, TRI, true); AI.isValid(); ++AI)
2079  ActiveDefsSet.erase(*AI);
2080  } else {
2081  ActiveDefsSet.erase(Reg);
2082  }
2083  }
2084 
2085  // Track local defs so we can update liveins.
2086  for (const MachineOperand &MO : TIB->operands()) {
2087  if (!MO.isReg() || !MO.isDef() || MO.isDead())
2088  continue;
2089  Register Reg = MO.getReg();
2090  if (!Reg || Register::isVirtualRegister(Reg))
2091  continue;
2092  addRegAndItsAliases(Reg, TRI, ActiveDefsSet);
2093  addRegAndItsAliases(Reg, TRI, AllDefsSet);
2094  }
2095 
2096  HasDups = true;
2097  ++TIB;
2098  ++FIB;
2099  }
2100 
2101  if (!HasDups)
2102  return false;
2103 
2104  MBB->splice(Loc, TBB, TBB->begin(), TIB);
2105  FBB->erase(FBB->begin(), FIB);
2106 
2107  if (UpdateLiveIns) {
2108  recomputeLiveIns(*TBB);
2109  recomputeLiveIns(*FBB);
2110  }
2111 
2112  ++NumHoist;
2113  return true;
2114 }
#define DEBUG_TYPE
void view(const Twine &Name, bool isSimple=true)
static unsigned EstimateRuntime(MachineBasicBlock::iterator I, MachineBasicBlock::iterator E)
EstimateRuntime - Make a rough estimate for how long it will take to run the specified code...
static bool ProfitableToMerge(MachineBasicBlock *MBB1, MachineBasicBlock *MBB2, unsigned MinCommonTailLength, unsigned &CommonTailLen, MachineBasicBlock::iterator &I1, MachineBasicBlock::iterator &I2, MachineBasicBlock *SuccBB, MachineBasicBlock *PredBB, DenseMap< const MachineBasicBlock *, int > &EHScopeMembership, bool AfterPlacement)
ProfitableToMerge - Check if two machine basic blocks have a common tail and decide if it would be pr...
const_iterator end(StringRef path)
Get end iterator over path.
Definition: Path.cpp:233
BitVector & set()
Definition: BitVector.h:397
A common definition of LaneBitmask for use in TableGen and CodeGen.
const std::vector< MachineJumpTableEntry > & getJumpTables() const
static cl::opt< unsigned > TailMergeThreshold("tail-merge-threshold", cl::desc("Max number of predecessors to consider tail merging"), cl::init(150), cl::Hidden)
const_iterator begin(StringRef path, Style style=Style::native)
Get begin iterator over path.
Definition: Path.cpp:224
MachineBasicBlock * getMBB() const
This class represents lattice values for constants.
Definition: AllocatorList.h:23
void RenumberBlocks(MachineBasicBlock *MBBFrom=nullptr)
RenumberBlocks - This discards all of the MachineBasicBlock numbers and recomputes them...
static const DILocation * getMergedLocation(const DILocation *LocA, const DILocation *LocB)
When two instructions are combined into a single instruction we also need to combine the original loc...
bool hasOptSize() const
Optimize this function for size (-Os) or minimum size (-Oz).
Definition: Function.h:627
amdgpu Simplify well known AMD library false FunctionCallee Value const Twine & Name
bool isCFIInstruction() const
iterator getFirstNonDebugInstr()
Returns an iterator to the first non-debug instruction in the basic block, or end().
static bool isPhysicalRegister(unsigned Reg)
Return true if the specified register number is in the physical register namespace.
Definition: Register.h:63
iterator getFirstTerminator()
Returns an iterator to the first terminator instruction of this basic block.
void setIsUndef(bool Val=true)
Address of indexed Jump Table for switch.
unsigned Reg
virtual MachineInstr & duplicate(MachineBasicBlock &MBB, MachineBasicBlock::iterator InsertBefore, const MachineInstr &Orig) const
Clones instruction or the whole instruction bundle Orig and insert into MBB before InsertBefore...
void transferSuccessors(MachineBasicBlock *FromMBB)
Transfers all the successors from MBB to this machine basic block (i.e., copies all the successors Fr...
virtual unsigned insertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB, MachineBasicBlock *FBB, ArrayRef< MachineOperand > Cond, const DebugLoc &DL, int *BytesAdded=nullptr) const
Insert branch code into the end of the specified MachineBasicBlock.
static unsigned HashMachineInstr(const MachineInstr &MI)
HashMachineInstr - Compute a hash value for MI and its operands.
void RemoveJumpTable(unsigned Idx)
RemoveJumpTable - Mark the specific index as being dead.
MachineBlockFrequencyInfo pass uses BlockFrequencyInfoImpl implementation to estimate machine basic b...
MachineBasicBlock reference.
STATISTIC(NumFunctions, "Total number of functions")
void moveAfter(MachineBasicBlock *NewBefore)
A debug info location.
Definition: DebugLoc.h:33
F(f)
static DebugLoc getBranchDebugLoc(MachineBasicBlock &MBB)
getBranchDebugLoc - Find and return, if any, the DebugLoc of the branch instructions on the block...
virtual unsigned removeBranch(MachineBasicBlock &MBB, int *BytesRemoved=nullptr) const
Remove the branching code at the end of the specific MBB.
bool erase(const T &V)
Definition: SmallSet.h:207
BranchFolder(bool defaultEnableTailMerge, bool CommonHoist, MBFIWrapper &FreqInfo, const MachineBranchProbabilityInfo &ProbInfo, unsigned MinTailLength=0)
iterator_range< succ_iterator > successors()
virtual bool isUnpredicatedTerminator(const MachineInstr &MI) const
Returns true if the instruction is a terminator instruction that has not been predicated.
AnalysisUsage & addRequired()
void ReplaceUsesOfBlockWith(MachineBasicBlock *Old, MachineBasicBlock *New)
Given a machine basic block that branched to &#39;Old&#39;, change the code and CFG so that it branches to &#39;N...
LLVM_NODISCARD bool empty() const
Definition: SmallSet.h:155
bool OptimizeFunction(MachineFunction &MF, const TargetInstrInfo *tii, const TargetRegisterInfo *tri, MachineModuleInfo *mmi, MachineLoopInfo *mli=nullptr, bool AfterPlacement=false)
Perhaps branch folding, tail merging and other CFG optimizations on the given function.
instr_iterator erase(instr_iterator I)
Remove an instruction from the instruction list and delete it.
INITIALIZE_PASS(BranchFolderPass, DEBUG_TYPE, "Control Flow Optimizer", false, false) bool BranchFolderPass
BlockFrequency getBlockFreq(const MachineBasicBlock *MBB) const
MachineFunctionPass - This class adapts the FunctionPass interface to allow convenient creation of pa...
Twine - A lightweight data structure for efficiently representing the concatenation of temporary valu...
Definition: Twine.h:80
Printable printMBBReference(const MachineBasicBlock &MBB)
Prints a machine basic block reference.
unsigned getNumOperands() const
Retuns the total number of operands.
Definition: MachineInstr.h:413
static void copyDebugInfoToPredecessor(const TargetInstrInfo *TII, MachineBasicBlock &MBB, MachineBasicBlock &PredMBB)
void eraseFromParent()
Unlink &#39;this&#39; from the containing basic block and delete it.
Name of external global symbol.
static constexpr LaneBitmask getAll()
Definition: LaneBitmask.h:83
static unsigned HashEndOfMBB(const MachineBasicBlock &MBB)
HashEndOfMBB - Hash the last instruction in the MBB.
unsigned getOpcode() const
Returns the opcode of this MachineInstr.
Definition: MachineInstr.h:410
static bool IsEmptyBlock(MachineBasicBlock *MBB)
void removeBlock(MachineBasicBlock *BB)
This method completely removes BB from all data structures, including all of the Loop objects it is n...
Target-Independent Code Generator Pass Configuration Options.
BlockT * getHeader() const
Definition: LoopInfo.h:105
static bool countsAsInstruction(const MachineInstr &MI)
Whether MI should be counted as an instruction when calculating common tail.
static bool isSimple(Instruction *I)
bool isIndirectBranch(QueryType Type=AnyInBundle) const
Return true if this is an indirect branch, such as a branch through a register.
Definition: MachineInstr.h:686
static cl::opt< cl::boolOrDefault > FlagEnableTailMerge("enable-tail-merge", cl::init(cl::BOU_UNSET), cl::Hidden)
static void FixTail(MachineBasicBlock *CurMBB, MachineBasicBlock *SuccBB, const TargetInstrInfo *TII)
void addLiveIns(MachineBasicBlock &MBB, const LivePhysRegs &LiveRegs)
Adds registers contained in LiveRegs to the block live-in list of MBB.
bool canFallThrough()
Return true if the block can implicitly transfer control to the block after it by falling off the end...
static bool blockEndsInUnreachable(const MachineBasicBlock *MBB)
A no successor, non-return block probably ends in unreachable and is cold.
void eraseCallSiteInfo(const MachineInstr *MI)
Erase the call site info for MI.
iterator getLastNonDebugInstr()
Returns an iterator to the last non-debug instruction in the basic block, or end().
int getNumber() const
MachineBasicBlocks are uniquely numbered at the function level, unless they&#39;re not in a MachineFuncti...
static MachineBasicBlock::iterator findHoistingInsertPosAndDeps(MachineBasicBlock *MBB, const TargetInstrInfo *TII, const TargetRegisterInfo *TRI, SmallSet< unsigned, 4 > &Uses, SmallSet< unsigned, 4 > &Defs)
findHoistingInsertPosAndDeps - Find the location to move common instructions in successors to...
void setSuccProbability(succ_iterator I, BranchProbability Prob)
Set successor probability of a given iterator.
reverse_iterator rend()
MachineBasicBlock * CreateMachineBasicBlock(const BasicBlock *bb=nullptr)
CreateMachineBasicBlock - Allocate a new MachineBasicBlock.
reverse_iterator rbegin()
BasicBlockListType::iterator iterator
uint16_t MCPhysReg
An unsigned integer type large enough to represent all physical registers, but not necessarily virtua...
Definition: MCRegister.h:19
void setBlockFreq(const MachineBasicBlock *MBB, BlockFrequency F)
TargetInstrInfo - Interface to description of machine instruction set.
static void mergeOperations(MachineBasicBlock::iterator MBBIStartPos, MachineBasicBlock &MBBCommon)
bool isReturn(QueryType Type=AnyInBundle) const
Definition: MachineInstr.h:646
bool getEnableTailMerge() const
MachineInstrBuilder BuildMI(MachineFunction &MF, const DebugLoc &DL, const MCInstrDesc &MCID)
Builder interface. Specify how to create the initial instruction itself.
#define P(N)
Address of a global value.
virtual void ReplaceTailWithBranchTo(MachineBasicBlock::iterator Tail, MachineBasicBlock *NewDest) const
Delete the instruction OldInst and everything after it, replacing it with an unconditional branch to ...
initializer< Ty > init(const Ty &Val)
Definition: CommandLine.h:432
void array_pod_sort(IteratorTy Start, IteratorTy End)
array_pod_sort - This sorts an array with the specified start and end extent.
Definition: STLExtras.h:1062
iterator SkipPHIsAndLabels(iterator I)
Return the first instruction in MBB after I that is not a PHI or a label.
static GCRegistry::Add< OcamlGC > B("ocaml", "ocaml 3.10-compatible GC")
LLVM Basic Block Representation.
Definition: BasicBlock.h:57
void getAnalysisUsage(AnalysisUsage &AU) const override
getAnalysisUsage - Subclasses that override getAnalysisUsage must call this.
virtual bool isLegalToSplitMBBAt(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI) const
Return true if it&#39;s legal to split the given basic block at the specified instruction (i...
static GCRegistry::Add< CoreCLRGC > E("coreclr", "CoreCLR-compatible GC")
void addLiveOuts(const MachineBasicBlock &MBB)
Adds all live-out registers of basic block MBB.
SmallSet - This maintains a set of unique values, optimizing for the case when the set is small (less...
Definition: SmallSet.h:134
static void salvageDebugInfoFromEmptyBlock(const TargetInstrInfo *TII, MachineBasicBlock &MBB)
std::pair< iterator, bool > insert(PtrType Ptr)
Inserts Ptr if and only if there is no element in the container equal to Ptr.
Definition: SmallPtrSet.h:370
void init(const TargetRegisterInfo &TRI)
(re-)initializes and clears the set.
Definition: LivePhysRegs.h:66
MCRegAliasIterator enumerates all registers aliasing Reg.
Represent the analysis usage information of a pass.
void stepBackward(const MachineInstr &MI)
Simulates liveness when stepping backwards over an instruction(bundle).
raw_ostream & printBlockFreq(raw_ostream &OS, const MachineBasicBlock *MBB) const
constexpr double e
Definition: MathExtras.h:57
static bool IsBetterFallthrough(MachineBasicBlock *MBB1, MachineBasicBlock *MBB2)
IsBetterFallthrough - Return true if it would be clearly better to fall-through to MBB1 than to fall ...
self_iterator getIterator()
Definition: ilist_node.h:81
iterator_range< pred_iterator > predecessors()
bool hasAddressTaken() const
Test whether this block is potentially the target of an indirect branch.
void moveBefore(MachineBasicBlock *NewAfter)
Move &#39;this&#39; block before or after the specified block.
virtual bool analyzeBranch(MachineBasicBlock &MBB, MachineBasicBlock *&TBB, MachineBasicBlock *&FBB, SmallVectorImpl< MachineOperand > &Cond, bool AllowModify=false) const
Analyze the branching code at the end of MBB, returning true if it cannot be understood (e...
TargetRegisterInfo base class - We assume that the target defines a static array of TargetRegisterDes...
MCSubRegIterator enumerates all sub-registers of Reg.
This file implements the LivePhysRegs utility for tracking liveness of physical registers.
virtual bool canMakeTailCallConditional(SmallVectorImpl< MachineOperand > &Cond, const MachineInstr &TailCall) const
Returns true if the tail call can be made conditional on BranchCond.
static unsigned CountTerminators(MachineBasicBlock *MBB, MachineBasicBlock::iterator &I)
CountTerminators - Count the number of terminators in the given block and set I to the position of th...
virtual bool isPredicated(const MachineInstr &MI) const
Returns true if the instruction is already predicated.
bool isDebugInstr() const
static cl::opt< unsigned > TailMergeSize("tail-merge-size", cl::desc("Min number of instructions to consider tail merging"), cl::init(3), cl::Hidden)
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
void computeLiveIns(LivePhysRegs &LiveRegs, const MachineBasicBlock &MBB)
Computes registers live-in to MBB assuming all of its successors live-in lists are up-to-date...
Iterator for intrusive lists based on ilist_node.
SmallPtrSet - This class implements a set which is optimized for holding SmallSize or less elements...
Definition: SmallPtrSet.h:417
void addSuccessor(MachineBasicBlock *Succ, BranchProbability Prob=BranchProbability::getUnknown())
Add Succ as a successor of this MachineBasicBlock.
bool available(const MachineRegisterInfo &MRI, MCPhysReg Reg) const
Returns true if register Reg and no aliasing register is in the set.
MachineOperand class - Representation of each machine instruction operand.
This is a &#39;vector&#39; (really, a variable-sized array), optimized for the case when the array is small...
Definition: SmallVector.h:837
static void addRegAndItsAliases(unsigned Reg, const TargetRegisterInfo *TRI, Container &Set)
static BranchProbability getBranchProbability(uint64_t Numerator, uint64_t Denominator)
DenseMap< const MachineBasicBlock *, int > getEHScopeMembership(const MachineFunction &MF)
Definition: Analysis.cpp:727
void invalidateLiveness()
invalidateLiveness - Indicates that register liveness is no longer being tracked accurately.
int64_t getImm() const
unsigned pred_size() const
bool isLayoutSuccessor(const MachineBasicBlock *MBB) const
Return true if the specified MBB will be emitted immediately after this block, such that if this bloc...
IterT skipDebugInstructionsBackward(IterT It, IterT Begin)
Decrement It until it points to a non-debug instruction or to Begin and return the resulting iterator...
const Function & getFunction() const
Return the LLVM function that this machine code represents.
raw_ostream & dbgs()
dbgs() - This returns a reference to a raw_ostream for debugging messages.
Definition: Debug.cpp:132
bool isValid() const
isValid - returns true if this iterator is not yet at the end.
DebugLoc findBranchDebugLoc()
Find and return the merged DebugLoc of the branch instructions of the block.
unsigned succ_size() const
void computeAndAddLiveIns(LivePhysRegs &LiveRegs, MachineBasicBlock &MBB)
Convenience function combining computeLiveIns() and addLiveIns().
IterT skipDebugInstructionsForward(IterT It, IterT End)
Increment It until it points to a non-debug instruction or to End and return the resulting iterator...
MachineRegisterInfo - Keep track of information for virtual and physical registers, including vreg register classes, use/def chains for registers, etc.
BranchProbability getEdgeProbability(const MachineBasicBlock *Src, const MachineBasicBlock *Dst) const
Representation of each machine instruction.
Definition: MachineInstr.h:63
const MachineFunction * getParent() const
Return the MachineFunction containing this basic block.
void splice(iterator Where, MachineBasicBlock *Other, iterator From)
Take an instruction from MBB &#39;Other&#39; at the position From, and insert it into this MBB right before &#39;...
MachineRegisterInfo & getRegInfo()
getRegInfo - Return information about the registers currently in use.
A set of physical registers with utility functions to track liveness when walking backward/forward th...
Definition: LivePhysRegs.h:48
bool isEHPad() const
Returns true if the block is a landing pad.
LLVM_NODISCARD bool empty() const
Definition: SmallVector.h:55
const MCInstrDesc & get(unsigned Opcode) const
Return the machine instruction descriptor that corresponds to the specified instruction opcode...
Definition: MCInstrInfo.h:44
int64_t getOffset() const
Return the offset from the symbol in this operand.
#define I(x, y, z)
Definition: MD5.cpp:58
Pair of physical register and lane mask.
const BasicBlock * getBasicBlock() const
Return the LLVM basic block that this instance corresponded to originally.
const MachineBasicBlock & back() const
bool tracksLiveness() const
tracksLiveness - Returns true when tracking register liveness accurately.
static bool IsBranchOnlyBlock(MachineBasicBlock *MBB)
bool isSuccessor(const MachineBasicBlock *MBB) const
Return true if the specified MBB is a successor of this block.
Abstract Stack Frame Index.
void removeSuccessor(MachineBasicBlock *Succ, bool NormalizeSuccProbs=false)
Remove successor from the successors list of this MachineBasicBlock.
iterator_range< livein_iterator > liveins() const
bool isReg() const
isReg - Tests if this is a MO_Register operand.
static MachineBasicBlock * findFalseBlock(MachineBasicBlock *BB, MachineBasicBlock *TrueBB)
findFalseBlock - BB has a fallthrough.
virtual bool reverseBranchCondition(SmallVectorImpl< MachineOperand > &Cond) const
Reverses the branch condition of the specified condition list, returning false on success and true if...
void erase(iterator MBBI)
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
void insert(iterator MBBI, MachineBasicBlock *MBB)
void clear()
Clears the set.
Definition: LivePhysRegs.h:73
static void recomputeLiveIns(MachineBasicBlock &MBB)
Convenience function for recomputing live-in&#39;s for MBB.
Definition: LivePhysRegs.h:189
MachineLoop * getLoopFor(const MachineBasicBlock *BB) const
Return the innermost loop that BB lives in.
static bool isVirtualRegister(unsigned Reg)
Return true if the specified register number is in the virtual register namespace.
Definition: Register.h:69
virtual void replaceBranchWithTailCall(MachineBasicBlock &MBB, SmallVectorImpl< MachineOperand > &Cond, const MachineInstr &TailCall) const
Replace the conditional branch in MBB with a conditional tail call.
char & BranchFolderPassID
BranchFolding - This pass performs machine code CFG based optimizations to delete branches to branche...
This class implements an extremely fast bulk output stream that can only output to a stream...
Definition: raw_ostream.h:45
This class keeps track of branch frequencies of newly created blocks and tail-merged blocks...
IRTranslator LLVM IR MI
bool isBarrier(QueryType Type=AnyInBundle) const
Returns true if the specified instruction stops control flow from executing the instruction immediate...
Definition: MachineInstr.h:663
virtual bool trackLivenessAfterRegAlloc(const MachineFunction &MF) const
Returns true if the live-ins should be tracked after register allocation.
Address of indexed Constant in Constant Pool.
bool operator<(const DeltaInfo &LHS, int64_t Delta)
Definition: LineTable.cpp:30
Register getReg() const
getReg - Returns the register number.
virtual bool isUnconditionalTailCall(const MachineInstr &MI) const
Returns true if MI is an unconditional tail call.
UnaryPredicate for_each(R &&Range, UnaryPredicate P)
Provide wrappers to std::for_each which take ranges instead of having to pass begin/end explicitly...
Definition: STLExtras.h:1158
#define LLVM_DEBUG(X)
Definition: Debug.h:122
const MachineJumpTableInfo * getJumpTableInfo() const
getJumpTableInfo - Return the jump table info object for the current function.
const MachineOperand & getOperand(unsigned i) const
Definition: MachineInstr.h:415
static void copyDebugInfoToSuccessor(const TargetInstrInfo *TII, MachineBasicBlock &MBB, MachineBasicBlock &SuccMBB)
MachineOperandType getType() const
getType - Returns the MachineOperandType for this operand.
bool CorrectExtraCFGEdges(MachineBasicBlock *DestA, MachineBasicBlock *DestB, bool IsCond)
Various pieces of code can cause excess edges in the CFG to be inserted.
Wrapper class representing virtual and physical registers.
Definition: Register.h:19
This class contains meta information specific to a module.
static unsigned ComputeCommonTailLength(MachineBasicBlock *MBB1, MachineBasicBlock *MBB2, MachineBasicBlock::iterator &I1, MachineBasicBlock::iterator &I2)
ComputeCommonTailLength - Given two machine basic blocks, compute the number of instructions they act...
LoopInfoBase< MachineBasicBlock, MachineLoop > & getBase()
size_type count(const T &V) const
count - Return 1 if the element is in the set, 0 otherwise.
Definition: SmallSet.h:164