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29 #define DEBUG_TYPE "opt-phis"
31 STATISTIC(NumPHICycles,
"Number of PHI cycles replaced");
32 STATISTIC(NumDeadPHICycles,
"Number of dead PHI cycles");
58 bool IsSingleValuePHICycle(
MachineInstr *
MI,
unsigned &SingleValReg,
59 InstrSet &PHIsInCycle);
71 "Optimize machine instruction PHIs",
false,
false)
74 if (skipFunction(Fn.getFunction()))
77 MRI = &Fn.getRegInfo();
78 TII = Fn.getSubtarget().getInstrInfo();
86 Changed |= OptimizeBB(
MBB);
97 unsigned &SingleValReg,
98 InstrSet &PHIsInCycle) {
99 assert(
MI->isPHI() &&
"IsSingleValuePHICycle expects a PHI instruction");
103 if (!PHIsInCycle.insert(
MI).second)
107 if (PHIsInCycle.size() == 16)
111 for (
unsigned i = 1;
i !=
MI->getNumOperands();
i += 2) {
113 if (SrcReg == DstReg)
127 if (SrcMI->
isPHI()) {
128 if (!IsSingleValuePHICycle(SrcMI, SingleValReg, PHIsInCycle))
132 if (SingleValReg != 0 && SingleValReg != SrcReg)
134 SingleValReg = SrcReg;
142 bool OptimizePHIs::IsDeadPHICycle(
MachineInstr *
MI, InstrSet &PHIsInCycle) {
143 assert(
MI->isPHI() &&
"IsDeadPHICycle expects a PHI instruction");
146 "PHI destination is not a virtual register");
149 if (!PHIsInCycle.insert(
MI).second)
153 if (PHIsInCycle.size() == 16)
157 if (!
UseMI.isPHI() || !IsDeadPHICycle(&
UseMI, PHIsInCycle))
167 bool Changed =
false;
175 unsigned SingleValReg = 0;
176 InstrSet PHIsInCycle;
177 if (IsSingleValuePHICycle(
MI, SingleValReg, PHIsInCycle) &&
184 MI->eraseFromParent();
196 if (IsDeadPHICycle(
MI, PHIsInCycle)) {
200 PhiMI->eraseFromParent();
char & OptimizePHIsID
OptimizePHIs - This pass optimizes machine instruction PHIs to take advantage of opportunities create...
This is an optimization pass for GlobalISel generic memory operations.
MachineInstrBuilder & UseMI
MachineRegisterInfo - Keep track of information for virtual and physical registers,...
MachineFunctionPass - This class adapts the FunctionPass interface to allow convenient creation of pa...
iterator_range< use_instr_nodbg_iterator > use_nodbg_instructions(Register Reg) const
SmallPtrSetIterator - This implements a const_iterator for SmallPtrSet.
SmallPtrSet - This class implements a set which is optimized for holding SmallSize or less elements.
void getAnalysisUsage(AnalysisUsage &AU) const override
getAnalysisUsage - Subclasses that override getAnalysisUsage must call this.
TargetInstrInfo - Interface to description of machine instruction set.
void initializeOptimizePHIsPass(PassRegistry &)
static PassRegistry * getPassRegistry()
getPassRegistry - Access the global registry object, which is automatically initialized at applicatio...
static GCRegistry::Add< CoreCLRGC > E("coreclr", "CoreCLR-compatible GC")
const MachineOperand & getOperand(unsigned i) const
Represent the analysis usage information of a pass.
const HexagonInstrInfo * TII
STATISTIC(NumFunctions, "Total number of functions")
INITIALIZE_PASS(OptimizePHIs, DEBUG_TYPE, "Optimize machine instruction PHIs", false, false) bool OptimizePHIs
MachineInstr * getVRegDef(Register Reg) const
getVRegDef - Return the machine instr that defines the specified virtual register or null if none is ...
unsigned ID
LLVM IR allows to use arbitrary numbers as calling convention identifiers.
const TargetRegisterClass * getRegClass(Register Reg) const
Return the register class of the specified virtual register.
void clearKillFlags(Register Reg) const
clearKillFlags - Iterate over all the uses of the given register and clear the kill flag from the Mac...
Representation of each machine instruction.
static bool isVirtualRegister(unsigned Reg)
Return true if the specified register number is in the virtual register namespace.
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
Register getReg() const
getReg - Returns the register number.
void setPreservesCFG()
This function should be called by the pass, iff they do not:
unsigned const MachineRegisterInfo * MRI
Wrapper class representing virtual and physical registers.
unsigned getSubReg() const
void replaceRegWith(Register FromReg, Register ToReg)
replaceRegWith - Replace all instances of FromReg with ToReg in the machine function.
const TargetRegisterClass * constrainRegClass(Register Reg, const TargetRegisterClass *RC, unsigned MinNumRegs=0)
constrainRegClass - Constrain the register class of the specified virtual register to be a common sub...