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33 (void)RequireCodeGenSCCOrder;
34 assert(!RequireCodeGenSCCOrder &&
"not implemented");
37 if (VerifyMachineFunction) {
44 assert(any_cast<const MachineFunction *>(&
IR));
46 assert(MF &&
"Machine function should be valid for printing");
47 std::string Banner = std::string(
"After ") + std::string(PassID);
52 for (
auto &
F : InitializationFuncs) {
53 if (
auto Err =
F(
M, MFAM))
58 size_t Size =
Passes.size();
61 for (; MachineModulePasses.count(Idx) && Idx != Size; ++Idx) {
62 if (
auto Err = MachineModulePasses.at(Idx)(
M, MFAM))
74 for (; !MachineModulePasses.count(Idx) && Idx != Size; ++Idx)
80 if (
F.hasAvailableExternallyLinkage())
86 for (
unsigned I = Begin,
E = Idx;
I !=
E; ++
I) {
100 for (
auto &
F : FinalizationFuncs) {
101 if (
auto Err =
F(
M, MFAM))
PassT::Result & getResult(Function &F)
Get the result of an analysis pass for a Function.
A set of analyses that are preserved following a run of a transformation pass.
This is an optimization pass for GlobalISel generic memory operations.
We currently emits eax Perhaps this is what we really should generate is Is imull three or four cycles eax eax The current instruction priority is based on pattern complexity The former is more complex because it folds a load so the latter will not be emitted Perhaps we should use AddedComplexity to give LEA32r a higher priority We should always try to match LEA first since the LEA matching code does some estimate to determine whether the match is profitable if we care more about code then imull is better It s two bytes shorter than movl leal On a Pentium M
void invalidate(IRUnitT &IR, const PreservedAnalyses &PA)
Invalidate cached analyses for an IR unit.
This currently compiles esp xmm0 movsd esp eax eax esp ret We should use not the dag combiner This is because dagcombine2 needs to be able to see through the X86ISD::Wrapper which DAGCombine can t really do The code for turning x load into a single vector load is target independent and should be moved to the dag combiner The code for turning x load into a vector load can only handle a direct load from a global or a direct load from the stack It should be generalized to handle any load from P
static ErrorSuccess success()
Create a success value.
This templated class represents "all analyses that operate over <a particular IR unit>" (e....
void pushBeforeNonSkippedPassCallback(CallableT C)
An analysis that produces MachineInfo for a module.
void verifyMachineFunction(MachineFunctionAnalysisManager *, const std::string &Banner, const MachineFunction &MF)
static GCRegistry::Add< CoreCLRGC > E("coreclr", "CoreCLR-compatible GC")
Statically lint checks LLVM IR
std::vector< std::unique_ptr< PassConceptT > > Passes
An AnalysisManager<MachineFunction> that also exposes IR analysis results.
void runAfterPass(const PassT &Pass, const IRUnitT &IR, const PreservedAnalyses &PA) const
AfterPass instrumentation point - takes Pass instance that has just been executed and constant refere...
Error run(Module &M, MachineFunctionAnalysisManager &MFAM)
Run machine passes for a Module.
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
This class provides instrumentation entry points for the Pass Manager, doing calls to callbacks regis...
A Module instance is used to store all the information related to an LLVM module.
StringRef - Represent a constant reference to a string, i.e.
Manages a sequence of passes over a particular unit of IR.
bool runBeforePass(const PassT &Pass, const IRUnitT &IR) const
BeforePass instrumentation point - takes Pass instance to be executed and constant reference to IR it...
Lightweight error class with error context and mandatory checking.
Pseudo-analysis pass that exposes the PassInstrumentation to pass managers.