LLVM 20.0.0git
ShrinkWrap.cpp
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1//===- ShrinkWrap.cpp - Compute safe point for prolog/epilog insertion ----===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8//
9// This pass looks for safe point where the prologue and epilogue can be
10// inserted.
11// The safe point for the prologue (resp. epilogue) is called Save
12// (resp. Restore).
13// A point is safe for prologue (resp. epilogue) if and only if
14// it 1) dominates (resp. post-dominates) all the frame related operations and
15// between 2) two executions of the Save (resp. Restore) point there is an
16// execution of the Restore (resp. Save) point.
17//
18// For instance, the following points are safe:
19// for (int i = 0; i < 10; ++i) {
20// Save
21// ...
22// Restore
23// }
24// Indeed, the execution looks like Save -> Restore -> Save -> Restore ...
25// And the following points are not:
26// for (int i = 0; i < 10; ++i) {
27// Save
28// ...
29// }
30// for (int i = 0; i < 10; ++i) {
31// ...
32// Restore
33// }
34// Indeed, the execution looks like Save -> Save -> ... -> Restore -> Restore.
35//
36// This pass also ensures that the safe points are 3) cheaper than the regular
37// entry and exits blocks.
38//
39// Property #1 is ensured via the use of MachineDominatorTree and
40// MachinePostDominatorTree.
41// Property #2 is ensured via property #1 and MachineLoopInfo, i.e., both
42// points must be in the same loop.
43// Property #3 is ensured via the MachineBlockFrequencyInfo.
44//
45// If this pass found points matching all these properties, then
46// MachineFrameInfo is updated with this information.
47//
48//===----------------------------------------------------------------------===//
49
50#include "llvm/ADT/BitVector.h"
52#include "llvm/ADT/SetVector.h"
54#include "llvm/ADT/Statistic.h"
55#include "llvm/Analysis/CFG.h"
75#include "llvm/IR/Attributes.h"
76#include "llvm/IR/Function.h"
78#include "llvm/MC/MCAsmInfo.h"
79#include "llvm/Pass.h"
81#include "llvm/Support/Debug.h"
85#include <cassert>
86#include <memory>
87
88using namespace llvm;
89
90#define DEBUG_TYPE "shrink-wrap"
91
92STATISTIC(NumFunc, "Number of functions");
93STATISTIC(NumCandidates, "Number of shrink-wrapping candidates");
94STATISTIC(NumCandidatesDropped,
95 "Number of shrink-wrapping candidates dropped because of frequency");
96
98EnableShrinkWrapOpt("enable-shrink-wrap", cl::Hidden,
99 cl::desc("enable the shrink-wrapping pass"));
101 "enable-shrink-wrap-region-split", cl::init(true), cl::Hidden,
102 cl::desc("enable splitting of the restore block if possible"));
103
104namespace {
105
106/// Class to determine where the safe point to insert the
107/// prologue and epilogue are.
108/// Unlike the paper from Fred C. Chow, PLDI'88, that introduces the
109/// shrink-wrapping term for prologue/epilogue placement, this pass
110/// does not rely on expensive data-flow analysis. Instead we use the
111/// dominance properties and loop information to decide which point
112/// are safe for such insertion.
113class ShrinkWrap : public MachineFunctionPass {
114 /// Hold callee-saved information.
116 MachineDominatorTree *MDT = nullptr;
117 MachinePostDominatorTree *MPDT = nullptr;
118
119 /// Current safe point found for the prologue.
120 /// The prologue will be inserted before the first instruction
121 /// in this basic block.
122 MachineBasicBlock *Save = nullptr;
123
124 /// Current safe point found for the epilogue.
125 /// The epilogue will be inserted before the first terminator instruction
126 /// in this basic block.
127 MachineBasicBlock *Restore = nullptr;
128
129 /// Hold the information of the basic block frequency.
130 /// Use to check the profitability of the new points.
131 MachineBlockFrequencyInfo *MBFI = nullptr;
132
133 /// Hold the loop information. Used to determine if Save and Restore
134 /// are in the same loop.
135 MachineLoopInfo *MLI = nullptr;
136
137 // Emit remarks.
139
140 /// Frequency of the Entry block.
141 BlockFrequency EntryFreq;
142
143 /// Current opcode for frame setup.
144 unsigned FrameSetupOpcode = ~0u;
145
146 /// Current opcode for frame destroy.
147 unsigned FrameDestroyOpcode = ~0u;
148
149 /// Stack pointer register, used by llvm.{savestack,restorestack}
150 Register SP;
151
152 /// Entry block.
153 const MachineBasicBlock *Entry = nullptr;
154
155 using SetOfRegs = SmallSetVector<unsigned, 16>;
156
157 /// Registers that need to be saved for the current function.
158 mutable SetOfRegs CurrentCSRs;
159
160 /// Current MachineFunction.
161 MachineFunction *MachineFunc = nullptr;
162
163 /// Is `true` for the block numbers where we assume possible stack accesses
164 /// or computation of stack-relative addresses on any CFG path including the
165 /// block itself. Is `false` for basic blocks where we can guarantee the
166 /// opposite. False positives won't lead to incorrect analysis results,
167 /// therefore this approach is fair.
168 BitVector StackAddressUsedBlockInfo;
169
170 /// Check if \p MI uses or defines a callee-saved register or
171 /// a frame index. If this is the case, this means \p MI must happen
172 /// after Save and before Restore.
173 bool useOrDefCSROrFI(const MachineInstr &MI, RegScavenger *RS,
174 bool StackAddressUsed) const;
175
176 const SetOfRegs &getCurrentCSRs(RegScavenger *RS) const {
177 if (CurrentCSRs.empty()) {
178 BitVector SavedRegs;
179 const TargetFrameLowering *TFI =
180 MachineFunc->getSubtarget().getFrameLowering();
181
182 TFI->determineCalleeSaves(*MachineFunc, SavedRegs, RS);
183
184 for (int Reg = SavedRegs.find_first(); Reg != -1;
185 Reg = SavedRegs.find_next(Reg))
186 CurrentCSRs.insert((unsigned)Reg);
187 }
188 return CurrentCSRs;
189 }
190
191 /// Update the Save and Restore points such that \p MBB is in
192 /// the region that is dominated by Save and post-dominated by Restore
193 /// and Save and Restore still match the safe point definition.
194 /// Such point may not exist and Save and/or Restore may be null after
195 /// this call.
196 void updateSaveRestorePoints(MachineBasicBlock &MBB, RegScavenger *RS);
197
198 // Try to find safe point based on dominance and block frequency without
199 // any change in IR.
200 bool performShrinkWrapping(
202 RegScavenger *RS);
203
204 /// This function tries to split the restore point if doing so can shrink the
205 /// save point further. \return True if restore point is split.
206 bool postShrinkWrapping(bool HasCandidate, MachineFunction &MF,
207 RegScavenger *RS);
208
209 /// This function analyzes if the restore point can split to create a new
210 /// restore point. This function collects
211 /// 1. Any preds of current restore that are reachable by callee save/FI
212 /// blocks
213 /// - indicated by DirtyPreds
214 /// 2. Any preds of current restore that are not DirtyPreds - indicated by
215 /// CleanPreds
216 /// Both sets should be non-empty for considering restore point split.
217 bool checkIfRestoreSplittable(
218 const MachineBasicBlock *CurRestore,
219 const DenseSet<const MachineBasicBlock *> &ReachableByDirty,
222 const TargetInstrInfo *TII, RegScavenger *RS);
223
224 /// Initialize the pass for \p MF.
225 void init(MachineFunction &MF) {
226 RCI.runOnMachineFunction(MF);
227 MDT = &getAnalysis<MachineDominatorTreeWrapperPass>().getDomTree();
228 MPDT = &getAnalysis<MachinePostDominatorTreeWrapperPass>().getPostDomTree();
229 Save = nullptr;
230 Restore = nullptr;
231 MBFI = &getAnalysis<MachineBlockFrequencyInfoWrapperPass>().getMBFI();
232 MLI = &getAnalysis<MachineLoopInfoWrapperPass>().getLI();
233 ORE = &getAnalysis<MachineOptimizationRemarkEmitterPass>().getORE();
234 EntryFreq = MBFI->getEntryFreq();
235 const TargetSubtargetInfo &Subtarget = MF.getSubtarget();
236 const TargetInstrInfo &TII = *Subtarget.getInstrInfo();
237 FrameSetupOpcode = TII.getCallFrameSetupOpcode();
238 FrameDestroyOpcode = TII.getCallFrameDestroyOpcode();
240 Entry = &MF.front();
241 CurrentCSRs.clear();
242 MachineFunc = &MF;
243
244 ++NumFunc;
245 }
246
247 /// Check whether or not Save and Restore points are still interesting for
248 /// shrink-wrapping.
249 bool ArePointsInteresting() const { return Save != Entry && Save && Restore; }
250
251 /// Check if shrink wrapping is enabled for this target and function.
252 static bool isShrinkWrapEnabled(const MachineFunction &MF);
253
254public:
255 static char ID;
256
257 ShrinkWrap() : MachineFunctionPass(ID) {
259 }
260
261 void getAnalysisUsage(AnalysisUsage &AU) const override {
262 AU.setPreservesAll();
269 }
270
273 MachineFunctionProperties::Property::NoVRegs);
274 }
275
276 StringRef getPassName() const override { return "Shrink Wrapping analysis"; }
277
278 /// Perform the shrink-wrapping analysis and update
279 /// the MachineFrameInfo attached to \p MF with the results.
280 bool runOnMachineFunction(MachineFunction &MF) override;
281};
282
283} // end anonymous namespace
284
285char ShrinkWrap::ID = 0;
286
287char &llvm::ShrinkWrapID = ShrinkWrap::ID;
288
289INITIALIZE_PASS_BEGIN(ShrinkWrap, DEBUG_TYPE, "Shrink Wrap Pass", false, false)
295INITIALIZE_PASS_END(ShrinkWrap, DEBUG_TYPE, "Shrink Wrap Pass", false, false)
296
297bool ShrinkWrap::useOrDefCSROrFI(const MachineInstr &MI, RegScavenger *RS,
298 bool StackAddressUsed) const {
299 /// Check if \p Op is known to access an address not on the function's stack .
300 /// At the moment, accesses where the underlying object is a global, function
301 /// argument, or jump table are considered non-stack accesses. Note that the
302 /// caller's stack may get accessed when passing an argument via the stack,
303 /// but not the stack of the current function.
304 ///
305 auto IsKnownNonStackPtr = [](MachineMemOperand *Op) {
306 if (Op->getValue()) {
307 const Value *UO = getUnderlyingObject(Op->getValue());
308 if (!UO)
309 return false;
310 if (auto *Arg = dyn_cast<Argument>(UO))
311 return !Arg->hasPassPointeeByValueCopyAttr();
312 return isa<GlobalValue>(UO);
313 }
314 if (const PseudoSourceValue *PSV = Op->getPseudoValue())
315 return PSV->isJumpTable();
316 return false;
317 };
318 // Load/store operations may access the stack indirectly when we previously
319 // computed an address to a stack location.
320 if (StackAddressUsed && MI.mayLoadOrStore() &&
321 (MI.isCall() || MI.hasUnmodeledSideEffects() || MI.memoperands_empty() ||
322 !all_of(MI.memoperands(), IsKnownNonStackPtr)))
323 return true;
324
325 if (MI.getOpcode() == FrameSetupOpcode ||
326 MI.getOpcode() == FrameDestroyOpcode) {
327 LLVM_DEBUG(dbgs() << "Frame instruction: " << MI << '\n');
328 return true;
329 }
330 const MachineFunction *MF = MI.getParent()->getParent();
332 for (const MachineOperand &MO : MI.operands()) {
333 bool UseOrDefCSR = false;
334 if (MO.isReg()) {
335 // Ignore instructions like DBG_VALUE which don't read/def the register.
336 if (!MO.isDef() && !MO.readsReg())
337 continue;
338 Register PhysReg = MO.getReg();
339 if (!PhysReg)
340 continue;
341 assert(PhysReg.isPhysical() && "Unallocated register?!");
342 // The stack pointer is not normally described as a callee-saved register
343 // in calling convention definitions, so we need to watch for it
344 // separately. An SP mentioned by a call instruction, we can ignore,
345 // though, as it's harmless and we do not want to effectively disable tail
346 // calls by forcing the restore point to post-dominate them.
347 // PPC's LR is also not normally described as a callee-saved register in
348 // calling convention definitions, so we need to watch for it, too. An LR
349 // mentioned implicitly by a return (or "branch to link register")
350 // instruction we can ignore, otherwise we may pessimize shrinkwrapping.
351 UseOrDefCSR =
352 (!MI.isCall() && PhysReg == SP) ||
353 RCI.getLastCalleeSavedAlias(PhysReg) ||
354 (!MI.isReturn() && TRI->isNonallocatableRegisterCalleeSave(PhysReg));
355 } else if (MO.isRegMask()) {
356 // Check if this regmask clobbers any of the CSRs.
357 for (unsigned Reg : getCurrentCSRs(RS)) {
358 if (MO.clobbersPhysReg(Reg)) {
359 UseOrDefCSR = true;
360 break;
361 }
362 }
363 }
364 // Skip FrameIndex operands in DBG_VALUE instructions.
365 if (UseOrDefCSR || (MO.isFI() && !MI.isDebugValue())) {
366 LLVM_DEBUG(dbgs() << "Use or define CSR(" << UseOrDefCSR << ") or FI("
367 << MO.isFI() << "): " << MI << '\n');
368 return true;
369 }
370 }
371 return false;
372}
373
374/// Helper function to find the immediate (post) dominator.
375template <typename ListOfBBs, typename DominanceAnalysis>
377 DominanceAnalysis &Dom, bool Strict = true) {
378 MachineBasicBlock *IDom = &Block;
379 for (MachineBasicBlock *BB : BBs) {
380 IDom = Dom.findNearestCommonDominator(IDom, BB);
381 if (!IDom)
382 break;
383 }
384 if (Strict && IDom == &Block)
385 return nullptr;
386 return IDom;
387}
388
390 MachineBasicBlock &Entry) {
391 // Check if the block is analyzable.
392 MachineBasicBlock *TBB = nullptr, *FBB = nullptr;
394 return !TII.analyzeBranch(Entry, TBB, FBB, Cond);
395}
396
397/// Determines if any predecessor of MBB is on the path from block that has use
398/// or def of CSRs/FI to MBB.
399/// ReachableByDirty: All blocks reachable from block that has use or def of
400/// CSR/FI.
401static bool
403 const MachineBasicBlock &MBB) {
404 for (const MachineBasicBlock *PredBB : MBB.predecessors())
405 if (ReachableByDirty.count(PredBB))
406 return true;
407 return false;
408}
409
410/// Derives the list of all the basic blocks reachable from MBB.
412 const MachineBasicBlock &MBB) {
414 Visited.insert(&MBB);
415 while (!Worklist.empty()) {
416 MachineBasicBlock *SuccMBB = Worklist.pop_back_val();
417 if (!Visited.insert(SuccMBB).second)
418 continue;
419 Worklist.append(SuccMBB->succ_begin(), SuccMBB->succ_end());
420 }
421}
422
423/// Collect blocks reachable by use or def of CSRs/FI.
426 DenseSet<const MachineBasicBlock *> &ReachableByDirty) {
427 for (const MachineBasicBlock *MBB : DirtyBBs) {
428 if (ReachableByDirty.count(MBB))
429 continue;
430 // Mark all offsprings as reachable.
431 markAllReachable(ReachableByDirty, *MBB);
432 }
433}
434
435/// \return true if there is a clean path from SavePoint to the original
436/// Restore.
437static bool
441 SmallVector<MachineBasicBlock *, 4> Worklist(CleanPreds);
442 while (!Worklist.empty()) {
443 MachineBasicBlock *CleanBB = Worklist.pop_back_val();
444 if (CleanBB == SavePoint)
445 return true;
446 if (!Visited.insert(CleanBB).second || !CleanBB->pred_size())
447 continue;
448 Worklist.append(CleanBB->pred_begin(), CleanBB->pred_end());
449 }
450 return false;
451}
452
453/// This function updates the branches post restore point split.
454///
455/// Restore point has been split.
456/// Old restore point: MBB
457/// New restore point: NMBB
458/// Any basic block(say BBToUpdate) which had a fallthrough to MBB
459/// previously should
460/// 1. Fallthrough to NMBB iff NMBB is inserted immediately above MBB in the
461/// block layout OR
462/// 2. Branch unconditionally to NMBB iff NMBB is inserted at any other place.
463static void updateTerminator(MachineBasicBlock *BBToUpdate,
464 MachineBasicBlock *NMBB,
465 const TargetInstrInfo *TII) {
466 DebugLoc DL = BBToUpdate->findBranchDebugLoc();
467 // if NMBB isn't the new layout successor for BBToUpdate, insert unconditional
468 // branch to it
469 if (!BBToUpdate->isLayoutSuccessor(NMBB))
470 TII->insertUnconditionalBranch(*BBToUpdate, NMBB, DL);
471}
472
473/// This function splits the restore point and returns new restore point/BB.
474///
475/// DirtyPreds: Predessors of \p MBB that are ReachableByDirty
476///
477/// Decision has been made to split the restore point.
478/// old restore point: \p MBB
479/// new restore point: \p NMBB
480/// This function makes the necessary block layout changes so that
481/// 1. \p NMBB points to \p MBB unconditionally
482/// 2. All dirtyPreds that previously pointed to \p MBB point to \p NMBB
483static MachineBasicBlock *
486 const TargetInstrInfo *TII) {
488
489 // get the list of DirtyPreds who have a fallthrough to MBB
490 // before the block layout change. This is just to ensure that if the NMBB is
491 // inserted after MBB, then we create unconditional branch from
492 // DirtyPred/CleanPred to NMBB
494 for (MachineBasicBlock *BB : DirtyPreds)
495 if (BB->getFallThrough(false) == MBB)
496 MBBFallthrough.insert(BB);
497
499 // Insert this block at the end of the function. Inserting in between may
500 // interfere with control flow optimizer decisions.
501 MF->insert(MF->end(), NMBB);
502
504 NMBB->addLiveIn(LI.PhysReg);
505
506 TII->insertUnconditionalBranch(*NMBB, MBB, DebugLoc());
507
508 // After splitting, all predecessors of the restore point should be dirty
509 // blocks.
510 for (MachineBasicBlock *SuccBB : DirtyPreds)
511 SuccBB->ReplaceUsesOfBlockWith(MBB, NMBB);
512
513 NMBB->addSuccessor(MBB);
514
515 for (MachineBasicBlock *BBToUpdate : MBBFallthrough)
516 updateTerminator(BBToUpdate, NMBB, TII);
517
518 return NMBB;
519}
520
521/// This function undoes the restore point split done earlier.
522///
523/// DirtyPreds: All predecessors of \p NMBB that are ReachableByDirty.
524///
525/// Restore point was split and the change needs to be unrolled. Make necessary
526/// changes to reset restore point from \p NMBB to \p MBB.
530 const TargetInstrInfo *TII) {
531 // For a BB, if NMBB is fallthrough in the current layout, then in the new
532 // layout a. BB should fallthrough to MBB OR b. BB should undconditionally
533 // branch to MBB
535 for (MachineBasicBlock *BB : DirtyPreds)
536 if (BB->getFallThrough(false) == NMBB)
537 NMBBFallthrough.insert(BB);
538
539 NMBB->removeSuccessor(MBB);
540 for (MachineBasicBlock *SuccBB : DirtyPreds)
541 SuccBB->ReplaceUsesOfBlockWith(NMBB, MBB);
542
543 NMBB->erase(NMBB->begin(), NMBB->end());
544 NMBB->eraseFromParent();
545
546 for (MachineBasicBlock *BBToUpdate : NMBBFallthrough)
547 updateTerminator(BBToUpdate, MBB, TII);
548}
549
550// A block is deemed fit for restore point split iff there exist
551// 1. DirtyPreds - preds of CurRestore reachable from use or def of CSR/FI
552// 2. CleanPreds - preds of CurRestore that arent DirtyPreds
553bool ShrinkWrap::checkIfRestoreSplittable(
554 const MachineBasicBlock *CurRestore,
555 const DenseSet<const MachineBasicBlock *> &ReachableByDirty,
558 const TargetInstrInfo *TII, RegScavenger *RS) {
559 for (const MachineInstr &MI : *CurRestore)
560 if (useOrDefCSROrFI(MI, RS, /*StackAddressUsed=*/true))
561 return false;
562
563 for (MachineBasicBlock *PredBB : CurRestore->predecessors()) {
564 if (!isAnalyzableBB(*TII, *PredBB))
565 return false;
566
567 if (ReachableByDirty.count(PredBB))
568 DirtyPreds.push_back(PredBB);
569 else
570 CleanPreds.push_back(PredBB);
571 }
572
573 return !(CleanPreds.empty() || DirtyPreds.empty());
574}
575
576bool ShrinkWrap::postShrinkWrapping(bool HasCandidate, MachineFunction &MF,
577 RegScavenger *RS) {
579 return false;
580
581 MachineBasicBlock *InitSave = nullptr;
582 MachineBasicBlock *InitRestore = nullptr;
583
584 if (HasCandidate) {
585 InitSave = Save;
586 InitRestore = Restore;
587 } else {
588 InitRestore = nullptr;
589 InitSave = &MF.front();
590 for (MachineBasicBlock &MBB : MF) {
591 if (MBB.isEHFuncletEntry())
592 return false;
593 if (MBB.isReturnBlock()) {
594 // Do not support multiple restore points.
595 if (InitRestore)
596 return false;
597 InitRestore = &MBB;
598 }
599 }
600 }
601
602 if (!InitSave || !InitRestore || InitRestore == InitSave ||
603 !MDT->dominates(InitSave, InitRestore) ||
604 !MPDT->dominates(InitRestore, InitSave))
605 return false;
606
607 // Bail out of the optimization if any of the basic block is target of
608 // INLINEASM_BR instruction
609 for (MachineBasicBlock &MBB : MF)
611 return false;
612
614 for (MachineBasicBlock &MBB : MF) {
615 if (MBB.isEHPad()) {
616 DirtyBBs.insert(&MBB);
617 continue;
618 }
619 for (const MachineInstr &MI : MBB)
620 if (useOrDefCSROrFI(MI, RS, /*StackAddressUsed=*/true)) {
621 DirtyBBs.insert(&MBB);
622 break;
623 }
624 }
625
626 // Find blocks reachable from the use or def of CSRs/FI.
628 collectBlocksReachableByDirty(DirtyBBs, ReachableByDirty);
629
630 const TargetInstrInfo *TII = MF.getSubtarget().getInstrInfo();
633 if (!checkIfRestoreSplittable(InitRestore, ReachableByDirty, DirtyPreds,
634 CleanPreds, TII, RS))
635 return false;
636
637 // Trying to reach out to the new save point which dominates all dirty blocks.
638 MachineBasicBlock *NewSave =
639 FindIDom<>(**DirtyPreds.begin(), DirtyPreds, *MDT, false);
640
641 while (NewSave && (hasDirtyPred(ReachableByDirty, *NewSave) ||
642 EntryFreq < MBFI->getBlockFreq(NewSave) ||
643 /*Entry freq has been observed more than a loop block in
644 some cases*/
645 MLI->getLoopFor(NewSave)))
646 NewSave = FindIDom<>(**NewSave->pred_begin(), NewSave->predecessors(), *MDT,
647 false);
648
649 const TargetFrameLowering *TFI = MF.getSubtarget().getFrameLowering();
650 if (!NewSave || NewSave == InitSave ||
651 isSaveReachableThroughClean(NewSave, CleanPreds) ||
652 !TFI->canUseAsPrologue(*NewSave))
653 return false;
654
655 // Now we know that splitting a restore point can isolate the restore point
656 // from clean blocks and doing so can shrink the save point.
657 MachineBasicBlock *NewRestore =
658 tryToSplitRestore(InitRestore, DirtyPreds, TII);
659
660 // Make sure if the new restore point is valid as an epilogue, depending on
661 // targets.
662 if (!TFI->canUseAsEpilogue(*NewRestore)) {
663 rollbackRestoreSplit(MF, NewRestore, InitRestore, DirtyPreds, TII);
664 return false;
665 }
666
667 Save = NewSave;
668 Restore = NewRestore;
669
670 MDT->recalculate(MF);
671 MPDT->recalculate(MF);
672
673 assert((MDT->dominates(Save, Restore) && MPDT->dominates(Restore, Save)) &&
674 "Incorrect save or restore point due to dominance relations");
675 assert((!MLI->getLoopFor(Save) && !MLI->getLoopFor(Restore)) &&
676 "Unexpected save or restore point in a loop");
677 assert((EntryFreq >= MBFI->getBlockFreq(Save) &&
678 EntryFreq >= MBFI->getBlockFreq(Restore)) &&
679 "Incorrect save or restore point based on block frequency");
680 return true;
681}
682
683void ShrinkWrap::updateSaveRestorePoints(MachineBasicBlock &MBB,
684 RegScavenger *RS) {
685 // Get rid of the easy cases first.
686 if (!Save)
687 Save = &MBB;
688 else
689 Save = MDT->findNearestCommonDominator(Save, &MBB);
690 assert(Save);
691
692 if (!Restore)
693 Restore = &MBB;
694 else if (MPDT->getNode(&MBB)) // If the block is not in the post dom tree, it
695 // means the block never returns. If that's the
696 // case, we don't want to call
697 // `findNearestCommonDominator`, which will
698 // return `Restore`.
699 Restore = MPDT->findNearestCommonDominator(Restore, &MBB);
700 else
701 Restore = nullptr; // Abort, we can't find a restore point in this case.
702
703 // Make sure we would be able to insert the restore code before the
704 // terminator.
705 if (Restore == &MBB) {
706 for (const MachineInstr &Terminator : MBB.terminators()) {
707 if (!useOrDefCSROrFI(Terminator, RS, /*StackAddressUsed=*/true))
708 continue;
709 // One of the terminator needs to happen before the restore point.
710 if (MBB.succ_empty()) {
711 Restore = nullptr; // Abort, we can't find a restore point in this case.
712 break;
713 }
714 // Look for a restore point that post-dominates all the successors.
715 // The immediate post-dominator is what we are looking for.
716 Restore = FindIDom<>(*Restore, Restore->successors(), *MPDT);
717 break;
718 }
719 }
720
721 if (!Restore) {
723 dbgs() << "Restore point needs to be spanned on several blocks\n");
724 return;
725 }
726
727 // Make sure Save and Restore are suitable for shrink-wrapping:
728 // 1. all path from Save needs to lead to Restore before exiting.
729 // 2. all path to Restore needs to go through Save from Entry.
730 // We achieve that by making sure that:
731 // A. Save dominates Restore.
732 // B. Restore post-dominates Save.
733 // C. Save and Restore are in the same loop.
734 bool SaveDominatesRestore = false;
735 bool RestorePostDominatesSave = false;
736 while (Restore &&
737 (!(SaveDominatesRestore = MDT->dominates(Save, Restore)) ||
738 !(RestorePostDominatesSave = MPDT->dominates(Restore, Save)) ||
739 // Post-dominance is not enough in loops to ensure that all uses/defs
740 // are after the prologue and before the epilogue at runtime.
741 // E.g.,
742 // while(1) {
743 // Save
744 // Restore
745 // if (...)
746 // break;
747 // use/def CSRs
748 // }
749 // All the uses/defs of CSRs are dominated by Save and post-dominated
750 // by Restore. However, the CSRs uses are still reachable after
751 // Restore and before Save are executed.
752 //
753 // For now, just push the restore/save points outside of loops.
754 // FIXME: Refine the criteria to still find interesting cases
755 // for loops.
756 MLI->getLoopFor(Save) || MLI->getLoopFor(Restore))) {
757 // Fix (A).
758 if (!SaveDominatesRestore) {
759 Save = MDT->findNearestCommonDominator(Save, Restore);
760 continue;
761 }
762 // Fix (B).
763 if (!RestorePostDominatesSave)
764 Restore = MPDT->findNearestCommonDominator(Restore, Save);
765
766 // Fix (C).
767 if (Restore && (MLI->getLoopFor(Save) || MLI->getLoopFor(Restore))) {
768 if (MLI->getLoopDepth(Save) > MLI->getLoopDepth(Restore)) {
769 // Push Save outside of this loop if immediate dominator is different
770 // from save block. If immediate dominator is not different, bail out.
771 Save = FindIDom<>(*Save, Save->predecessors(), *MDT);
772 if (!Save)
773 break;
774 } else {
775 // If the loop does not exit, there is no point in looking
776 // for a post-dominator outside the loop.
778 MLI->getLoopFor(Restore)->getExitingBlocks(ExitBlocks);
779 // Push Restore outside of this loop.
780 // Look for the immediate post-dominator of the loop exits.
781 MachineBasicBlock *IPdom = Restore;
782 for (MachineBasicBlock *LoopExitBB: ExitBlocks) {
783 IPdom = FindIDom<>(*IPdom, LoopExitBB->successors(), *MPDT);
784 if (!IPdom)
785 break;
786 }
787 // If the immediate post-dominator is not in a less nested loop,
788 // then we are stuck in a program with an infinite loop.
789 // In that case, we will not find a safe point, hence, bail out.
790 if (IPdom && MLI->getLoopDepth(IPdom) < MLI->getLoopDepth(Restore))
791 Restore = IPdom;
792 else {
793 Restore = nullptr;
794 break;
795 }
796 }
797 }
798 }
799}
800
802 StringRef RemarkName, StringRef RemarkMessage,
803 const DiagnosticLocation &Loc,
804 const MachineBasicBlock *MBB) {
805 ORE->emit([&]() {
806 return MachineOptimizationRemarkMissed(DEBUG_TYPE, RemarkName, Loc, MBB)
807 << RemarkMessage;
808 });
809
810 LLVM_DEBUG(dbgs() << RemarkMessage << '\n');
811 return false;
812}
813
814bool ShrinkWrap::performShrinkWrapping(
816 RegScavenger *RS) {
817 for (MachineBasicBlock *MBB : RPOT) {
818 LLVM_DEBUG(dbgs() << "Look into: " << printMBBReference(*MBB) << '\n');
819
820 if (MBB->isEHFuncletEntry())
821 return giveUpWithRemarks(ORE, "UnsupportedEHFunclets",
822 "EH Funclets are not supported yet.",
823 MBB->front().getDebugLoc(), MBB);
824
826 // Push the prologue and epilogue outside of the region that may throw (or
827 // jump out via inlineasm_br), by making sure that all the landing pads
828 // are at least at the boundary of the save and restore points. The
829 // problem is that a basic block can jump out from the middle in these
830 // cases, which we do not handle.
831 updateSaveRestorePoints(*MBB, RS);
832 if (!ArePointsInteresting()) {
833 LLVM_DEBUG(dbgs() << "EHPad/inlineasm_br prevents shrink-wrapping\n");
834 return false;
835 }
836 continue;
837 }
838
839 bool StackAddressUsed = false;
840 // Check if we found any stack accesses in the predecessors. We are not
841 // doing a full dataflow analysis here to keep things simple but just
842 // rely on a reverse portorder traversal (RPOT) to guarantee predecessors
843 // are already processed except for loops (and accept the conservative
844 // result for loops).
845 for (const MachineBasicBlock *Pred : MBB->predecessors()) {
846 if (StackAddressUsedBlockInfo.test(Pred->getNumber())) {
847 StackAddressUsed = true;
848 break;
849 }
850 }
851
852 for (const MachineInstr &MI : *MBB) {
853 if (useOrDefCSROrFI(MI, RS, StackAddressUsed)) {
854 // Save (resp. restore) point must dominate (resp. post dominate)
855 // MI. Look for the proper basic block for those.
856 updateSaveRestorePoints(*MBB, RS);
857 // If we are at a point where we cannot improve the placement of
858 // save/restore instructions, just give up.
859 if (!ArePointsInteresting()) {
860 LLVM_DEBUG(dbgs() << "No Shrink wrap candidate found\n");
861 return false;
862 }
863 // No need to look for other instructions, this basic block
864 // will already be part of the handled region.
865 StackAddressUsed = true;
866 break;
867 }
868 }
869 StackAddressUsedBlockInfo[MBB->getNumber()] = StackAddressUsed;
870 }
871 if (!ArePointsInteresting()) {
872 // If the points are not interesting at this point, then they must be null
873 // because it means we did not encounter any frame/CSR related code.
874 // Otherwise, we would have returned from the previous loop.
875 assert(!Save && !Restore && "We miss a shrink-wrap opportunity?!");
876 LLVM_DEBUG(dbgs() << "Nothing to shrink-wrap\n");
877 return false;
878 }
879
880 LLVM_DEBUG(dbgs() << "\n ** Results **\nFrequency of the Entry: "
881 << EntryFreq.getFrequency() << '\n');
882
883 const TargetFrameLowering *TFI =
884 MachineFunc->getSubtarget().getFrameLowering();
885 do {
886 LLVM_DEBUG(dbgs() << "Shrink wrap candidates (#, Name, Freq):\nSave: "
887 << printMBBReference(*Save) << ' '
888 << printBlockFreq(*MBFI, *Save)
889 << "\nRestore: " << printMBBReference(*Restore) << ' '
890 << printBlockFreq(*MBFI, *Restore) << '\n');
891
892 bool IsSaveCheap, TargetCanUseSaveAsPrologue = false;
893 if (((IsSaveCheap = EntryFreq >= MBFI->getBlockFreq(Save)) &&
894 EntryFreq >= MBFI->getBlockFreq(Restore)) &&
895 ((TargetCanUseSaveAsPrologue = TFI->canUseAsPrologue(*Save)) &&
896 TFI->canUseAsEpilogue(*Restore)))
897 break;
899 dbgs() << "New points are too expensive or invalid for the target\n");
900 MachineBasicBlock *NewBB;
901 if (!IsSaveCheap || !TargetCanUseSaveAsPrologue) {
902 Save = FindIDom<>(*Save, Save->predecessors(), *MDT);
903 if (!Save)
904 break;
905 NewBB = Save;
906 } else {
907 // Restore is expensive.
908 Restore = FindIDom<>(*Restore, Restore->successors(), *MPDT);
909 if (!Restore)
910 break;
911 NewBB = Restore;
912 }
913 updateSaveRestorePoints(*NewBB, RS);
914 } while (Save && Restore);
915
916 if (!ArePointsInteresting()) {
917 ++NumCandidatesDropped;
918 return false;
919 }
920 return true;
921}
922
923bool ShrinkWrap::runOnMachineFunction(MachineFunction &MF) {
924 if (skipFunction(MF.getFunction()) || MF.empty() || !isShrinkWrapEnabled(MF))
925 return false;
926
927 LLVM_DEBUG(dbgs() << "**** Analysing " << MF.getName() << '\n');
928
929 init(MF);
930
932 if (containsIrreducibleCFG<MachineBasicBlock *>(RPOT, *MLI)) {
933 // If MF is irreducible, a block may be in a loop without
934 // MachineLoopInfo reporting it. I.e., we may use the
935 // post-dominance property in loops, which lead to incorrect
936 // results. Moreover, we may miss that the prologue and
937 // epilogue are not in the same loop, leading to unbalanced
938 // construction/deconstruction of the stack frame.
939 return giveUpWithRemarks(ORE, "UnsupportedIrreducibleCFG",
940 "Irreducible CFGs are not supported yet.",
941 MF.getFunction().getSubprogram(), &MF.front());
942 }
943
945 std::unique_ptr<RegScavenger> RS(
946 TRI->requiresRegisterScavenging(MF) ? new RegScavenger() : nullptr);
947
948 bool Changed = false;
949
950 // Initially, conservatively assume that stack addresses can be used in each
951 // basic block and change the state only for those basic blocks for which we
952 // were able to prove the opposite.
953 StackAddressUsedBlockInfo.resize(MF.getNumBlockIDs(), true);
954 bool HasCandidate = performShrinkWrapping(RPOT, RS.get());
955 StackAddressUsedBlockInfo.clear();
956 Changed = postShrinkWrapping(HasCandidate, MF, RS.get());
957 if (!HasCandidate && !Changed)
958 return false;
959 if (!ArePointsInteresting())
960 return Changed;
961
962 LLVM_DEBUG(dbgs() << "Final shrink wrap candidates:\nSave: "
963 << printMBBReference(*Save) << ' '
964 << "\nRestore: " << printMBBReference(*Restore) << '\n');
965
966 MachineFrameInfo &MFI = MF.getFrameInfo();
967 MFI.setSavePoint(Save);
968 MFI.setRestorePoint(Restore);
969 ++NumCandidates;
970 return Changed;
971}
972
973bool ShrinkWrap::isShrinkWrapEnabled(const MachineFunction &MF) {
975
976 switch (EnableShrinkWrapOpt) {
977 case cl::BOU_UNSET:
978 return TFI->enableShrinkWrapping(MF) &&
979 // Windows with CFI has some limitations that make it impossible
980 // to use shrink-wrapping.
982 // Sanitizers look at the value of the stack at the location
983 // of the crash. Since a crash can happen anywhere, the
984 // frame must be lowered before anything else happen for the
985 // sanitizers to be able to get a correct stack frame.
986 !(MF.getFunction().hasFnAttribute(Attribute::SanitizeAddress) ||
987 MF.getFunction().hasFnAttribute(Attribute::SanitizeThread) ||
988 MF.getFunction().hasFnAttribute(Attribute::SanitizeMemory) ||
989 MF.getFunction().hasFnAttribute(Attribute::SanitizeType) ||
990 MF.getFunction().hasFnAttribute(Attribute::SanitizeHWAddress));
991 // If EnableShrinkWrap is set, it takes precedence on whatever the
992 // target sets. The rational is that we assume we want to test
993 // something related to shrink-wrapping.
994 case cl::BOU_TRUE:
995 return true;
996 case cl::BOU_FALSE:
997 return false;
998 }
999 llvm_unreachable("Invalid shrink-wrapping state");
1000}
aarch64 promote const
MachineBasicBlock & MBB
MachineBasicBlock MachineBasicBlock::iterator DebugLoc DL
This file contains the simple types necessary to represent the attributes associated with functions a...
This file implements the BitVector class.
#define LLVM_DEBUG(...)
Definition: Debug.h:106
const HexagonInstrInfo * TII
IRTranslator LLVM IR MI
===- MachineOptimizationRemarkEmitter.h - Opt Diagnostics -*- C++ -*-—===//
unsigned const TargetRegisterInfo * TRI
#define INITIALIZE_PASS_DEPENDENCY(depName)
Definition: PassSupport.h:55
#define INITIALIZE_PASS_END(passName, arg, name, cfg, analysis)
Definition: PassSupport.h:57
#define INITIALIZE_PASS_BEGIN(passName, arg, name, cfg, analysis)
Definition: PassSupport.h:52
This file builds on the ADT/GraphTraits.h file to build a generic graph post order iterator.
const SmallVectorImpl< MachineOperand > MachineBasicBlock * TBB
const SmallVectorImpl< MachineOperand > & Cond
This file declares the machine register scavenger class.
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
This file implements a set that has insertion order iteration characteristics.
static void markAllReachable(DenseSet< const MachineBasicBlock * > &Visited, const MachineBasicBlock &MBB)
Derives the list of all the basic blocks reachable from MBB.
Definition: ShrinkWrap.cpp:411
static void updateTerminator(MachineBasicBlock *BBToUpdate, MachineBasicBlock *NMBB, const TargetInstrInfo *TII)
This function updates the branches post restore point split.
Definition: ShrinkWrap.cpp:463
static MachineBasicBlock * tryToSplitRestore(MachineBasicBlock *MBB, ArrayRef< MachineBasicBlock * > DirtyPreds, const TargetInstrInfo *TII)
This function splits the restore point and returns new restore point/BB.
Definition: ShrinkWrap.cpp:484
static bool hasDirtyPred(const DenseSet< const MachineBasicBlock * > &ReachableByDirty, const MachineBasicBlock &MBB)
Determines if any predecessor of MBB is on the path from block that has use or def of CSRs/FI to MBB.
Definition: ShrinkWrap.cpp:402
static bool giveUpWithRemarks(MachineOptimizationRemarkEmitter *ORE, StringRef RemarkName, StringRef RemarkMessage, const DiagnosticLocation &Loc, const MachineBasicBlock *MBB)
Definition: ShrinkWrap.cpp:801
static cl::opt< bool > EnablePostShrinkWrapOpt("enable-shrink-wrap-region-split", cl::init(true), cl::Hidden, cl::desc("enable splitting of the restore block if possible"))
static void rollbackRestoreSplit(MachineFunction &MF, MachineBasicBlock *NMBB, MachineBasicBlock *MBB, ArrayRef< MachineBasicBlock * > DirtyPreds, const TargetInstrInfo *TII)
This function undoes the restore point split done earlier.
Definition: ShrinkWrap.cpp:527
static bool isAnalyzableBB(const TargetInstrInfo &TII, MachineBasicBlock &Entry)
Definition: ShrinkWrap.cpp:389
static bool isSaveReachableThroughClean(const MachineBasicBlock *SavePoint, ArrayRef< MachineBasicBlock * > CleanPreds)
Definition: ShrinkWrap.cpp:438
static cl::opt< cl::boolOrDefault > EnableShrinkWrapOpt("enable-shrink-wrap", cl::Hidden, cl::desc("enable the shrink-wrapping pass"))
#define DEBUG_TYPE
Definition: ShrinkWrap.cpp:90
static void collectBlocksReachableByDirty(const DenseSet< const MachineBasicBlock * > &DirtyBBs, DenseSet< const MachineBasicBlock * > &ReachableByDirty)
Collect blocks reachable by use or def of CSRs/FI.
Definition: ShrinkWrap.cpp:424
static MachineBasicBlock * FindIDom(MachineBasicBlock &Block, ListOfBBs BBs, DominanceAnalysis &Dom, bool Strict=true)
Helper function to find the immediate (post) dominator.
Definition: ShrinkWrap.cpp:376
This file defines the SmallVector class.
This file defines the 'Statistic' class, which is designed to be an easy way to expose various metric...
#define STATISTIC(VARNAME, DESC)
Definition: Statistic.h:166
This file describes how to lower LLVM code to machine code.
Represent the analysis usage information of a pass.
AnalysisUsage & addRequired()
void setPreservesAll()
Set by analyses that do not transform their input at all.
ArrayRef - Represent a constant reference to an array (0 or more elements consecutively in memory),...
Definition: ArrayRef.h:41
bool test(unsigned Idx) const
Definition: BitVector.h:461
int find_first() const
find_first - Returns the index of the first set bit, -1 if none of the bits are set.
Definition: BitVector.h:300
void resize(unsigned N, bool t=false)
resize - Grow or shrink the bitvector.
Definition: BitVector.h:341
void clear()
clear - Removes all bits from the bitvector.
Definition: BitVector.h:335
int find_next(unsigned Prev) const
find_next - Returns the index of the next set bit following the "Prev" bit.
Definition: BitVector.h:308
uint64_t getFrequency() const
Returns the frequency as a fixpoint number scaled by the entry frequency.
This class represents an Operation in the Expression.
A debug info location.
Definition: DebugLoc.h:33
Implements a dense probed hash-table based set.
Definition: DenseSet.h:278
NodeT * findNearestCommonDominator(NodeT *A, NodeT *B) const
Find nearest common dominator basic block for basic block A and B.
bool dominates(const DomTreeNodeBase< NodeT > *A, const DomTreeNodeBase< NodeT > *B) const
dominates - Returns true iff A dominates B.
void recalculate(ParentType &Func)
recalculate - compute a dominator tree for the given function
DomTreeNodeBase< NodeT > * getNode(const NodeT *BB) const
getNode - return the (Post)DominatorTree node for the specified basic block.
DISubprogram * getSubprogram() const
Get the attached subprogram.
Definition: Metadata.cpp:1874
bool hasFnAttribute(Attribute::AttrKind Kind) const
Return true if the function has the attribute.
Definition: Function.cpp:731
bool analyzeBranch(MachineBasicBlock &MBB, MachineBasicBlock *&TBB, MachineBasicBlock *&FBB, SmallVectorImpl< MachineOperand > &Cond, bool AllowModify) const override
Analyze the branching code at the end of MBB, returning true if it cannot be understood (e....
void getExitingBlocks(SmallVectorImpl< BlockT * > &ExitingBlocks) const
Return all blocks inside the loop that have successors outside of the loop.
unsigned getLoopDepth(const BlockT *BB) const
Return the loop nesting level of the specified block.
LoopT * getLoopFor(const BlockT *BB) const
Return the inner most loop that BB lives in.
bool usesWindowsCFI() const
Definition: MCAsmInfo.h:759
bool isInlineAsmBrIndirectTarget() const
Returns true if this is the indirect dest of an INLINEASM_BR.
unsigned pred_size() const
bool isEHPad() const
Returns true if the block is a landing pad.
iterator_range< livein_iterator > liveins() const
int getNumber() const
MachineBasicBlocks are uniquely numbered at the function level, unless they're not in a MachineFuncti...
bool isEHFuncletEntry() const
Returns true if this is the entry block of an EH funclet.
bool isReturnBlock() const
Convenience function that returns true if the block ends in a return instruction.
void addSuccessor(MachineBasicBlock *Succ, BranchProbability Prob=BranchProbability::getUnknown())
Add Succ as a successor of this MachineBasicBlock.
void removeSuccessor(MachineBasicBlock *Succ, bool NormalizeSuccProbs=false)
Remove successor from the successors list of this MachineBasicBlock.
bool isLayoutSuccessor(const MachineBasicBlock *MBB) const
Return true if the specified MBB will be emitted immediately after this block, such that if this bloc...
void eraseFromParent()
This method unlinks 'this' from the containing function and deletes it.
void addLiveIn(MCRegister PhysReg, LaneBitmask LaneMask=LaneBitmask::getAll())
Adds the specified register as a live in.
const MachineFunction * getParent() const
Return the MachineFunction containing this basic block.
instr_iterator erase(instr_iterator I)
Remove an instruction from the instruction list and delete it.
iterator_range< iterator > terminators()
DebugLoc findBranchDebugLoc()
Find and return the merged DebugLoc of the branch instructions of the block.
iterator_range< succ_iterator > successors()
iterator_range< pred_iterator > predecessors()
MachineBlockFrequencyInfo pass uses BlockFrequencyInfoImpl implementation to estimate machine basic b...
BlockFrequency getBlockFreq(const MachineBasicBlock *MBB) const
getblockFreq - Return block frequency.
BlockFrequency getEntryFreq() const
Divide a block's BlockFrequency::getFrequency() value by this value to obtain the entry block - relat...
Analysis pass which computes a MachineDominatorTree.
DominatorTree Class - Concrete subclass of DominatorTreeBase that is used to compute a normal dominat...
bool dominates(const MachineInstr *A, const MachineInstr *B) const
The MachineFrameInfo class represents an abstract stack frame until prolog/epilog code is inserted.
void setRestorePoint(MachineBasicBlock *NewRestore)
void setSavePoint(MachineBasicBlock *NewSave)
MachineFunctionPass - This class adapts the FunctionPass interface to allow convenient creation of pa...
void getAnalysisUsage(AnalysisUsage &AU) const override
getAnalysisUsage - Subclasses that override getAnalysisUsage must call this.
virtual bool runOnMachineFunction(MachineFunction &MF)=0
runOnMachineFunction - This method must be overloaded to perform the desired machine code transformat...
virtual MachineFunctionProperties getRequiredProperties() const
Properties which a MachineFunction may have at a given point in time.
MachineFunctionProperties & set(Property P)
const TargetSubtargetInfo & getSubtarget() const
getSubtarget - Return the subtarget for which this machine code is being compiled.
StringRef getName() const
getName - Return the name of the corresponding LLVM function.
MachineFrameInfo & getFrameInfo()
getFrameInfo - Return the frame info object for the current function.
Function & getFunction()
Return the LLVM function that this machine code represents.
unsigned getNumBlockIDs() const
getNumBlockIDs - Return the number of MBB ID's allocated.
const MachineBasicBlock & front() const
MachineBasicBlock * CreateMachineBasicBlock(const BasicBlock *BB=nullptr, std::optional< UniqueBBID > BBID=std::nullopt)
CreateMachineBasicBlock - Allocate a new MachineBasicBlock.
void insert(iterator MBBI, MachineBasicBlock *MBB)
const TargetMachine & getTarget() const
getTarget - Return the target machine this machine code is compiled with
Representation of each machine instruction.
Definition: MachineInstr.h:69
const DebugLoc & getDebugLoc() const
Returns the debug location id of this MachineInstr.
Definition: MachineInstr.h:499
A description of a memory reference used in the backend.
MachineOperand class - Representation of each machine instruction operand.
void emit(DiagnosticInfoOptimizationBase &OptDiag)
Emit an optimization remark.
Diagnostic information for missed-optimization remarks.
MachinePostDominatorTree - an analysis pass wrapper for DominatorTree used to compute the post-domina...
MachineBasicBlock * findNearestCommonDominator(ArrayRef< MachineBasicBlock * > Blocks) const
Returns the nearest common dominator of the given blocks.
static PassRegistry * getPassRegistry()
getPassRegistry - Access the global registry object, which is automatically initialized at applicatio...
Pass interface - Implemented by all 'passes'.
Definition: Pass.h:94
virtual StringRef getPassName() const
getPassName - Return a nice clean name for a pass.
Definition: Pass.cpp:81
Special value supplied for machine level alias analysis.
MCRegister getLastCalleeSavedAlias(MCRegister PhysReg) const
getLastCalleeSavedAlias - Returns the last callee saved register that overlaps PhysReg,...
void runOnMachineFunction(const MachineFunction &MF)
runOnFunction - Prepare to answer questions about MF.
Wrapper class representing virtual and physical registers.
Definition: Register.h:19
constexpr bool isPhysical() const
Return true if the specified register number is in the physical register namespace.
Definition: Register.h:95
std::pair< iterator, bool > insert(PtrType Ptr)
Inserts Ptr if and only if there is no element in the container equal to Ptr.
Definition: SmallPtrSet.h:384
SmallPtrSet - This class implements a set which is optimized for holding SmallSize or less elements.
Definition: SmallPtrSet.h:519
A SetVector that performs no allocations if smaller than a certain size.
Definition: SetVector.h:370
bool empty() const
Definition: SmallVector.h:81
This class consists of common code factored out of the SmallVector class to reduce code duplication b...
Definition: SmallVector.h:573
void append(ItTy in_start, ItTy in_end)
Add the specified range to the end of the SmallVector.
Definition: SmallVector.h:683
void push_back(const T &Elt)
Definition: SmallVector.h:413
This is a 'vector' (really, a variable-sized array), optimized for the case when the array is small.
Definition: SmallVector.h:1196
StringRef - Represent a constant reference to a string, i.e.
Definition: StringRef.h:51
Information about stack frame layout on the target.
virtual void determineCalleeSaves(MachineFunction &MF, BitVector &SavedRegs, RegScavenger *RS=nullptr) const
This method determines which of the registers reported by TargetRegisterInfo::getCalleeSavedRegs() sh...
virtual bool enableShrinkWrapping(const MachineFunction &MF) const
Returns true if the target will correctly handle shrink wrapping.
virtual bool canUseAsEpilogue(const MachineBasicBlock &MBB) const
Check whether or not the given MBB can be used as a epilogue for the target.
virtual bool canUseAsPrologue(const MachineBasicBlock &MBB) const
Check whether or not the given MBB can be used as a prologue for the target.
TargetInstrInfo - Interface to description of machine instruction set.
Register getStackPointerRegisterToSaveRestore() const
If a physical register, this specifies the register that llvm.savestack/llvm.restorestack should save...
const MCAsmInfo * getMCAsmInfo() const
Return target specific asm information.
TargetRegisterInfo base class - We assume that the target defines a static array of TargetRegisterDes...
TargetSubtargetInfo - Generic base class for all target subtargets.
virtual const TargetRegisterInfo * getRegisterInfo() const
getRegisterInfo - If register information is available, return it.
virtual const TargetFrameLowering * getFrameLowering() const
virtual const TargetInstrInfo * getInstrInfo() const
virtual const TargetLowering * getTargetLowering() const
LLVM Value Representation.
Definition: Value.h:74
std::pair< iterator, bool > insert(const ValueT &V)
Definition: DenseSet.h:213
size_type count(const_arg_type_t< ValueT > V) const
Return 1 if the specified key is in the set, 0 otherwise.
Definition: DenseSet.h:95
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
@ Entry
Definition: COFF.h:844
unsigned ID
LLVM IR allows to use arbitrary numbers as calling convention identifiers.
Definition: CallingConv.h:24
initializer< Ty > init(const Ty &Val)
Definition: CommandLine.h:443
This is an optimization pass for GlobalISel generic memory operations.
Definition: AddressRanges.h:18
bool all_of(R &&range, UnaryPredicate P)
Provide wrappers to std::all_of which take ranges instead of having to pass begin/end explicitly.
Definition: STLExtras.h:1739
const Value * getUnderlyingObject(const Value *V, unsigned MaxLookup=6)
This method strips off any GEP address adjustments, pointer casts or llvm.threadlocal....
char & ShrinkWrapID
ShrinkWrap pass. Look for the best place to insert save and restore.
Definition: ShrinkWrap.cpp:287
void initializeShrinkWrapPass(PassRegistry &)
raw_ostream & dbgs()
dbgs() - This returns a reference to a raw_ostream for debugging messages.
Definition: Debug.cpp:163
DWARFExpression::Operation Op
Printable printBlockFreq(const BlockFrequencyInfo &BFI, BlockFrequency Freq)
Print the block frequency Freq relative to the current functions entry frequency.
Printable printMBBReference(const MachineBasicBlock &MBB)
Prints a machine basic block reference.
Pair of physical register and lane mask.