LLVM  10.0.0svn
TargetFrameLoweringImpl.cpp
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1 //===- TargetFrameLoweringImpl.cpp - Implement target frame interface ------==//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // Implements the layout of a stack frame on the target machine.
10 //
11 //===----------------------------------------------------------------------===//
12 
13 #include "llvm/ADT/BitVector.h"
20 #include "llvm/IR/Attributes.h"
21 #include "llvm/IR/CallingConv.h"
22 #include "llvm/IR/Function.h"
23 #include "llvm/MC/MCRegisterInfo.h"
24 #include "llvm/Support/Compiler.h"
27 
28 using namespace llvm;
29 
31 
33  assert(MF.getFunction().hasFnAttribute(Attribute::NoReturn) &&
34  MF.getFunction().hasFnAttribute(Attribute::NoUnwind) &&
35  !MF.getFunction().hasFnAttribute(Attribute::UWTable));
36  return false;
37 }
38 
39 /// Returns the displacement from the frame register to the stack
40 /// frame of the specified index, along with the frame register used
41 /// (in output arg FrameReg). This is the default implementation which
42 /// is overridden for some targets.
44  int FI, unsigned &FrameReg) const {
45  const MachineFrameInfo &MFI = MF.getFrameInfo();
47 
48  // By default, assume all frame indices are referenced via whatever
49  // getFrameRegister() says. The target can override this if it's doing
50  // something different.
51  FrameReg = RI->getFrameRegister(MF);
52 
53  return MFI.getObjectOffset(FI) + MFI.getStackSize() -
55 }
56 
58  const MachineFunction &MF) const {
59  return MF.getFrameInfo().hasStackObjects();
60 }
61 
63  BitVector &SavedRegs,
64  RegScavenger *RS) const {
66 
67  // Resize before the early returns. Some backends expect that
68  // SavedRegs.size() == TRI.getNumRegs() after this call even if there are no
69  // saved registers.
70  SavedRegs.resize(TRI.getNumRegs());
71 
72  // When interprocedural register allocation is enabled caller saved registers
73  // are preferred over callee saved registers.
74  if (MF.getTarget().Options.EnableIPRA &&
77  return;
78 
79  // Get the callee saved register list...
80  const MCPhysReg *CSRegs = MF.getRegInfo().getCalleeSavedRegs();
81 
82  // Early exit if there are no callee saved registers.
83  if (!CSRegs || CSRegs[0] == 0)
84  return;
85 
86  // In Naked functions we aren't going to save any registers.
87  if (MF.getFunction().hasFnAttribute(Attribute::Naked))
88  return;
89 
90  // Noreturn+nounwind functions never restore CSR, so no saves are needed.
91  // Purely noreturn functions may still return through throws, so those must
92  // save CSR for caller exception handlers.
93  //
94  // If the function uses longjmp to break out of its current path of
95  // execution we do not need the CSR spills either: setjmp stores all CSRs
96  // it was called with into the jmp_buf, which longjmp then restores.
97  if (MF.getFunction().hasFnAttribute(Attribute::NoReturn) &&
98  MF.getFunction().hasFnAttribute(Attribute::NoUnwind) &&
99  !MF.getFunction().hasFnAttribute(Attribute::UWTable) &&
101  return;
102 
103  // Functions which call __builtin_unwind_init get all their registers saved.
104  bool CallsUnwindInit = MF.callsUnwindInit();
105  const MachineRegisterInfo &MRI = MF.getRegInfo();
106  for (unsigned i = 0; CSRegs[i]; ++i) {
107  unsigned Reg = CSRegs[i];
108  if (CallsUnwindInit || MRI.isPhysRegModified(Reg))
109  SavedRegs.set(Reg);
110  }
111 }
112 
114  const MachineFunction &MF) const {
115  // When HHVM function is called, the stack is skewed as the return address
116  // is removed from the stack before we enter the function.
118  return MF.getTarget().getAllocaPointerSize();
119 
120  return 0;
121 }
122 
124  llvm_unreachable("getInitialCFAOffset() not implemented!");
125 }
126 
128  const {
129  llvm_unreachable("getInitialCFARegister() not implemented!");
130 }
void resize(unsigned N, bool t=false)
resize - Grow or shrink the bitvector.
Definition: BitVector.h:371
BitVector & set()
Definition: BitVector.h:397
Calling convention used by HipHop Virtual Machine (HHVM) to perform calls to and from translation cac...
Definition: CallingConv.h:168
This class represents lattice values for constants.
Definition: AllocatorList.h:23
#define LLVM_UNLIKELY(EXPR)
Definition: Compiler.h:212
virtual int getFrameIndexReference(const MachineFunction &MF, int FI, unsigned &FrameReg) const
getFrameIndexReference - This method should return the base register and offset used to reference a f...
virtual const TargetRegisterInfo * getRegisterInfo() const
getRegisterInfo - If register information is available, return it.
bool hasStackObjects() const
Return true if there are any stack objects in this function.
bool isPhysRegModified(unsigned PhysReg, bool SkipNoReturnDef=false) const
Return true if the specified register is modified in this function.
unsigned Reg
bool hasFnAttribute(Attribute::AttrKind Kind) const
Return true if the function has the attribute.
Definition: Function.h:323
unsigned const TargetRegisterInfo * TRI
int getOffsetOfLocalArea() const
getOffsetOfLocalArea - This method returns the offset of the local area from the stack pointer on ent...
virtual void determineCalleeSaves(MachineFunction &MF, BitVector &SavedRegs, RegScavenger *RS=nullptr) const
This method determines which of the registers reported by TargetRegisterInfo::getCalleeSavedRegs() sh...
static bool isSafeForNoCSROpt(const Function &F)
Check if given function is safe for not having callee saved registers.
unsigned EnableIPRA
This flag enables InterProcedural Register Allocation (IPRA).
int64_t getObjectOffset(int ObjectIdx) const
Return the assigned stack offset of the specified object from the incoming stack pointer.
This file contains the simple types necessary to represent the attributes associated with functions a...
The MachineFrameInfo class represents an abstract stack frame until prolog/epilog code is inserted...
virtual unsigned getStackAlignmentSkew(const MachineFunction &MF) const
Return the skew that has to be applied to stack alignment under certain conditions (e...
virtual bool needsFrameIndexResolution(const MachineFunction &MF) const
uint16_t MCPhysReg
An unsigned integer type large enough to represent all physical registers, but not necessarily virtua...
Definition: MCRegister.h:19
unsigned getAllocaPointerSize() const
unsigned getNumRegs() const
Return the number of registers this target has (useful for sizing arrays holding per register informa...
unsigned const MachineRegisterInfo * MRI
const TargetSubtargetInfo & getSubtarget() const
getSubtarget - Return the subtarget for which this machine code is being compiled.
MachineFrameInfo & getFrameInfo()
getFrameInfo - Return the frame info object for the current function.
TargetRegisterInfo base class - We assume that the target defines a static array of TargetRegisterDes...
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
CallingConv::ID getCallingConv() const
getCallingConv()/setCallingConv(CC) - These method get and set the calling convention of this functio...
Definition: Function.h:212
virtual Register getFrameRegister(const MachineFunction &MF) const =0
Debug information queries.
bool callsUnwindInit() const
const Function & getFunction() const
Return the LLVM function that this machine code represents.
MachineRegisterInfo - Keep track of information for virtual and physical registers, including vreg register classes, use/def chains for registers, etc.
MachineRegisterInfo & getRegInfo()
getRegInfo - Return information about the registers currently in use.
virtual bool enableCalleeSaveSkip(const MachineFunction &MF) const
Returns true if the target can safely skip saving callee-saved registers for noreturn nounwind functi...
TargetOptions Options
int getOffsetAdjustment() const
Return the correction for frame offsets.
const LLVMTargetMachine & getTarget() const
getTarget - Return the target machine this machine code is compiled with
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
const MCPhysReg * getCalleeSavedRegs() const
Returns list of callee saved registers.
uint64_t getStackSize() const
Return the number of bytes that must be allocated to hold all of the fixed size frame objects...
virtual int getInitialCFAOffset(const MachineFunction &MF) const
Return initial CFA offset value i.e.
virtual unsigned getInitialCFARegister(const MachineFunction &MF) const
Return initial CFA register value i.e.
virtual bool isProfitableForNoCSROpt(const Function &F) const
Check if the no-CSR optimisation is profitable for the given function.