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MachineCopyPropagation.cpp
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1 //===- MachineCopyPropagation.cpp - Machine Copy Propagation Pass ---------===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // This is an extremely simple MachineInstr-level copy propagation pass.
10 //
11 // This pass forwards the source of COPYs to the users of their destinations
12 // when doing so is legal. For example:
13 //
14 // %reg1 = COPY %reg0
15 // ...
16 // ... = OP %reg1
17 //
18 // If
19 // - %reg0 has not been clobbered by the time of the use of %reg1
20 // - the register class constraints are satisfied
21 // - the COPY def is the only value that reaches OP
22 // then this pass replaces the above with:
23 //
24 // %reg1 = COPY %reg0
25 // ...
26 // ... = OP %reg0
27 //
28 // This pass also removes some redundant COPYs. For example:
29 //
30 // %R1 = COPY %R0
31 // ... // No clobber of %R1
32 // %R0 = COPY %R1 <<< Removed
33 //
34 // or
35 //
36 // %R1 = COPY %R0
37 // ... // No clobber of %R0
38 // %R1 = COPY %R0 <<< Removed
39 //
40 // or
41 //
42 // $R0 = OP ...
43 // ... // No read/clobber of $R0 and $R1
44 // $R1 = COPY $R0 // $R0 is killed
45 // Replace $R0 with $R1 and remove the COPY
46 // $R1 = OP ...
47 // ...
48 //
49 //===----------------------------------------------------------------------===//
50 
51 #include "llvm/ADT/DenseMap.h"
52 #include "llvm/ADT/STLExtras.h"
53 #include "llvm/ADT/SetVector.h"
54 #include "llvm/ADT/SmallSet.h"
55 #include "llvm/ADT/SmallVector.h"
56 #include "llvm/ADT/Statistic.h"
67 #include "llvm/InitializePasses.h"
68 #include "llvm/MC/MCRegisterInfo.h"
69 #include "llvm/Pass.h"
70 #include "llvm/Support/Debug.h"
73 #include <cassert>
74 #include <iterator>
75 
76 using namespace llvm;
77 
78 #define DEBUG_TYPE "machine-cp"
79 
80 STATISTIC(NumDeletes, "Number of dead copies deleted");
81 STATISTIC(NumCopyForwards, "Number of copy uses forwarded");
82 STATISTIC(NumCopyBackwardPropagated, "Number of copy defs backward propagated");
83 DEBUG_COUNTER(FwdCounter, "machine-cp-fwd",
84  "Controls which register COPYs are forwarded");
85 
86 static cl::opt<bool> MCPUseCopyInstr("mcp-use-is-copy-instr", cl::init(false),
87  cl::Hidden);
88 
89 namespace {
90 
91 static Optional<DestSourcePair> isCopyInstr(const MachineInstr &MI,
92  const TargetInstrInfo &TII,
93  bool UseCopyInstr) {
94  if (UseCopyInstr)
95  return TII.isCopyInstr(MI);
96 
97  if (MI.isCopy())
99  DestSourcePair{MI.getOperand(0), MI.getOperand(1)});
100 
101  return None;
102 }
103 
104 class CopyTracker {
105  struct CopyInfo {
106  MachineInstr *MI;
108  bool Avail;
109  };
110 
112 
113 public:
114  /// Mark all of the given registers and their subregisters as unavailable for
115  /// copying.
116  void markRegsUnavailable(ArrayRef<MCRegister> Regs,
117  const TargetRegisterInfo &TRI) {
118  for (MCRegister Reg : Regs) {
119  // Source of copy is no longer available for propagation.
120  for (MCRegUnitIterator RUI(Reg, &TRI); RUI.isValid(); ++RUI) {
121  auto CI = Copies.find(*RUI);
122  if (CI != Copies.end())
123  CI->second.Avail = false;
124  }
125  }
126  }
127 
128  /// Remove register from copy maps.
129  void invalidateRegister(MCRegister Reg, const TargetRegisterInfo &TRI,
130  const TargetInstrInfo &TII, bool UseCopyInstr) {
131  // Since Reg might be a subreg of some registers, only invalidate Reg is not
132  // enough. We have to find the COPY defines Reg or registers defined by Reg
133  // and invalidate all of them.
134  SmallSet<MCRegister, 8> RegsToInvalidate;
135  RegsToInvalidate.insert(Reg);
136  for (MCRegUnitIterator RUI(Reg, &TRI); RUI.isValid(); ++RUI) {
137  auto I = Copies.find(*RUI);
138  if (I != Copies.end()) {
139  if (MachineInstr *MI = I->second.MI) {
140  Optional<DestSourcePair> CopyOperands =
141  isCopyInstr(*MI, TII, UseCopyInstr);
142  assert(CopyOperands && "Expect copy");
143 
144  RegsToInvalidate.insert(
145  CopyOperands->Destination->getReg().asMCReg());
146  RegsToInvalidate.insert(CopyOperands->Source->getReg().asMCReg());
147  }
148  RegsToInvalidate.insert(I->second.DefRegs.begin(),
149  I->second.DefRegs.end());
150  }
151  }
152  for (MCRegister InvalidReg : RegsToInvalidate)
153  for (MCRegUnitIterator RUI(InvalidReg, &TRI); RUI.isValid(); ++RUI)
154  Copies.erase(*RUI);
155  }
156 
157  /// Clobber a single register, removing it from the tracker's copy maps.
158  void clobberRegister(MCRegister Reg, const TargetRegisterInfo &TRI,
159  const TargetInstrInfo &TII, bool UseCopyInstr) {
160  for (MCRegUnitIterator RUI(Reg, &TRI); RUI.isValid(); ++RUI) {
161  auto I = Copies.find(*RUI);
162  if (I != Copies.end()) {
163  // When we clobber the source of a copy, we need to clobber everything
164  // it defined.
165  markRegsUnavailable(I->second.DefRegs, TRI);
166  // When we clobber the destination of a copy, we need to clobber the
167  // whole register it defined.
168  if (MachineInstr *MI = I->second.MI) {
169  Optional<DestSourcePair> CopyOperands =
170  isCopyInstr(*MI, TII, UseCopyInstr);
171  markRegsUnavailable({CopyOperands->Destination->getReg().asMCReg()},
172  TRI);
173  }
174  // Now we can erase the copy.
175  Copies.erase(I);
176  }
177  }
178  }
179 
180  /// Add this copy's registers into the tracker's copy maps.
181  void trackCopy(MachineInstr *MI, const TargetRegisterInfo &TRI,
182  const TargetInstrInfo &TII, bool UseCopyInstr) {
183  Optional<DestSourcePair> CopyOperands = isCopyInstr(*MI, TII, UseCopyInstr);
184  assert(CopyOperands && "Tracking non-copy?");
185 
186  MCRegister Src = CopyOperands->Source->getReg().asMCReg();
187  MCRegister Def = CopyOperands->Destination->getReg().asMCReg();
188 
189  // Remember Def is defined by the copy.
190  for (MCRegUnitIterator RUI(Def, &TRI); RUI.isValid(); ++RUI)
191  Copies[*RUI] = {MI, {}, true};
192 
193  // Remember source that's copied to Def. Once it's clobbered, then
194  // it's no longer available for copy propagation.
195  for (MCRegUnitIterator RUI(Src, &TRI); RUI.isValid(); ++RUI) {
196  auto I = Copies.insert({*RUI, {nullptr, {}, false}});
197  auto &Copy = I.first->second;
198  if (!is_contained(Copy.DefRegs, Def))
199  Copy.DefRegs.push_back(Def);
200  }
201  }
202 
203  bool hasAnyCopies() {
204  return !Copies.empty();
205  }
206 
207  MachineInstr *findCopyForUnit(MCRegister RegUnit,
208  const TargetRegisterInfo &TRI,
209  bool MustBeAvailable = false) {
210  auto CI = Copies.find(RegUnit);
211  if (CI == Copies.end())
212  return nullptr;
213  if (MustBeAvailable && !CI->second.Avail)
214  return nullptr;
215  return CI->second.MI;
216  }
217 
218  MachineInstr *findCopyDefViaUnit(MCRegister RegUnit,
219  const TargetRegisterInfo &TRI) {
220  auto CI = Copies.find(RegUnit);
221  if (CI == Copies.end())
222  return nullptr;
223  if (CI->second.DefRegs.size() != 1)
224  return nullptr;
225  MCRegUnitIterator RUI(CI->second.DefRegs[0], &TRI);
226  return findCopyForUnit(*RUI, TRI, true);
227  }
228 
229  MachineInstr *findAvailBackwardCopy(MachineInstr &I, MCRegister Reg,
230  const TargetRegisterInfo &TRI,
231  const TargetInstrInfo &TII,
232  bool UseCopyInstr) {
233  MCRegUnitIterator RUI(Reg, &TRI);
234  MachineInstr *AvailCopy = findCopyDefViaUnit(*RUI, TRI);
235 
236  if (!AvailCopy)
237  return nullptr;
238 
239  Optional<DestSourcePair> CopyOperands =
240  isCopyInstr(*AvailCopy, TII, UseCopyInstr);
241  Register AvailSrc = CopyOperands->Source->getReg();
242  Register AvailDef = CopyOperands->Destination->getReg();
243  if (!TRI.isSubRegisterEq(AvailSrc, Reg))
244  return nullptr;
245 
246  for (const MachineInstr &MI :
247  make_range(AvailCopy->getReverseIterator(), I.getReverseIterator()))
248  for (const MachineOperand &MO : MI.operands())
249  if (MO.isRegMask())
250  // FIXME: Shall we simultaneously invalidate AvailSrc or AvailDef?
251  if (MO.clobbersPhysReg(AvailSrc) || MO.clobbersPhysReg(AvailDef))
252  return nullptr;
253 
254  return AvailCopy;
255  }
256 
257  MachineInstr *findAvailCopy(MachineInstr &DestCopy, MCRegister Reg,
258  const TargetRegisterInfo &TRI,
259  const TargetInstrInfo &TII, bool UseCopyInstr) {
260  // We check the first RegUnit here, since we'll only be interested in the
261  // copy if it copies the entire register anyway.
262  MCRegUnitIterator RUI(Reg, &TRI);
263  MachineInstr *AvailCopy =
264  findCopyForUnit(*RUI, TRI, /*MustBeAvailable=*/true);
265 
266  if (!AvailCopy)
267  return nullptr;
268 
269  Optional<DestSourcePair> CopyOperands =
270  isCopyInstr(*AvailCopy, TII, UseCopyInstr);
271  Register AvailSrc = CopyOperands->Source->getReg();
272  Register AvailDef = CopyOperands->Destination->getReg();
273  if (!TRI.isSubRegisterEq(AvailDef, Reg))
274  return nullptr;
275 
276  // Check that the available copy isn't clobbered by any regmasks between
277  // itself and the destination.
278  for (const MachineInstr &MI :
279  make_range(AvailCopy->getIterator(), DestCopy.getIterator()))
280  for (const MachineOperand &MO : MI.operands())
281  if (MO.isRegMask())
282  if (MO.clobbersPhysReg(AvailSrc) || MO.clobbersPhysReg(AvailDef))
283  return nullptr;
284 
285  return AvailCopy;
286  }
287 
288  void clear() {
289  Copies.clear();
290  }
291 };
292 
293 class MachineCopyPropagation : public MachineFunctionPass {
294  const TargetRegisterInfo *TRI;
295  const TargetInstrInfo *TII;
296  const MachineRegisterInfo *MRI;
297 
298  // Return true if this is a copy instruction and false otherwise.
299  bool UseCopyInstr;
300 
301 public:
302  static char ID; // Pass identification, replacement for typeid
303 
304  MachineCopyPropagation(bool CopyInstr = false)
305  : MachineFunctionPass(ID), UseCopyInstr(CopyInstr || MCPUseCopyInstr) {
307  }
308 
309  void getAnalysisUsage(AnalysisUsage &AU) const override {
310  AU.setPreservesCFG();
312  }
313 
314  bool runOnMachineFunction(MachineFunction &MF) override;
315 
316  MachineFunctionProperties getRequiredProperties() const override {
319  }
320 
321 private:
322  typedef enum { DebugUse = false, RegularUse = true } DebugType;
323 
324  void ReadRegister(MCRegister Reg, MachineInstr &Reader, DebugType DT);
325  void ForwardCopyPropagateBlock(MachineBasicBlock &MBB);
326  void BackwardCopyPropagateBlock(MachineBasicBlock &MBB);
327  bool eraseIfRedundant(MachineInstr &Copy, MCRegister Src, MCRegister Def);
328  void forwardUses(MachineInstr &MI);
329  void propagateDefs(MachineInstr &MI);
330  bool isForwardableRegClassCopy(const MachineInstr &Copy,
331  const MachineInstr &UseI, unsigned UseIdx);
332  bool isBackwardPropagatableRegClassCopy(const MachineInstr &Copy,
333  const MachineInstr &UseI,
334  unsigned UseIdx);
335  bool hasImplicitOverlap(const MachineInstr &MI, const MachineOperand &Use);
336  bool hasOverlappingMultipleDef(const MachineInstr &MI,
337  const MachineOperand &MODef, Register Def);
338 
339  /// Candidates for deletion.
340  SmallSetVector<MachineInstr *, 8> MaybeDeadCopies;
341 
342  /// Multimap tracking debug users in current BB
344 
345  CopyTracker Tracker;
346 
347  bool Changed;
348 };
349 
350 } // end anonymous namespace
351 
353 
355 
356 INITIALIZE_PASS(MachineCopyPropagation, DEBUG_TYPE,
357  "Machine Copy Propagation Pass", false, false)
358 
359 void MachineCopyPropagation::ReadRegister(MCRegister Reg, MachineInstr &Reader,
360  DebugType DT) {
361  // If 'Reg' is defined by a copy, the copy is no longer a candidate
362  // for elimination. If a copy is "read" by a debug user, record the user
363  // for propagation.
364  for (MCRegUnitIterator RUI(Reg, TRI); RUI.isValid(); ++RUI) {
365  if (MachineInstr *Copy = Tracker.findCopyForUnit(*RUI, *TRI)) {
366  if (DT == RegularUse) {
367  LLVM_DEBUG(dbgs() << "MCP: Copy is used - not dead: "; Copy->dump());
368  MaybeDeadCopies.remove(Copy);
369  } else {
370  CopyDbgUsers[Copy].insert(&Reader);
371  }
372  }
373  }
374 }
375 
376 /// Return true if \p PreviousCopy did copy register \p Src to register \p Def.
377 /// This fact may have been obscured by sub register usage or may not be true at
378 /// all even though Src and Def are subregisters of the registers used in
379 /// PreviousCopy. e.g.
380 /// isNopCopy("ecx = COPY eax", AX, CX) == true
381 /// isNopCopy("ecx = COPY eax", AH, CL) == false
382 static bool isNopCopy(const MachineInstr &PreviousCopy, MCRegister Src,
384  const TargetInstrInfo *TII, bool UseCopyInstr) {
385 
386  Optional<DestSourcePair> CopyOperands =
387  isCopyInstr(PreviousCopy, *TII, UseCopyInstr);
388  MCRegister PreviousSrc = CopyOperands->Source->getReg().asMCReg();
389  MCRegister PreviousDef = CopyOperands->Destination->getReg().asMCReg();
390  if (Src == PreviousSrc && Def == PreviousDef)
391  return true;
392  if (!TRI->isSubRegister(PreviousSrc, Src))
393  return false;
394  unsigned SubIdx = TRI->getSubRegIndex(PreviousSrc, Src);
395  return SubIdx == TRI->getSubRegIndex(PreviousDef, Def);
396 }
397 
398 /// Remove instruction \p Copy if there exists a previous copy that copies the
399 /// register \p Src to the register \p Def; This may happen indirectly by
400 /// copying the super registers.
401 bool MachineCopyPropagation::eraseIfRedundant(MachineInstr &Copy,
402  MCRegister Src, MCRegister Def) {
403  // Avoid eliminating a copy from/to a reserved registers as we cannot predict
404  // the value (Example: The sparc zero register is writable but stays zero).
405  if (MRI->isReserved(Src) || MRI->isReserved(Def))
406  return false;
407 
408  // Search for an existing copy.
409  MachineInstr *PrevCopy =
410  Tracker.findAvailCopy(Copy, Def, *TRI, *TII, UseCopyInstr);
411  if (!PrevCopy)
412  return false;
413 
414  auto PrevCopyOperands = isCopyInstr(*PrevCopy, *TII, UseCopyInstr);
415  // Check that the existing copy uses the correct sub registers.
416  if (PrevCopyOperands->Destination->isDead())
417  return false;
418  if (!isNopCopy(*PrevCopy, Src, Def, TRI, TII, UseCopyInstr))
419  return false;
420 
421  LLVM_DEBUG(dbgs() << "MCP: copy is a NOP, removing: "; Copy.dump());
422 
423  // Copy was redundantly redefining either Src or Def. Remove earlier kill
424  // flags between Copy and PrevCopy because the value will be reused now.
425  Optional<DestSourcePair> CopyOperands = isCopyInstr(Copy, *TII, UseCopyInstr);
426  assert(CopyOperands);
427 
428  Register CopyDef = CopyOperands->Destination->getReg();
429  assert(CopyDef == Src || CopyDef == Def);
430  for (MachineInstr &MI :
431  make_range(PrevCopy->getIterator(), Copy.getIterator()))
432  MI.clearRegisterKills(CopyDef, TRI);
433 
434  Copy.eraseFromParent();
435  Changed = true;
436  ++NumDeletes;
437  return true;
438 }
439 
440 bool MachineCopyPropagation::isBackwardPropagatableRegClassCopy(
441  const MachineInstr &Copy, const MachineInstr &UseI, unsigned UseIdx) {
442 
443  Optional<DestSourcePair> CopyOperands = isCopyInstr(Copy, *TII, UseCopyInstr);
444  Register Def = CopyOperands->Destination->getReg();
445 
446  if (const TargetRegisterClass *URC =
447  UseI.getRegClassConstraint(UseIdx, TII, TRI))
448  return URC->contains(Def);
449 
450  // We don't process further if UseI is a COPY, since forward copy propagation
451  // should handle that.
452  return false;
453 }
454 
455 /// Decide whether we should forward the source of \param Copy to its use in
456 /// \param UseI based on the physical register class constraints of the opcode
457 /// and avoiding introducing more cross-class COPYs.
458 bool MachineCopyPropagation::isForwardableRegClassCopy(const MachineInstr &Copy,
459  const MachineInstr &UseI,
460  unsigned UseIdx) {
461 
462  Optional<DestSourcePair> CopyOperands = isCopyInstr(Copy, *TII, UseCopyInstr);
463  Register CopySrcReg = CopyOperands->Source->getReg();
464 
465  // If the new register meets the opcode register constraints, then allow
466  // forwarding.
467  if (const TargetRegisterClass *URC =
468  UseI.getRegClassConstraint(UseIdx, TII, TRI))
469  return URC->contains(CopySrcReg);
470 
471  auto UseICopyOperands = isCopyInstr(UseI, *TII, UseCopyInstr);
472  if (!UseICopyOperands)
473  return false;
474 
475  /// COPYs don't have register class constraints, so if the user instruction
476  /// is a COPY, we just try to avoid introducing additional cross-class
477  /// COPYs. For example:
478  ///
479  /// RegClassA = COPY RegClassB // Copy parameter
480  /// ...
481  /// RegClassB = COPY RegClassA // UseI parameter
482  ///
483  /// which after forwarding becomes
484  ///
485  /// RegClassA = COPY RegClassB
486  /// ...
487  /// RegClassB = COPY RegClassB
488  ///
489  /// so we have reduced the number of cross-class COPYs and potentially
490  /// introduced a nop COPY that can be removed.
491 
492  // Allow forwarding if src and dst belong to any common class, so long as they
493  // don't belong to any (possibly smaller) common class that requires copies to
494  // go via a different class.
495  Register UseDstReg = UseICopyOperands->Destination->getReg();
496  bool Found = false;
497  bool IsCrossClass = false;
498  for (const TargetRegisterClass *RC : TRI->regclasses()) {
499  if (RC->contains(CopySrcReg) && RC->contains(UseDstReg)) {
500  Found = true;
501  if (TRI->getCrossCopyRegClass(RC) != RC) {
502  IsCrossClass = true;
503  break;
504  }
505  }
506  }
507  if (!Found)
508  return false;
509  if (!IsCrossClass)
510  return true;
511  // The forwarded copy would be cross-class. Only do this if the original copy
512  // was also cross-class.
513  Register CopyDstReg = CopyOperands->Destination->getReg();
514  for (const TargetRegisterClass *RC : TRI->regclasses()) {
515  if (RC->contains(CopySrcReg) && RC->contains(CopyDstReg) &&
516  TRI->getCrossCopyRegClass(RC) != RC)
517  return true;
518  }
519  return false;
520 }
521 
522 /// Check that \p MI does not have implicit uses that overlap with it's \p Use
523 /// operand (the register being replaced), since these can sometimes be
524 /// implicitly tied to other operands. For example, on AMDGPU:
525 ///
526 /// V_MOVRELS_B32_e32 %VGPR2, %M0<imp-use>, %EXEC<imp-use>, %VGPR2_VGPR3_VGPR4_VGPR5<imp-use>
527 ///
528 /// the %VGPR2 is implicitly tied to the larger reg operand, but we have no
529 /// way of knowing we need to update the latter when updating the former.
530 bool MachineCopyPropagation::hasImplicitOverlap(const MachineInstr &MI,
531  const MachineOperand &Use) {
532  for (const MachineOperand &MIUse : MI.uses())
533  if (&MIUse != &Use && MIUse.isReg() && MIUse.isImplicit() &&
534  MIUse.isUse() && TRI->regsOverlap(Use.getReg(), MIUse.getReg()))
535  return true;
536 
537  return false;
538 }
539 
540 /// For an MI that has multiple definitions, check whether \p MI has
541 /// a definition that overlaps with another of its definitions.
542 /// For example, on ARM: umull r9, r9, lr, r0
543 /// The umull instruction is unpredictable unless RdHi and RdLo are different.
544 bool MachineCopyPropagation::hasOverlappingMultipleDef(
545  const MachineInstr &MI, const MachineOperand &MODef, Register Def) {
546  for (const MachineOperand &MIDef : MI.defs()) {
547  if ((&MIDef != &MODef) && MIDef.isReg() &&
548  TRI->regsOverlap(Def, MIDef.getReg()))
549  return true;
550  }
551 
552  return false;
553 }
554 
555 /// Look for available copies whose destination register is used by \p MI and
556 /// replace the use in \p MI with the copy's source register.
557 void MachineCopyPropagation::forwardUses(MachineInstr &MI) {
558  if (!Tracker.hasAnyCopies())
559  return;
560 
561  // Look for non-tied explicit vreg uses that have an active COPY
562  // instruction that defines the physical register allocated to them.
563  // Replace the vreg with the source of the active COPY.
564  for (unsigned OpIdx = 0, OpEnd = MI.getNumOperands(); OpIdx < OpEnd;
565  ++OpIdx) {
566  MachineOperand &MOUse = MI.getOperand(OpIdx);
567  // Don't forward into undef use operands since doing so can cause problems
568  // with the machine verifier, since it doesn't treat undef reads as reads,
569  // so we can end up with a live range that ends on an undef read, leading to
570  // an error that the live range doesn't end on a read of the live range
571  // register.
572  if (!MOUse.isReg() || MOUse.isTied() || MOUse.isUndef() || MOUse.isDef() ||
573  MOUse.isImplicit())
574  continue;
575 
576  if (!MOUse.getReg())
577  continue;
578 
579  // Check that the register is marked 'renamable' so we know it is safe to
580  // rename it without violating any constraints that aren't expressed in the
581  // IR (e.g. ABI or opcode requirements).
582  if (!MOUse.isRenamable())
583  continue;
584 
585  MachineInstr *Copy = Tracker.findAvailCopy(MI, MOUse.getReg().asMCReg(),
586  *TRI, *TII, UseCopyInstr);
587  if (!Copy)
588  continue;
589 
590  Optional<DestSourcePair> CopyOperands =
591  isCopyInstr(*Copy, *TII, UseCopyInstr);
592  Register CopyDstReg = CopyOperands->Destination->getReg();
593  const MachineOperand &CopySrc = *CopyOperands->Source;
594  Register CopySrcReg = CopySrc.getReg();
595 
596  // FIXME: Don't handle partial uses of wider COPYs yet.
597  if (MOUse.getReg() != CopyDstReg) {
598  LLVM_DEBUG(
599  dbgs() << "MCP: FIXME! Not forwarding COPY to sub-register use:\n "
600  << MI);
601  continue;
602  }
603 
604  // Don't forward COPYs of reserved regs unless they are constant.
605  if (MRI->isReserved(CopySrcReg) && !MRI->isConstantPhysReg(CopySrcReg))
606  continue;
607 
608  if (!isForwardableRegClassCopy(*Copy, MI, OpIdx))
609  continue;
610 
611  if (hasImplicitOverlap(MI, MOUse))
612  continue;
613 
614  // Check that the instruction is not a copy that partially overwrites the
615  // original copy source that we are about to use. The tracker mechanism
616  // cannot cope with that.
617  if (isCopyInstr(MI, *TII, UseCopyInstr) &&
618  MI.modifiesRegister(CopySrcReg, TRI) &&
619  !MI.definesRegister(CopySrcReg)) {
620  LLVM_DEBUG(dbgs() << "MCP: Copy source overlap with dest in " << MI);
621  continue;
622  }
623 
624  if (!DebugCounter::shouldExecute(FwdCounter)) {
625  LLVM_DEBUG(dbgs() << "MCP: Skipping forwarding due to debug counter:\n "
626  << MI);
627  continue;
628  }
629 
630  LLVM_DEBUG(dbgs() << "MCP: Replacing " << printReg(MOUse.getReg(), TRI)
631  << "\n with " << printReg(CopySrcReg, TRI)
632  << "\n in " << MI << " from " << *Copy);
633 
634  MOUse.setReg(CopySrcReg);
635  if (!CopySrc.isRenamable())
636  MOUse.setIsRenamable(false);
637  MOUse.setIsUndef(CopySrc.isUndef());
638 
639  LLVM_DEBUG(dbgs() << "MCP: After replacement: " << MI << "\n");
640 
641  // Clear kill markers that may have been invalidated.
642  for (MachineInstr &KMI :
643  make_range(Copy->getIterator(), std::next(MI.getIterator())))
644  KMI.clearRegisterKills(CopySrcReg, TRI);
645 
646  ++NumCopyForwards;
647  Changed = true;
648  }
649 }
650 
651 void MachineCopyPropagation::ForwardCopyPropagateBlock(MachineBasicBlock &MBB) {
652  LLVM_DEBUG(dbgs() << "MCP: ForwardCopyPropagateBlock " << MBB.getName()
653  << "\n");
654 
656  // Analyze copies (which don't overlap themselves).
657  Optional<DestSourcePair> CopyOperands = isCopyInstr(MI, *TII, UseCopyInstr);
658  if (CopyOperands) {
659 
660  Register RegSrc = CopyOperands->Source->getReg();
661  Register RegDef = CopyOperands->Destination->getReg();
662 
663  if (!TRI->regsOverlap(RegDef, RegSrc)) {
664  assert(RegDef.isPhysical() && RegSrc.isPhysical() &&
665  "MachineCopyPropagation should be run after register allocation!");
666 
667  MCRegister Def = RegDef.asMCReg();
668  MCRegister Src = RegSrc.asMCReg();
669 
670  // The two copies cancel out and the source of the first copy
671  // hasn't been overridden, eliminate the second one. e.g.
672  // %ecx = COPY %eax
673  // ... nothing clobbered eax.
674  // %eax = COPY %ecx
675  // =>
676  // %ecx = COPY %eax
677  //
678  // or
679  //
680  // %ecx = COPY %eax
681  // ... nothing clobbered eax.
682  // %ecx = COPY %eax
683  // =>
684  // %ecx = COPY %eax
685  if (eraseIfRedundant(MI, Def, Src) || eraseIfRedundant(MI, Src, Def))
686  continue;
687 
688  forwardUses(MI);
689 
690  // Src may have been changed by forwardUses()
691  CopyOperands = isCopyInstr(MI, *TII, UseCopyInstr);
692  Src = CopyOperands->Source->getReg().asMCReg();
693 
694  // If Src is defined by a previous copy, the previous copy cannot be
695  // eliminated.
696  ReadRegister(Src, MI, RegularUse);
697  for (const MachineOperand &MO : MI.implicit_operands()) {
698  if (!MO.isReg() || !MO.readsReg())
699  continue;
700  MCRegister Reg = MO.getReg().asMCReg();
701  if (!Reg)
702  continue;
703  ReadRegister(Reg, MI, RegularUse);
704  }
705 
706  LLVM_DEBUG(dbgs() << "MCP: Copy is a deletion candidate: "; MI.dump());
707 
708  // Copy is now a candidate for deletion.
709  if (!MRI->isReserved(Def))
710  MaybeDeadCopies.insert(&MI);
711 
712  // If 'Def' is previously source of another copy, then this earlier copy's
713  // source is no longer available. e.g.
714  // %xmm9 = copy %xmm2
715  // ...
716  // %xmm2 = copy %xmm0
717  // ...
718  // %xmm2 = copy %xmm9
719  Tracker.clobberRegister(Def, *TRI, *TII, UseCopyInstr);
720  for (const MachineOperand &MO : MI.implicit_operands()) {
721  if (!MO.isReg() || !MO.isDef())
722  continue;
723  MCRegister Reg = MO.getReg().asMCReg();
724  if (!Reg)
725  continue;
726  Tracker.clobberRegister(Reg, *TRI, *TII, UseCopyInstr);
727  }
728 
729  Tracker.trackCopy(&MI, *TRI, *TII, UseCopyInstr);
730 
731  continue;
732  }
733  }
734 
735  // Clobber any earlyclobber regs first.
736  for (const MachineOperand &MO : MI.operands())
737  if (MO.isReg() && MO.isEarlyClobber()) {
738  MCRegister Reg = MO.getReg().asMCReg();
739  // If we have a tied earlyclobber, that means it is also read by this
740  // instruction, so we need to make sure we don't remove it as dead
741  // later.
742  if (MO.isTied())
743  ReadRegister(Reg, MI, RegularUse);
744  Tracker.clobberRegister(Reg, *TRI, *TII, UseCopyInstr);
745  }
746 
747  forwardUses(MI);
748 
749  // Not a copy.
751  const MachineOperand *RegMask = nullptr;
752  for (const MachineOperand &MO : MI.operands()) {
753  if (MO.isRegMask())
754  RegMask = &MO;
755  if (!MO.isReg())
756  continue;
757  Register Reg = MO.getReg();
758  if (!Reg)
759  continue;
760 
761  assert(!Reg.isVirtual() &&
762  "MachineCopyPropagation should be run after register allocation!");
763 
764  if (MO.isDef() && !MO.isEarlyClobber()) {
765  Defs.push_back(Reg.asMCReg());
766  continue;
767  } else if (MO.readsReg())
768  ReadRegister(Reg.asMCReg(), MI, MO.isDebug() ? DebugUse : RegularUse);
769  }
770 
771  // The instruction has a register mask operand which means that it clobbers
772  // a large set of registers. Treat clobbered registers the same way as
773  // defined registers.
774  if (RegMask) {
775  // Erase any MaybeDeadCopies whose destination register is clobbered.
777  MaybeDeadCopies.begin();
778  DI != MaybeDeadCopies.end();) {
779  MachineInstr *MaybeDead = *DI;
780  Optional<DestSourcePair> CopyOperands =
781  isCopyInstr(*MaybeDead, *TII, UseCopyInstr);
782  MCRegister Reg = CopyOperands->Destination->getReg().asMCReg();
783  assert(!MRI->isReserved(Reg));
784 
785  if (!RegMask->clobbersPhysReg(Reg)) {
786  ++DI;
787  continue;
788  }
789 
790  LLVM_DEBUG(dbgs() << "MCP: Removing copy due to regmask clobbering: ";
791  MaybeDead->dump());
792 
793  // Make sure we invalidate any entries in the copy maps before erasing
794  // the instruction.
795  Tracker.clobberRegister(Reg, *TRI, *TII, UseCopyInstr);
796 
797  // erase() will return the next valid iterator pointing to the next
798  // element after the erased one.
799  DI = MaybeDeadCopies.erase(DI);
800  MaybeDead->eraseFromParent();
801  Changed = true;
802  ++NumDeletes;
803  }
804  }
805 
806  // Any previous copy definition or reading the Defs is no longer available.
807  for (MCRegister Reg : Defs)
808  Tracker.clobberRegister(Reg, *TRI, *TII, UseCopyInstr);
809  }
810 
811  // If MBB doesn't have successors, delete the copies whose defs are not used.
812  // If MBB does have successors, then conservative assume the defs are live-out
813  // since we don't want to trust live-in lists.
814  if (MBB.succ_empty()) {
815  for (MachineInstr *MaybeDead : MaybeDeadCopies) {
816  LLVM_DEBUG(dbgs() << "MCP: Removing copy due to no live-out succ: ";
817  MaybeDead->dump());
818 
819  Optional<DestSourcePair> CopyOperands =
820  isCopyInstr(*MaybeDead, *TII, UseCopyInstr);
821  assert(CopyOperands);
822 
823  Register SrcReg = CopyOperands->Source->getReg();
824  Register DestReg = CopyOperands->Destination->getReg();
825  assert(!MRI->isReserved(DestReg));
826 
827  // Update matching debug values, if any.
828  SmallVector<MachineInstr *> MaybeDeadDbgUsers(
829  CopyDbgUsers[MaybeDead].begin(), CopyDbgUsers[MaybeDead].end());
830  MRI->updateDbgUsersToReg(DestReg.asMCReg(), SrcReg.asMCReg(),
831  MaybeDeadDbgUsers);
832 
833  MaybeDead->eraseFromParent();
834  Changed = true;
835  ++NumDeletes;
836  }
837  }
838 
839  MaybeDeadCopies.clear();
840  CopyDbgUsers.clear();
841  Tracker.clear();
842 }
843 
845  const MachineRegisterInfo &MRI,
846  const TargetInstrInfo &TII,
847  bool UseCopyInstr) {
848  Optional<DestSourcePair> CopyOperands = isCopyInstr(MI, TII, UseCopyInstr);
849  assert(CopyOperands && "MI is expected to be a COPY");
850 
851  Register Def = CopyOperands->Destination->getReg();
852  Register Src = CopyOperands->Source->getReg();
853 
854  if (!Def || !Src)
855  return false;
856 
857  if (MRI.isReserved(Def) || MRI.isReserved(Src))
858  return false;
859 
860  return CopyOperands->Source->isRenamable() && CopyOperands->Source->isKill();
861 }
862 
863 void MachineCopyPropagation::propagateDefs(MachineInstr &MI) {
864  if (!Tracker.hasAnyCopies())
865  return;
866 
867  for (unsigned OpIdx = 0, OpEnd = MI.getNumOperands(); OpIdx != OpEnd;
868  ++OpIdx) {
869  MachineOperand &MODef = MI.getOperand(OpIdx);
870 
871  if (!MODef.isReg() || MODef.isUse())
872  continue;
873 
874  // Ignore non-trivial cases.
875  if (MODef.isTied() || MODef.isUndef() || MODef.isImplicit())
876  continue;
877 
878  if (!MODef.getReg())
879  continue;
880 
881  // We only handle if the register comes from a vreg.
882  if (!MODef.isRenamable())
883  continue;
884 
885  MachineInstr *Copy = Tracker.findAvailBackwardCopy(
886  MI, MODef.getReg().asMCReg(), *TRI, *TII, UseCopyInstr);
887  if (!Copy)
888  continue;
889 
890  Optional<DestSourcePair> CopyOperands =
891  isCopyInstr(*Copy, *TII, UseCopyInstr);
892  Register Def = CopyOperands->Destination->getReg();
893  Register Src = CopyOperands->Source->getReg();
894 
895  if (MODef.getReg() != Src)
896  continue;
897 
898  if (!isBackwardPropagatableRegClassCopy(*Copy, MI, OpIdx))
899  continue;
900 
901  if (hasImplicitOverlap(MI, MODef))
902  continue;
903 
904  if (hasOverlappingMultipleDef(MI, MODef, Def))
905  continue;
906 
907  LLVM_DEBUG(dbgs() << "MCP: Replacing " << printReg(MODef.getReg(), TRI)
908  << "\n with " << printReg(Def, TRI) << "\n in "
909  << MI << " from " << *Copy);
910 
911  MODef.setReg(Def);
912  MODef.setIsRenamable(CopyOperands->Destination->isRenamable());
913 
914  LLVM_DEBUG(dbgs() << "MCP: After replacement: " << MI << "\n");
915  MaybeDeadCopies.insert(Copy);
916  Changed = true;
917  ++NumCopyBackwardPropagated;
918  }
919 }
920 
921 void MachineCopyPropagation::BackwardCopyPropagateBlock(
923  LLVM_DEBUG(dbgs() << "MCP: BackwardCopyPropagateBlock " << MBB.getName()
924  << "\n");
925 
927  // Ignore non-trivial COPYs.
928  Optional<DestSourcePair> CopyOperands = isCopyInstr(MI, *TII, UseCopyInstr);
929  if (CopyOperands && MI.getNumOperands() == 2) {
930  Register DefReg = CopyOperands->Destination->getReg();
931  Register SrcReg = CopyOperands->Source->getReg();
932 
933  if (!TRI->regsOverlap(DefReg, SrcReg)) {
934  MCRegister Def = DefReg.asMCReg();
935  MCRegister Src = SrcReg.asMCReg();
936 
937  // Unlike forward cp, we don't invoke propagateDefs here,
938  // just let forward cp do COPY-to-COPY propagation.
939  if (isBackwardPropagatableCopy(MI, *MRI, *TII, UseCopyInstr)) {
940  Tracker.invalidateRegister(Src, *TRI, *TII, UseCopyInstr);
941  Tracker.invalidateRegister(Def, *TRI, *TII, UseCopyInstr);
942  Tracker.trackCopy(&MI, *TRI, *TII, UseCopyInstr);
943  continue;
944  }
945  }
946  }
947 
948  // Invalidate any earlyclobber regs first.
949  for (const MachineOperand &MO : MI.operands())
950  if (MO.isReg() && MO.isEarlyClobber()) {
951  MCRegister Reg = MO.getReg().asMCReg();
952  if (!Reg)
953  continue;
954  Tracker.invalidateRegister(Reg, *TRI, *TII, UseCopyInstr);
955  }
956 
957  propagateDefs(MI);
958  for (const MachineOperand &MO : MI.operands()) {
959  if (!MO.isReg())
960  continue;
961 
962  if (!MO.getReg())
963  continue;
964 
965  if (MO.isDef())
966  Tracker.invalidateRegister(MO.getReg().asMCReg(), *TRI, *TII,
967  UseCopyInstr);
968 
969  if (MO.readsReg()) {
970  if (MO.isDebug()) {
971  // Check if the register in the debug instruction is utilized
972  // in a copy instruction, so we can update the debug info if the
973  // register is changed.
974  for (MCRegUnitIterator RUI(MO.getReg().asMCReg(), TRI); RUI.isValid();
975  ++RUI) {
976  if (auto *Copy = Tracker.findCopyDefViaUnit(*RUI, *TRI)) {
977  CopyDbgUsers[Copy].insert(&MI);
978  }
979  }
980  } else {
981  Tracker.invalidateRegister(MO.getReg().asMCReg(), *TRI, *TII,
982  UseCopyInstr);
983  }
984  }
985  }
986  }
987 
988  for (auto *Copy : MaybeDeadCopies) {
989 
990  Optional<DestSourcePair> CopyOperands =
991  isCopyInstr(*Copy, *TII, UseCopyInstr);
992  Register Src = CopyOperands->Source->getReg();
993  Register Def = CopyOperands->Destination->getReg();
994  SmallVector<MachineInstr *> MaybeDeadDbgUsers(CopyDbgUsers[Copy].begin(),
995  CopyDbgUsers[Copy].end());
996 
997  MRI->updateDbgUsersToReg(Src.asMCReg(), Def.asMCReg(), MaybeDeadDbgUsers);
998  Copy->eraseFromParent();
999  ++NumDeletes;
1000  }
1001 
1002  MaybeDeadCopies.clear();
1003  CopyDbgUsers.clear();
1004  Tracker.clear();
1005 }
1006 
1007 bool MachineCopyPropagation::runOnMachineFunction(MachineFunction &MF) {
1008  if (skipFunction(MF.getFunction()))
1009  return false;
1010 
1011  Changed = false;
1012 
1013  TRI = MF.getSubtarget().getRegisterInfo();
1014  TII = MF.getSubtarget().getInstrInfo();
1015  MRI = &MF.getRegInfo();
1016 
1017  for (MachineBasicBlock &MBB : MF) {
1018  BackwardCopyPropagateBlock(MBB);
1019  ForwardCopyPropagateBlock(MBB);
1020  }
1021 
1022  return Changed;
1023 }
1024 
1026 llvm::createMachineCopyPropagationPass(bool UseCopyInstr = false) {
1027  return new MachineCopyPropagation(UseCopyInstr);
1028 }
MI
IRTranslator LLVM IR MI
Definition: IRTranslator.cpp:104
MachineInstr.h
llvm
This is an optimization pass for GlobalISel generic memory operations.
Definition: AddressRanges.h:17
llvm::tgtok::Def
@ Def
Definition: TGLexer.h:50
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virtual const TargetRegisterClass * getCrossCopyRegClass(const TargetRegisterClass *RC) const
Returns a legal register class to copy a register in the specified class to or from.
Definition: TargetRegisterInfo.h:779
llvm::createMachineCopyPropagationPass
MachineFunctionPass * createMachineCopyPropagationPass(bool UseCopyInstr)
Definition: MachineCopyPropagation.cpp:1026
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iterator_range< T > make_range(T x, T y)
Convenience function for iterating over sub-ranges.
Definition: iterator_range.h:53
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Definition: MachineRegisterInfo.h:50
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virtual const TargetInstrInfo * getInstrInfo() const
Definition: TargetSubtargetInfo.h:93
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This is a 'vector' (really, a variable-sized array), optimized for the case when the array is small.
Definition: SmallVector.h:1185
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bool isTied() const
Definition: MachineOperand.h:440
llvm::X86Disassembler::Reg
Reg
All possible values of the reg field in the ModR/M byte.
Definition: X86DisassemblerDecoder.h:462
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MachineFunctionPass - This class adapts the FunctionPass interface to allow convenient creation of pa...
Definition: MachineFunctionPass.h:30
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virtual const TargetRegisterInfo * getRegisterInfo() const
getRegisterInfo - If register information is available, return it.
Definition: TargetSubtargetInfo.h:125
llvm::cl::Hidden
@ Hidden
Definition: CommandLine.h:139
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TargetRegisterInfo base class - We assume that the target defines a static array of TargetRegisterDes...
Definition: TargetRegisterInfo.h:234
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void initializeMachineCopyPropagationPass(PassRegistry &)
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auto reverse(ContainerTy &&C, std::enable_if_t< has_rbegin< ContainerTy >::value > *=nullptr)
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const_iterator end(StringRef path)
Get end iterator over path.
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Get begin iterator over path.
Definition: Path.cpp:226
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Definition: SmallSet.h:136
llvm::MachineFunctionProperties
Properties which a MachineFunction may have at a given point in time.
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Definition: APInt.h:33
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const MachineOperand * Destination
Definition: TargetInstrInfo.h:69
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char & MachineCopyPropagationID
MachineCopyPropagation - This pass performs copy propagation on machine instructions.
Definition: MachineCopyPropagation.cpp:354
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unsigned const TargetRegisterInfo * TRI
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void getAnalysisUsage(AnalysisUsage &AU) const override
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#define LLVM_DEBUG(X)
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raw_ostream & dbgs()
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static void clear(coro::Shape &Shape)
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bool isKill() const
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Return true if the specified register number is in the physical register namespace.
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bool isRenamable() const
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bool isImplicit() const
Definition: MachineOperand.h:379
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TargetInstrInfo - Interface to description of machine instruction set.
Definition: TargetInstrInfo.h:97
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iterator begin()
Get an iterator to the beginning of the SetVector.
Definition: SetVector.h:82
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static PassRegistry * getPassRegistry()
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Definition: PassRegistry.cpp:31
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Definition: COFF.h:651
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static bool isBackwardPropagatableCopy(MachineInstr &MI, const MachineRegisterInfo &MRI, const TargetInstrInfo &TII, bool UseCopyInstr)
Definition: MachineCopyPropagation.cpp:844
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bool isUse() const
Definition: MachineOperand.h:369
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bool isReserved(MCRegister PhysReg) const
isReserved - Returns true when PhysReg is a reserved register.
Definition: MachineRegisterInfo.h:925
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Definition: TargetRegisterInfo.h:45
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Represent the analysis usage information of a pass.
Definition: PassAnalysisSupport.h:47
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Definition: HexagonCopyToCombine.cpp:125
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MachineOperand class - Representation of each machine instruction operand.
Definition: MachineOperand.h:48
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MachineFunctionProperties & set(Property P)
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static bool shouldExecute(unsigned CounterName)
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SI Lower i1 Copies
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bool isSubRegisterEq(MCRegister RegA, MCRegister RegB) const
Returns true if RegB is a sub-register of RegA or if RegB == RegA.
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const NoneType None
Definition: None.h:24
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unsigned ID
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@ NoVRegs
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const TargetSubtargetInfo & getSubtarget() const
getSubtarget - Return the subtarget for which this machine code is being compiled.
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clobbersPhysReg - Returns true if this RegMask clobbers PhysReg.
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Returns true if the two registers are equal or alias each other.
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#define I(x, y, z)
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Wrapper function around std::find to detect if an element exists in a container.
Definition: STLExtras.h:1682
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Definition: MachineOperand.h:359
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Utility to check-convert this value to a MCRegister.
Definition: Register.h:120
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Definition: MachineFunction.h:257
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Definition: MachineOperand.h:520
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Definition: Pass.cpp:135
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Definition: MachineInstr.cpp:833
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Definition: AArch64AdvSIMDScalarPass.cpp:105
llvm::Register
Wrapper class representing virtual and physical registers.
Definition: Register.h:19
llvm::MachineRegisterInfo::isConstantPhysReg
bool isConstantPhysReg(MCRegister PhysReg) const
Returns true if PhysReg is unallocatable and constant throughout the function.
Definition: MachineRegisterInfo.cpp:509
MBB
MachineBasicBlock & MBB
Definition: AArch64SLSHardening.cpp:74
llvm::MachineFunction::getFunction
Function & getFunction()
Return the LLVM function that this machine code represents.
Definition: MachineFunction.h:622
llvm::DestSourcePair
Definition: TargetInstrInfo.h:68
INITIALIZE_PASS
INITIALIZE_PASS(MachineCopyPropagation, DEBUG_TYPE, "Machine Copy Propagation Pass", false, false) void MachineCopyPropagation
Definition: MachineCopyPropagation.cpp:356
DebugCounter.h
llvm::MCRegisterInfo::isSubRegister
bool isSubRegister(MCRegister RegA, MCRegister RegB) const
Returns true if RegB is a sub-register of RegA.
Definition: MCRegisterInfo.h:560
llvm::MCRegUnitIterator
Definition: MCRegisterInfo.h:680
llvm::DestSourcePair::Source
const MachineOperand * Source
Definition: TargetInstrInfo.h:70
SmallVector.h
llvm::MCRegisterInfo::DiffListIterator::isValid
bool isValid() const
isValid - returns true if this iterator is not yet at the end.
Definition: MCRegisterInfo.h:224
llvm::MachineOperand::setReg
void setReg(Register Reg)
Change the register this operand corresponds to.
Definition: MachineOperand.cpp:53
MCPUseCopyInstr
static cl::opt< bool > MCPUseCopyInstr("mcp-use-is-copy-instr", cl::init(false), cl::Hidden)
MachineOperand.h
llvm::SmallSetVector
A SetVector that performs no allocations if smaller than a certain size.
Definition: SetVector.h:307
DEBUG_COUNTER
DEBUG_COUNTER(FwdCounter, "machine-cp-fwd", "Controls which register COPYs are forwarded")
raw_ostream.h
MachineFunction.h
llvm::printReg
Printable printReg(Register Reg, const TargetRegisterInfo *TRI=nullptr, unsigned SubIdx=0, const MachineRegisterInfo *MRI=nullptr)
Prints virtual and physical registers with or without a TRI instance.
Definition: TargetRegisterInfo.cpp:111
llvm::MachineInstr::eraseFromParent
void eraseFromParent()
Unlink 'this' from the containing basic block and delete it.
Definition: MachineInstr.cpp:650
DEBUG_TYPE
#define DEBUG_TYPE
Definition: MachineCopyPropagation.cpp:78
InitializePasses.h
TargetRegisterInfo.h
llvm::MachineBasicBlock::getName
StringRef getName() const
Return the name of the corresponding LLVM basic block, or an empty string.
Definition: MachineBasicBlock.cpp:310
Debug.h
SetVector.h
isNopCopy
static bool isNopCopy(const MachineInstr &PreviousCopy, MCRegister Src, MCRegister Def, const TargetRegisterInfo *TRI, const TargetInstrInfo *TII, bool UseCopyInstr)
Return true if PreviousCopy did copy register Src to register Def.
Definition: MachineCopyPropagation.cpp:382
llvm::Use
A Use represents the edge between a Value definition and its users.
Definition: Use.h:43
llvm::MCRegister
Wrapper class representing physical registers. Should be passed by value.
Definition: MCRegister.h:24
SmallSet.h
llvm::Intrinsic::ID
unsigned ID
Definition: TargetTransformInfo.h:38