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GCNSchedStrategy.h
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1 //===-- GCNSchedStrategy.h - GCN Scheduler Strategy -*- C++ -*-------------===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 /// \file
10 //
11 //===----------------------------------------------------------------------===//
12 
13 #ifndef LLVM_LIB_TARGET_AMDGPU_GCNSCHEDSTRATEGY_H
14 #define LLVM_LIB_TARGET_AMDGPU_GCNSCHEDSTRATEGY_H
15 
16 #include "GCNRegPressure.h"
18 
19 namespace llvm {
20 
21 class SIMachineFunctionInfo;
22 class SIRegisterInfo;
23 class GCNSubtarget;
24 
25 /// This is a minimal scheduler strategy. The main difference between this
26 /// and the GenericScheduler is that GCNSchedStrategy uses different
27 /// heuristics to determine excess/critical pressure sets. Its goal is to
28 /// maximize kernel occupancy (i.e. maximum number of waves per simd).
30  friend class GCNScheduleDAGMILive;
31 
32  SUnit *pickNodeBidirectional(bool &IsTopNode);
33 
34  void pickNodeFromQueue(SchedBoundary &Zone, const CandPolicy &ZonePolicy,
35  const RegPressureTracker &RPTracker,
36  SchedCandidate &Cand);
37 
38  void initCandidate(SchedCandidate &Cand, SUnit *SU,
39  bool AtTop, const RegPressureTracker &RPTracker,
40  const SIRegisterInfo *SRI,
41  unsigned SGPRPressure, unsigned VGPRPressure);
42 
43  std::vector<unsigned> Pressure;
44  std::vector<unsigned> MaxPressure;
45 
46  unsigned SGPRExcessLimit;
47  unsigned VGPRExcessLimit;
48  unsigned SGPRCriticalLimit;
49  unsigned VGPRCriticalLimit;
50 
51  unsigned TargetOccupancy;
52 
53  // schedule() have seen a clustered memory operation. Set it to false
54  // before a region scheduling to know if the region had such clusters.
55  bool HasClusteredNodes;
56 
57  // schedule() have seen an excess register pressure and had to track
58  // register pressure for actual scheduling heuristics.
59  bool HasExcessPressure;
60 
61  MachineFunction *MF;
62 
63 public:
65 
66  SUnit *pickNode(bool &IsTopNode) override;
67 
68  void initialize(ScheduleDAGMI *DAG) override;
69 
70  void setTargetOccupancy(unsigned Occ) { TargetOccupancy = Occ; }
71 };
72 
74 
75  enum : unsigned {
76  Collect,
77  InitialSchedule,
78  UnclusteredReschedule,
79  ClusteredLowOccupancyReschedule,
80  LastStage = ClusteredLowOccupancyReschedule
81  };
82 
83  const GCNSubtarget &ST;
84 
86 
87  // Occupancy target at the beginning of function scheduling cycle.
88  unsigned StartingOccupancy;
89 
90  // Minimal real occupancy recorder for the function.
91  unsigned MinOccupancy;
92 
93  // Scheduling stage number.
94  unsigned Stage;
95 
96  // Current region index.
97  size_t RegionIdx;
98 
99  // Vector of regions recorder for later rescheduling
101  MachineBasicBlock::iterator>, 32> Regions;
102 
103  // Records if a region is not yet scheduled, or schedule has been reverted,
104  // or we generally desire to reschedule it.
105  BitVector RescheduleRegions;
106 
107  // Record regions which use clustered loads/stores.
108  BitVector RegionsWithClusters;
109 
110  // Record regions with high register pressure.
111  BitVector RegionsWithHighRP;
112 
113  // Region live-in cache.
115 
116  // Region pressure cache.
118 
119  // Temporary basic block live-in cache.
121 
124 
125  // Return current region pressure.
126  GCNRegPressure getRealRegPressure() const;
127 
128  // Compute and cache live-ins and pressure for all regions in block.
129  void computeBlockPressure(const MachineBasicBlock *MBB);
130 
131 
132 public:
134  std::unique_ptr<MachineSchedStrategy> S);
135 
136  void schedule() override;
137 
138  void finalizeSchedule() override;
139 };
140 
141 } // End namespace llvm
142 
143 #endif // GCNSCHEDSTRATEGY_H
llvm
This file implements support for optimizing divisions by a constant.
Definition: AllocatorList.h:23
llvm::GCNRegPressure
Definition: GCNRegPressure.h:30
llvm::SmallVector
This is a 'vector' (really, a variable-sized array), optimized for the case when the array is small.
Definition: SmallVector.h:1168
llvm::RegPressureTracker
Track the current register pressure at some position in the instruction stream, and remember the high...
Definition: RegisterPressure.h:358
llvm::GCNScheduleDAGMILive
Definition: GCNSchedStrategy.h:73
llvm::GCNSubtarget
Definition: GCNSubtarget.h:31
llvm::GCNScheduleDAGMILive::finalizeSchedule
void finalizeSchedule() override
Allow targets to perform final scheduling actions at the level of the whole MachineFunction.
Definition: GCNSchedStrategy.cpp:542
llvm::GCNMaxOccupancySchedStrategy
This is a minimal scheduler strategy.
Definition: GCNSchedStrategy.h:29
C
(vector float) vec_cmpeq(*A, *B) C
Definition: README_ALTIVEC.txt:86
llvm::GenericSchedulerBase::CandPolicy
Policy for scheduling the next instruction in the candidate's zone.
Definition: MachineScheduler.h:822
llvm::SIRegisterInfo
Definition: SIRegisterInfo.h:30
llvm::BitVector
Definition: BitVector.h:74
llvm::GCNMaxOccupancySchedStrategy::setTargetOccupancy
void setTargetOccupancy(unsigned Occ)
Definition: GCNSchedStrategy.h:70
llvm::MachineBasicBlock
Definition: MachineBasicBlock.h:95
llvm::GenericSchedulerBase::SchedCandidate
Store the state used by GenericScheduler heuristics, required for the lifetime of one invocation of p...
Definition: MachineScheduler.h:860
llvm::DenseMap
Definition: DenseMap.h:714
llvm::MachineSchedContext
MachineSchedContext provides enough context from the MachineScheduler pass for the target to instanti...
Definition: MachineScheduler.h:120
llvm::ScheduleDAGMI
ScheduleDAGMI is an implementation of ScheduleDAGInstrs that simply schedules machine instructions ac...
Definition: MachineScheduler.h:266
llvm::MachineFunction
Definition: MachineFunction.h:234
llvm::MachineBasicBlock::iterator
MachineInstrBundleIterator< MachineInstr > iterator
Definition: MachineBasicBlock.h:233
llvm::GenericScheduler::DAG
ScheduleDAGMILive * DAG
Definition: MachineScheduler.h:996
llvm::GCNScheduleDAGMILive::schedule
void schedule() override
Implement ScheduleDAGInstrs interface for scheduling a sequence of reorderable instructions.
Definition: GCNSchedStrategy.cpp:311
llvm::GCNMaxOccupancySchedStrategy::pickNode
SUnit * pickNode(bool &IsTopNode) override
Pick the best node to balance the schedule. Implements MachineSchedStrategy.
Definition: GCNSchedStrategy.cpp:248
S
add sub stmia L5 ldr r0 bl L_printf $stub Instead of a and a wouldn t it be better to do three moves *Return an aggregate type is even return S
Definition: README.txt:210
llvm::GCNMaxOccupancySchedStrategy::GCNMaxOccupancySchedStrategy
GCNMaxOccupancySchedStrategy(const MachineSchedContext *C)
Definition: GCNSchedStrategy.cpp:21
llvm::GCNMaxOccupancySchedStrategy::initialize
void initialize(ScheduleDAGMI *DAG) override
Initialize the strategy after building the DAG for a new region.
Definition: GCNSchedStrategy.cpp:26
MBB
MachineBasicBlock & MBB
Definition: AArch64SLSHardening.cpp:74
GCNRegPressure.h
llvm::SchedBoundary
Each Scheduling boundary is associated with ready queues.
Definition: MachineScheduler.h:608
MachineScheduler.h
llvm::SIMachineFunctionInfo
This class keeps track of the SPI_SP_INPUT_ADDR config register, which tells the hardware which inter...
Definition: SIMachineFunctionInfo.h:335
llvm::SUnit
Scheduling unit. This is a node in the scheduling DAG.
Definition: ScheduleDAG.h:242
llvm::ScheduleDAGMILive
ScheduleDAGMILive is an implementation of ScheduleDAGInstrs that schedules machine instructions while...
Definition: MachineScheduler.h:385
llvm::GenericScheduler
GenericScheduler shrinks the unscheduled zone using heuristics to balance the schedule.
Definition: MachineScheduler.h:951
llvm::MachineInstrBundleIterator< MachineInstr >
llvm::GCNScheduleDAGMILive::GCNScheduleDAGMILive
GCNScheduleDAGMILive(MachineSchedContext *C, std::unique_ptr< MachineSchedStrategy > S)
Definition: GCNSchedStrategy.cpp:300