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17 #ifndef LLVM_LIB_TARGET_AMDGPU_GCNREGPRESSURE_H
18 #define LLVM_LIB_TARGET_AMDGPU_GCNREGPRESSURE_H
26 class MachineRegisterInfo;
51 if (UnifiedVGPRFile) {
198 const LiveIntervals &LIS,
199 const MachineRegisterInfo &
MRI);
202 const LiveIntervals &LIS,
203 const MachineRegisterInfo &
MRI);
210 template <
typename Range>
211 DenseMap<MachineInstr*, GCNRPTracker::LiveRegSet>
213 std::vector<SlotIndex> Indexes;
214 Indexes.reserve(std::distance(R.begin(), R.end()));
217 auto SI = SII.getInstructionIndex(*
I);
218 Indexes.push_back(After ?
SI.getDeadSlot() :
SI.getBaseIndex());
231 if (!LI.findIndexesLiveAt(Indexes, std::back_inserter(LiveIdxs)))
233 if (!LI.hasSubRanges()) {
234 for (
auto SI : LiveIdxs)
235 LiveRegMap[SII.getInstructionFromIndex(
SI)][
Reg] =
238 for (
const auto &
S : LI.subranges()) {
241 S.findIndexesLiveAt(LiveIdxs, std::back_inserter(SRLiveIdxs));
242 for (
auto SI : SRLiveIdxs)
243 LiveRegMap[SII.getInstructionFromIndex(
SI)][
Reg] |=
S.LaneMask;
252 MI.getParent()->getParent()->getRegInfo());
258 MI.getParent()->getParent()->getRegInfo());
261 template <
typename Range>
265 for (
const auto &
RM : LiveRegs)
274 const LiveIntervals &LIS,
275 const MachineRegisterInfo &
MRI);
279 #endif // LLVM_LIB_TARGET_AMDGPU_GCNREGPRESSURE_H
uint64_t alignTo(uint64_t Size, Align A)
Returns a multiple of A needed to store Size bytes.
unsigned getSGPRTuplesWeight() const
void reset(const MachineInstr &MI, const LiveRegSet *LiveRegs=nullptr)
This is an optimization pass for GlobalISel generic memory operations.
GCNRPTracker::LiveRegSet getLiveRegsBefore(const MachineInstr &MI, const LiveIntervals &LIS)
SlotIndexes * getSlotIndexes() const
const decltype(LiveRegs) & getLiveRegs() const
friend GCNRegPressure max(const GCNRegPressure &P1, const GCNRegPressure &P2)
MachineRegisterInfo - Keep track of information for virtual and physical registers,...
GCNRegPressure getRegPressure(const MachineRegisterInfo &MRI, Range &&LiveRegs)
DenseMap< MachineInstr *, GCNRPTracker::LiveRegSet > getLiveRegMap(Range &&R, bool After, LiveIntervals &LIS)
creates a map MachineInstr -> LiveRegSet R - range of iterators on instructions After - upon entry or...
LaneBitmask getLiveLaneMask(unsigned Reg, SlotIndex SI, const LiveIntervals &LIS, const MachineRegisterInfo &MRI)
bool operator!=(const GCNRegPressure &O) const
This is a 'vector' (really, a variable-sized array), optimized for the case when the array is small.
Reg
All possible values of the reg field in the ModR/M byte.
GCNRPTracker(const LiveIntervals &LIS_)
GCNRegPressure max(const GCNRegPressure &P1, const GCNRegPressure &P2)
unsigned getNumVirtRegs() const
getNumVirtRegs - Return the number of virtual registers created.
static Register index2VirtReg(unsigned Index)
Convert a 0-based index to a virtual register number.
bool less(const GCNSubtarget &ST, const GCNRegPressure &O, unsigned MaxOccupancy=std::numeric_limits< unsigned >::max()) const
GCNRPTracker::LiveRegSet getLiveRegsAfter(const MachineInstr &MI, const LiveIntervals &LIS)
unsigned getVGPRTuplesWeight() const
bool isEqual(const GCNRPTracker::LiveRegSet &S1, const GCNRPTracker::LiveRegSet &S2)
SlotIndex getInstructionIndex(const MachineInstr &Instr) const
Returns the base index of the given instruction.
raw_ostream & dbgs()
dbgs() - This returns a reference to a raw_ostream for debugging messages.
void recede(const MachineInstr &MI)
decltype(MaxPressure) moveMaxPressure()
void inc(unsigned Reg, LaneBitmask PrevMask, LaneBitmask NewMask, const MachineRegisterInfo &MRI)
const MachineInstr * getLastTrackedMI() const
unsigned getSGPRNum() const
This might compile to this xmm1 xorps xmm0 movss xmm0 ret Now consider if the code caused xmm1 to get spilled This might produce this xmm1 movaps xmm0 movaps xmm1 movss xmm0 ret since the reload is only used by these we could fold it into the producing something like xmm1 movaps xmm0 ret saving two instructions The basic idea is that a reload from a spill if only one byte chunk is bring in zeros the one element instead of elements This can be used to simplify a variety of shuffle where the elements are fixed zeros This code generates ugly probably due to costs being off or< 4 x float > * P2
static GCRegistry::Add< CoreCLRGC > E("coreclr", "CoreCLR-compatible GC")
GCNRegPressure MaxPressure
unsigned getOccupancy(const GCNSubtarget &ST) const
static constexpr LaneBitmask getNone()
This class implements an extremely fast bulk output stream that can only output to a stream.
SlotIndex getDeadSlot() const
Returns the dead def kill slot for the current instruction.
const MachineRegisterInfo * MRI
GCNDownwardRPTracker(const LiveIntervals &LIS_)
SlotIndex getBaseIndex() const
Returns the base index for associated with this index.
GCNUpwardRPTracker(const LiveIntervals &LIS_)
Representation of each machine instruction.
Module * getParent()
Get the module that this global value is contained inside of...
compiles ldr LCPI1_0 ldr ldr mov lsr tst moveq r1 ldr LCPI1_1 and r0 bx lr It would be better to do something like to fold the shift into the conditional move
bool reset(const MachineInstr &MI, const LiveRegSet *LiveRegs=nullptr)
StandardInstrumentations SI(Debug, VerifyEach)
LiveInterval & getInterval(Register Reg)
Expected< ExpressionValue > min(const ExpressionValue &Lhs, const ExpressionValue &Rhs)
static const Function * getParent(const Value *V)
add sub stmia L5 ldr r0 bl L_printf $stub Instead of a and a wouldn t it be better to do three moves *Return an aggregate type is even return S
decltype(LiveRegs) moveLiveRegs()
A set of live virtual registers and physical register units.
unsigned const MachineRegisterInfo * MRI
Wrapper class representing virtual and physical registers.
MachineBasicBlock::const_iterator getNext() const
DenseMap< unsigned, LaneBitmask > LiveRegSet
LaneBitmask getMaxLaneMaskForVReg(Register Reg) const
Returns a mask covering all bits that can appear in lane masks of subregisters of the virtual registe...
unsigned getVGPRNum(bool UnifiedVGPRFile) const
bool higherOccupancy(const GCNSubtarget &ST, const GCNRegPressure &O) const
void sort(IteratorTy Start, IteratorTy End)
const LiveIntervals & LIS
bool operator==(const GCNRegPressure &O) const
void reset(const MachineInstr &MI, const LiveRegSet *LiveRegsCopy, bool After)
GCNRegPressure CurPressure
static void printLiveRegs(raw_ostream &OS, const LiveRegSet &LiveRegs, const MachineRegisterInfo &MRI)
void printLivesAt(SlotIndex SI, const LiveIntervals &LIS, const MachineRegisterInfo &MRI)
Align max(MaybeAlign Lhs, Align Rhs)
GCNRPTracker::LiveRegSet getLiveRegs(SlotIndex SI, const LiveIntervals &LIS, const MachineRegisterInfo &MRI)
bool hasInterval(Register Reg) const
const MachineInstr * LastTrackedMI
void print(raw_ostream &OS, const GCNSubtarget *ST=nullptr) const
LLVM Value Representation.
unsigned getAGPRNum() const