LLVM 17.0.0git
Classes | Public Member Functions | Friends | List of all members
llvm::SIMachineFunctionInfo Class Referencefinal

This class keeps track of the SPI_SP_INPUT_ADDR config register, which tells the hardware which interpolation parameters to load. More...

#include "Target/AMDGPU/SIMachineFunctionInfo.h"

Inheritance diagram for llvm::SIMachineFunctionInfo:
Inheritance graph
[legend]
Collaboration diagram for llvm::SIMachineFunctionInfo:
Collaboration graph
[legend]

Classes

struct  VGPRSpillToAGPR
 

Public Member Functions

Register getVGPRForAGPRCopy () const
 
void setVGPRForAGPRCopy (Register NewVGPRForAGPRCopy)
 
bool isCalleeSavedReg (const MCPhysReg *CSRegs, MCPhysReg Reg) const
 
 SIMachineFunctionInfo (const SIMachineFunctionInfo &MFI)=default
 
 SIMachineFunctionInfo (const Function &F, const GCNSubtarget *STI)
 
MachineFunctionInfoclone (BumpPtrAllocator &Allocator, MachineFunction &DestMF, const DenseMap< MachineBasicBlock *, MachineBasicBlock * > &Src2DstMBB) const override
 Make a functionally equivalent copy of this MachineFunctionInfo in MF.
 
bool initializeBaseYamlFields (const yaml::SIMachineFunctionInfo &YamlMFI, const MachineFunction &MF, PerFunctionMIParsingState &PFS, SMDiagnostic &Error, SMRange &SourceRange)
 
void reserveWWMRegister (Register Reg)
 
AMDGPU::SIModeRegisterDefaults getMode () const
 
ArrayRef< SIRegisterInfo::SpilledReggetSGPRSpillToVGPRLanes (int FrameIndex) const
 
ArrayRef< RegistergetSGPRSpillVGPRs () const
 
const WWMSpillsMapgetWWMSpills () const
 
const ReservedRegSetgetWWMReservedRegs () const
 
const PrologEpilogSGPRSpillsMapgetPrologEpilogSGPRSpills () const
 
void addToPrologEpilogSGPRSpills (Register Reg, PrologEpilogSGPRSaveRestoreInfo SI)
 
bool hasPrologEpilogSGPRSpillEntry (Register Reg) const
 
Register getScratchSGPRCopyDstReg (Register Reg) const
 
void getAllScratchSGPRCopyDstRegs (SmallVectorImpl< Register > &Regs) const
 
bool checkIndexInPrologEpilogSGPRSpills (int FI) const
 
const PrologEpilogSGPRSaveRestoreInfogetPrologEpilogSGPRSaveRestoreInfo (Register Reg) const
 
ArrayRef< SIRegisterInfo::SpilledReggetPrologEpilogSGPRSpillToVGPRLanes (int FrameIndex) const
 
void allocateWWMSpill (MachineFunction &MF, Register VGPR, uint64_t Size=4, Align Alignment=Align(4))
 
void splitWWMSpillRegisters (MachineFunction &MF, SmallVectorImpl< std::pair< Register, int > > &CalleeSavedRegs, SmallVectorImpl< std::pair< Register, int > > &ScratchRegs) const
 
ArrayRef< MCPhysReggetAGPRSpillVGPRs () const
 
ArrayRef< MCPhysReggetVGPRSpillAGPRs () const
 
MCPhysReg getVGPRToAGPRSpill (int FrameIndex, unsigned Lane) const
 
void setVGPRToAGPRSpillDead (int FrameIndex)
 
bool allocateSGPRSpillToVGPRLane (MachineFunction &MF, int FI, bool IsPrologEpilog=false)
 
bool allocateVGPRSpillToAGPR (MachineFunction &MF, int FI, bool isAGPRtoVGPR)
 Reserve AGPRs or VGPRs to support spilling for FrameIndex FI.
 
bool removeDeadFrameIndices (MachineFrameInfo &MFI, bool ResetSGPRSpillStackIDs)
 If ResetSGPRSpillStackIDs is true, reset the stack ID from sgpr-spill to the default stack.
 
int getScavengeFI (MachineFrameInfo &MFI, const SIRegisterInfo &TRI)
 
std::optional< int > getOptionalScavengeFI () const
 
unsigned getBytesInStackArgArea () const
 
void setBytesInStackArgArea (unsigned Bytes)
 
Register addPrivateSegmentBuffer (const SIRegisterInfo &TRI)
 
Register addDispatchPtr (const SIRegisterInfo &TRI)
 
Register addQueuePtr (const SIRegisterInfo &TRI)
 
Register addKernargSegmentPtr (const SIRegisterInfo &TRI)
 
Register addDispatchID (const SIRegisterInfo &TRI)
 
Register addFlatScratchInit (const SIRegisterInfo &TRI)
 
Register addImplicitBufferPtr (const SIRegisterInfo &TRI)
 
Register addLDSKernelId ()
 
Register addReservedUserSGPR ()
 Increment user SGPRs used for padding the argument list only.
 
Register addWorkGroupIDX ()
 
Register addWorkGroupIDY ()
 
Register addWorkGroupIDZ ()
 
Register addWorkGroupInfo ()
 
void setWorkItemIDX (ArgDescriptor Arg)
 
void setWorkItemIDY (ArgDescriptor Arg)
 
void setWorkItemIDZ (ArgDescriptor Arg)
 
Register addPrivateSegmentWaveByteOffset ()
 
void setPrivateSegmentWaveByteOffset (Register Reg)
 
bool hasPrivateSegmentBuffer () const
 
bool hasDispatchPtr () const
 
bool hasQueuePtr () const
 
bool hasKernargSegmentPtr () const
 
bool hasDispatchID () const
 
bool hasFlatScratchInit () const
 
bool hasWorkGroupIDX () const
 
bool hasWorkGroupIDY () const
 
bool hasWorkGroupIDZ () const
 
bool hasWorkGroupInfo () const
 
bool hasLDSKernelId () const
 
bool hasPrivateSegmentWaveByteOffset () const
 
bool hasWorkItemIDX () const
 
bool hasWorkItemIDY () const
 
bool hasWorkItemIDZ () const
 
bool hasImplicitArgPtr () const
 
bool hasImplicitBufferPtr () const
 
AMDGPUFunctionArgInfogetArgInfo ()
 
const AMDGPUFunctionArgInfogetArgInfo () const
 
std::tuple< const ArgDescriptor *, const TargetRegisterClass *, LLTgetPreloadedValue (AMDGPUFunctionArgInfo::PreloadedValue Value) const
 
MCRegister getPreloadedReg (AMDGPUFunctionArgInfo::PreloadedValue Value) const
 
unsigned getGITPtrHigh () const
 
Register getGITPtrLoReg (const MachineFunction &MF) const
 
uint32_t get32BitAddressHighBits () const
 
unsigned getNumUserSGPRs () const
 
unsigned getNumPreloadedSGPRs () const
 
Register getPrivateSegmentWaveByteOffsetSystemSGPR () const
 
Register getScratchRSrcReg () const
 Returns the physical register reserved for use as the resource descriptor for scratch accesses.
 
void setScratchRSrcReg (Register Reg)
 
Register getFrameOffsetReg () const
 
void setFrameOffsetReg (Register Reg)
 
void setStackPtrOffsetReg (Register Reg)
 
Register getStackPtrOffsetReg () const
 
Register getQueuePtrUserSGPR () const
 
Register getImplicitBufferPtrUserSGPR () const
 
bool hasSpilledSGPRs () const
 
void setHasSpilledSGPRs (bool Spill=true)
 
bool hasSpilledVGPRs () const
 
void setHasSpilledVGPRs (bool Spill=true)
 
bool hasNonSpillStackObjects () const
 
void setHasNonSpillStackObjects (bool StackObject=true)
 
bool isStackRealigned () const
 
void setIsStackRealigned (bool Realigned=true)
 
unsigned getNumSpilledSGPRs () const
 
unsigned getNumSpilledVGPRs () const
 
void addToSpilledSGPRs (unsigned num)
 
void addToSpilledVGPRs (unsigned num)
 
unsigned getPSInputAddr () const
 
unsigned getPSInputEnable () const
 
bool isPSInputAllocated (unsigned Index) const
 
void markPSInputAllocated (unsigned Index)
 
void markPSInputEnabled (unsigned Index)
 
bool returnsVoid () const
 
void setIfReturnsVoid (bool Value)
 
std::pair< unsigned, unsignedgetFlatWorkGroupSizes () const
 
unsigned getMinFlatWorkGroupSize () const
 
unsigned getMaxFlatWorkGroupSize () const
 
std::pair< unsigned, unsignedgetWavesPerEU () const
 
unsigned getMinWavesPerEU () const
 
unsigned getMaxWavesPerEU () const
 
Register getWorkGroupIDSGPR (unsigned Dim) const
 
const AMDGPUGWSResourcePseudoSourceValuegetGWSPSV (const AMDGPUTargetMachine &TM)
 
unsigned getOccupancy () const
 
unsigned getMinAllowedOccupancy () const
 
void limitOccupancy (const MachineFunction &MF)
 
void limitOccupancy (unsigned Limit)
 
void increaseOccupancy (const MachineFunction &MF, unsigned Limit)
 
bool mayNeedAGPRs () const
 
bool mayUseAGPRs (const Function &F) const
 
bool usesAGPRs (const MachineFunction &MF) const
 
- Public Member Functions inherited from llvm::AMDGPUMachineFunction
 AMDGPUMachineFunction (const Function &F, const AMDGPUSubtarget &ST)
 
uint64_t getExplicitKernArgSize () const
 
Align getMaxKernArgAlign () const
 
uint32_t getLDSSize () const
 
uint32_t getGDSSize () const
 
bool isEntryFunction () const
 
bool isModuleEntryFunction () const
 
bool hasNoSignedZerosFPMath () const
 
bool isMemoryBound () const
 
bool needsWaveLimiter () const
 
unsigned allocateLDSGlobal (const DataLayout &DL, const GlobalVariable &GV)
 
unsigned allocateLDSGlobal (const DataLayout &DL, const GlobalVariable &GV, Align Trailing)
 
void allocateKnownAddressLDSGlobal (const Function &F)
 
Align getDynLDSAlign () const
 
void setDynLDSAlign (const DataLayout &DL, const GlobalVariable &GV)
 
- Public Member Functions inherited from llvm::MachineFunctionInfo
virtual ~MachineFunctionInfo ()
 
virtual MachineFunctionInfoclone (BumpPtrAllocator &Allocator, MachineFunction &DestMF, const DenseMap< MachineBasicBlock *, MachineBasicBlock * > &Src2DstMBB) const
 Make a functionally equivalent copy of this MachineFunctionInfo in MF.
 

Friends

class GCNTargetMachine
 

Additional Inherited Members

- Static Public Member Functions inherited from llvm::AMDGPUMachineFunction
static const FunctiongetKernelLDSFunctionFromGlobal (const GlobalVariable &GV)
 
static const GlobalVariablegetKernelLDSGlobalFromFunction (const Function &F)
 
static bool isKnownAddressLDSGlobal (const GlobalVariable &GV)
 
static unsigned calculateKnownAddressOfLDSGlobal (const GlobalVariable &GV)
 
static std::optional< uint32_tgetLDSKernelIdMetadata (const Function &F)
 
- Static Public Member Functions inherited from llvm::MachineFunctionInfo
template<typename FuncInfoTy , typename SubtargetTy = TargetSubtargetInfo>
static FuncInfoTy * create (BumpPtrAllocator &Allocator, const Function &F, const SubtargetTy *STI)
 Factory function: default behavior is to call new using the supplied allocator.
 
template<typename Ty >
static Ty * create (BumpPtrAllocator &Allocator, const Ty &MFI)
 
- Protected Attributes inherited from llvm::AMDGPUMachineFunction
uint64_t ExplicitKernArgSize = 0
 
Align MaxKernArgAlign
 
uint32_t LDSSize = 0
 Number of bytes in the LDS that are being used.
 
uint32_t GDSSize = 0
 
uint32_t StaticLDSSize = 0
 Number of bytes in the LDS allocated statically.
 
uint32_t StaticGDSSize = 0
 
Align DynLDSAlign
 Align for dynamic shared memory if any.
 
bool IsEntryFunction = false
 
bool IsModuleEntryFunction = false
 
bool NoSignedZerosFPMath = false
 
bool MemoryBound = false
 
bool WaveLimiter = false
 

Detailed Description

This class keeps track of the SPI_SP_INPUT_ADDR config register, which tells the hardware which interpolation parameters to load.

Definition at line 358 of file SIMachineFunctionInfo.h.

Constructor & Destructor Documentation

◆ SIMachineFunctionInfo() [1/2]

llvm::SIMachineFunctionInfo::SIMachineFunctionInfo ( const SIMachineFunctionInfo MFI)
default

◆ SIMachineFunctionInfo() [2/2]

SIMachineFunctionInfo::SIMachineFunctionInfo ( const Function F,
const GCNSubtarget STI 
)

Member Function Documentation

◆ addDispatchID()

Register SIMachineFunctionInfo::addDispatchID ( const SIRegisterInfo TRI)

Definition at line 251 of file SIMachineFunctionInfo.cpp.

References llvm::ArgDescriptor::createRegister(), and TRI.

◆ addDispatchPtr()

Register SIMachineFunctionInfo::addDispatchPtr ( const SIRegisterInfo TRI)

Definition at line 229 of file SIMachineFunctionInfo.cpp.

References llvm::ArgDescriptor::createRegister(), and TRI.

◆ addFlatScratchInit()

Register SIMachineFunctionInfo::addFlatScratchInit ( const SIRegisterInfo TRI)

Definition at line 258 of file SIMachineFunctionInfo.cpp.

References llvm::ArgDescriptor::createRegister(), and TRI.

◆ addImplicitBufferPtr()

Register SIMachineFunctionInfo::addImplicitBufferPtr ( const SIRegisterInfo TRI)

Definition at line 265 of file SIMachineFunctionInfo.cpp.

References llvm::ArgDescriptor::createRegister(), and TRI.

◆ addKernargSegmentPtr()

Register SIMachineFunctionInfo::addKernargSegmentPtr ( const SIRegisterInfo TRI)

Definition at line 243 of file SIMachineFunctionInfo.cpp.

References llvm::ArgDescriptor::createRegister(), and TRI.

◆ addLDSKernelId()

Register SIMachineFunctionInfo::addLDSKernelId ( )

Definition at line 272 of file SIMachineFunctionInfo.cpp.

References llvm::ArgDescriptor::createRegister().

◆ addPrivateSegmentBuffer()

Register SIMachineFunctionInfo::addPrivateSegmentBuffer ( const SIRegisterInfo TRI)

Definition at line 220 of file SIMachineFunctionInfo.cpp.

References llvm::ArgDescriptor::createRegister(), and TRI.

◆ addPrivateSegmentWaveByteOffset()

Register llvm::SIMachineFunctionInfo::addPrivateSegmentWaveByteOffset ( )
inline

Definition at line 733 of file SIMachineFunctionInfo.h.

References llvm::ArgDescriptor::createRegister().

◆ addQueuePtr()

Register SIMachineFunctionInfo::addQueuePtr ( const SIRegisterInfo TRI)

Definition at line 236 of file SIMachineFunctionInfo.cpp.

References llvm::ArgDescriptor::createRegister(), and TRI.

◆ addReservedUserSGPR()

Register llvm::SIMachineFunctionInfo::addReservedUserSGPR ( )
inline

Increment user SGPRs used for padding the argument list only.

Definition at line 689 of file SIMachineFunctionInfo.h.

◆ addToPrologEpilogSGPRSpills()

void llvm::SIMachineFunctionInfo::addToPrologEpilogSGPRSpills ( Register  Reg,
PrologEpilogSGPRSaveRestoreInfo  SI 
)
inline

◆ addToSpilledSGPRs()

void llvm::SIMachineFunctionInfo::addToSpilledSGPRs ( unsigned  num)
inline

◆ addToSpilledVGPRs()

void llvm::SIMachineFunctionInfo::addToSpilledVGPRs ( unsigned  num)
inline

◆ addWorkGroupIDX()

Register llvm::SIMachineFunctionInfo::addWorkGroupIDX ( )
inline

Definition at line 696 of file SIMachineFunctionInfo.h.

References llvm::ArgDescriptor::createRegister().

◆ addWorkGroupIDY()

Register llvm::SIMachineFunctionInfo::addWorkGroupIDY ( )
inline

Definition at line 702 of file SIMachineFunctionInfo.h.

References llvm::ArgDescriptor::createRegister().

◆ addWorkGroupIDZ()

Register llvm::SIMachineFunctionInfo::addWorkGroupIDZ ( )
inline

Definition at line 708 of file SIMachineFunctionInfo.h.

References llvm::ArgDescriptor::createRegister().

◆ addWorkGroupInfo()

Register llvm::SIMachineFunctionInfo::addWorkGroupInfo ( )
inline

Definition at line 714 of file SIMachineFunctionInfo.h.

References llvm::ArgDescriptor::createRegister().

◆ allocateSGPRSpillToVGPRLane()

bool SIMachineFunctionInfo::allocateSGPRSpillToVGPRLane ( MachineFunction MF,
int  FI,
bool  IsPrologEpilog = false 
)

◆ allocateVGPRSpillToAGPR()

bool SIMachineFunctionInfo::allocateVGPRSpillToAGPR ( MachineFunction MF,
int  FI,
bool  isAGPRtoVGPR 
)

◆ allocateWWMSpill()

void SIMachineFunctionInfo::allocateWWMSpill ( MachineFunction MF,
Register  VGPR,
uint64_t  Size = 4,
Align  Alignment = Align(4) 
)

◆ checkIndexInPrologEpilogSGPRSpills()

bool llvm::SIMachineFunctionInfo::checkIndexInPrologEpilogSGPRSpills ( int  FI) const
inline

◆ clone()

MachineFunctionInfo * SIMachineFunctionInfo::clone ( BumpPtrAllocator Allocator,
MachineFunction DestMF,
const DenseMap< MachineBasicBlock *, MachineBasicBlock * > &  Src2DstMBB 
) const
overridevirtual

Make a functionally equivalent copy of this MachineFunctionInfo in MF.

This requires remapping MachineBasicBlock references from the original parent to values in the new function. Targets may assume that virtual register and frame index values are preserved in the new function.

Reimplemented from llvm::MachineFunctionInfo.

Definition at line 206 of file SIMachineFunctionInfo.cpp.

References llvm::MachineFunction::cloneInfo().

◆ get32BitAddressHighBits()

uint32_t llvm::SIMachineFunctionInfo::get32BitAddressHighBits ( ) const
inline

Definition at line 834 of file SIMachineFunctionInfo.h.

◆ getAGPRSpillVGPRs()

ArrayRef< MCPhysReg > llvm::SIMachineFunctionInfo::getAGPRSpillVGPRs ( ) const
inline

◆ getAllScratchSGPRCopyDstRegs()

void llvm::SIMachineFunctionInfo::getAllScratchSGPRCopyDstRegs ( SmallVectorImpl< Register > &  Regs) const
inline

◆ getArgInfo() [1/2]

AMDGPUFunctionArgInfo & llvm::SIMachineFunctionInfo::getArgInfo ( )
inline

◆ getArgInfo() [2/2]

const AMDGPUFunctionArgInfo & llvm::SIMachineFunctionInfo::getArgInfo ( ) const
inline

Definition at line 814 of file SIMachineFunctionInfo.h.

◆ getBytesInStackArgArea()

unsigned llvm::SIMachineFunctionInfo::getBytesInStackArgArea ( ) const
inline

◆ getFlatWorkGroupSizes()

std::pair< unsigned, unsigned > llvm::SIMachineFunctionInfo::getFlatWorkGroupSizes ( ) const
inline
Returns
A pair of default/requested minimum/maximum flat work group sizes for this function.

Definition at line 969 of file SIMachineFunctionInfo.h.

◆ getFrameOffsetReg()

Register llvm::SIMachineFunctionInfo::getFrameOffsetReg ( ) const
inline

◆ getGITPtrHigh()

unsigned llvm::SIMachineFunctionInfo::getGITPtrHigh ( ) const
inline

Definition at line 828 of file SIMachineFunctionInfo.h.

Referenced by buildGitPtr().

◆ getGITPtrLoReg()

Register SIMachineFunctionInfo::getGITPtrLoReg ( const MachineFunction MF) const

◆ getGWSPSV()

const AMDGPUGWSResourcePseudoSourceValue * llvm::SIMachineFunctionInfo::getGWSPSV ( const AMDGPUTargetMachine TM)
inline

◆ getImplicitBufferPtrUserSGPR()

Register llvm::SIMachineFunctionInfo::getImplicitBufferPtrUserSGPR ( ) const
inline

Definition at line 887 of file SIMachineFunctionInfo.h.

◆ getMaxFlatWorkGroupSize()

unsigned llvm::SIMachineFunctionInfo::getMaxFlatWorkGroupSize ( ) const
inline
Returns
Default/requested maximum flat work group size for this function.

Definition at line 979 of file SIMachineFunctionInfo.h.

◆ getMaxWavesPerEU()

unsigned llvm::SIMachineFunctionInfo::getMaxWavesPerEU ( ) const
inline
Returns
Default/requested maximum number of waves per execution unit.

Definition at line 995 of file SIMachineFunctionInfo.h.

Referenced by llvm::UnclusteredHighRPStage::initGCNSchedStage(), and limitOccupancy().

◆ getMinAllowedOccupancy()

unsigned llvm::SIMachineFunctionInfo::getMinAllowedOccupancy ( ) const
inline

◆ getMinFlatWorkGroupSize()

unsigned llvm::SIMachineFunctionInfo::getMinFlatWorkGroupSize ( ) const
inline
Returns
Default/requested minimum flat work group size for this function.

Definition at line 974 of file SIMachineFunctionInfo.h.

◆ getMinWavesPerEU()

unsigned llvm::SIMachineFunctionInfo::getMinWavesPerEU ( ) const
inline
Returns
Default/requested minimum number of waves per execution unit.

Definition at line 990 of file SIMachineFunctionInfo.h.

Referenced by llvm::GCNSchedStage::mayCauseSpilling().

◆ getMode()

AMDGPU::SIModeRegisterDefaults llvm::SIMachineFunctionInfo::getMode ( ) const
inline

◆ getNumPreloadedSGPRs()

unsigned llvm::SIMachineFunctionInfo::getNumPreloadedSGPRs ( ) const
inline

◆ getNumSpilledSGPRs()

unsigned llvm::SIMachineFunctionInfo::getNumSpilledSGPRs ( ) const
inline

Definition at line 923 of file SIMachineFunctionInfo.h.

◆ getNumSpilledVGPRs()

unsigned llvm::SIMachineFunctionInfo::getNumSpilledVGPRs ( ) const
inline

Definition at line 927 of file SIMachineFunctionInfo.h.

◆ getNumUserSGPRs()

unsigned llvm::SIMachineFunctionInfo::getNumUserSGPRs ( ) const
inline

Definition at line 838 of file SIMachineFunctionInfo.h.

◆ getOccupancy()

unsigned llvm::SIMachineFunctionInfo::getOccupancy ( ) const
inline

Definition at line 1020 of file SIMachineFunctionInfo.h.

Referenced by llvm::GCNSchedStrategy::initialize().

◆ getOptionalScavengeFI()

std::optional< int > llvm::SIMachineFunctionInfo::getOptionalScavengeFI ( ) const
inline

◆ getPreloadedReg()

MCRegister llvm::SIMachineFunctionInfo::getPreloadedReg ( AMDGPUFunctionArgInfo::PreloadedValue  Value) const
inline

Definition at line 823 of file SIMachineFunctionInfo.h.

References Arg.

Referenced by llvm::SIFrameLowering::emitEntryFunctionPrologue().

◆ getPreloadedValue()

std::tuple< const ArgDescriptor *, const TargetRegisterClass *, LLT > llvm::SIMachineFunctionInfo::getPreloadedValue ( AMDGPUFunctionArgInfo::PreloadedValue  Value) const
inline

◆ getPrivateSegmentWaveByteOffsetSystemSGPR()

Register llvm::SIMachineFunctionInfo::getPrivateSegmentWaveByteOffsetSystemSGPR ( ) const
inline

Definition at line 846 of file SIMachineFunctionInfo.h.

◆ getPrologEpilogSGPRSaveRestoreInfo()

const PrologEpilogSGPRSaveRestoreInfo & llvm::SIMachineFunctionInfo::getPrologEpilogSGPRSaveRestoreInfo ( Register  Reg) const
inline

◆ getPrologEpilogSGPRSpills()

const PrologEpilogSGPRSpillsMap & llvm::SIMachineFunctionInfo::getPrologEpilogSGPRSpills ( ) const
inline

◆ getPrologEpilogSGPRSpillToVGPRLanes()

ArrayRef< SIRegisterInfo::SpilledReg > llvm::SIMachineFunctionInfo::getPrologEpilogSGPRSpillToVGPRLanes ( int  FrameIndex) const
inline

◆ getPSInputAddr()

unsigned llvm::SIMachineFunctionInfo::getPSInputAddr ( ) const
inline

Definition at line 939 of file SIMachineFunctionInfo.h.

◆ getPSInputEnable()

unsigned llvm::SIMachineFunctionInfo::getPSInputEnable ( ) const
inline

Definition at line 943 of file SIMachineFunctionInfo.h.

◆ getQueuePtrUserSGPR()

Register llvm::SIMachineFunctionInfo::getQueuePtrUserSGPR ( ) const
inline

Definition at line 883 of file SIMachineFunctionInfo.h.

◆ getScavengeFI()

int SIMachineFunctionInfo::getScavengeFI ( MachineFrameInfo MFI,
const SIRegisterInfo TRI 
)

◆ getScratchRSrcReg()

Register llvm::SIMachineFunctionInfo::getScratchRSrcReg ( ) const
inline

Returns the physical register reserved for use as the resource descriptor for scratch accesses.

Definition at line 852 of file SIMachineFunctionInfo.h.

Referenced by llvm::SIRegisterInfo::buildSpillLoadStore(), llvm::SIRegisterInfo::getReservedRegs(), and llvm::AMDGPUCallLowering::handleImplicitCallArguments().

◆ getScratchSGPRCopyDstReg()

Register llvm::SIMachineFunctionInfo::getScratchSGPRCopyDstReg ( Register  Reg) const
inline

◆ getSGPRSpillToVGPRLanes()

ArrayRef< SIRegisterInfo::SpilledReg > llvm::SIMachineFunctionInfo::getSGPRSpillToVGPRLanes ( int  FrameIndex) const
inline

◆ getSGPRSpillVGPRs()

ArrayRef< Register > llvm::SIMachineFunctionInfo::getSGPRSpillVGPRs ( ) const
inline

Definition at line 566 of file SIMachineFunctionInfo.h.

Referenced by llvm::SIRegisterInfo::getReservedRegs().

◆ getStackPtrOffsetReg()

Register llvm::SIMachineFunctionInfo::getStackPtrOffsetReg ( ) const
inline

◆ getVGPRForAGPRCopy()

Register llvm::SIMachineFunctionInfo::getVGPRForAGPRCopy ( ) const
inline

◆ getVGPRSpillAGPRs()

ArrayRef< MCPhysReg > llvm::SIMachineFunctionInfo::getVGPRSpillAGPRs ( ) const
inline

◆ getVGPRToAGPRSpill()

MCPhysReg llvm::SIMachineFunctionInfo::getVGPRToAGPRSpill ( int  FrameIndex,
unsigned  Lane 
) const
inline

◆ getWavesPerEU()

std::pair< unsigned, unsigned > llvm::SIMachineFunctionInfo::getWavesPerEU ( ) const
inline
Returns
A pair of default/requested minimum/maximum number of waves per execution unit.

Definition at line 985 of file SIMachineFunctionInfo.h.

Referenced by llvm::GCNSubtarget::getMaxNumSGPRs(), and llvm::GCNSubtarget::getMaxNumVGPRs().

◆ getWorkGroupIDSGPR()

Register llvm::SIMachineFunctionInfo::getWorkGroupIDSGPR ( unsigned  Dim) const
inline
Returns
SGPR used for Dim's work group ID.

Definition at line 1000 of file SIMachineFunctionInfo.h.

References assert(), hasWorkGroupIDX(), hasWorkGroupIDY(), hasWorkGroupIDZ(), and llvm_unreachable.

◆ getWWMReservedRegs()

const ReservedRegSet & llvm::SIMachineFunctionInfo::getWWMReservedRegs ( ) const
inline

◆ getWWMSpills()

const WWMSpillsMap & llvm::SIMachineFunctionInfo::getWWMSpills ( ) const
inline

◆ hasDispatchID()

bool llvm::SIMachineFunctionInfo::hasDispatchID ( ) const
inline

Definition at line 760 of file SIMachineFunctionInfo.h.

◆ hasDispatchPtr()

bool llvm::SIMachineFunctionInfo::hasDispatchPtr ( ) const
inline

Definition at line 748 of file SIMachineFunctionInfo.h.

◆ hasFlatScratchInit()

bool llvm::SIMachineFunctionInfo::hasFlatScratchInit ( ) const
inline

◆ hasImplicitArgPtr()

bool llvm::SIMachineFunctionInfo::hasImplicitArgPtr ( ) const
inline

Definition at line 802 of file SIMachineFunctionInfo.h.

◆ hasImplicitBufferPtr()

bool llvm::SIMachineFunctionInfo::hasImplicitBufferPtr ( ) const
inline

Definition at line 806 of file SIMachineFunctionInfo.h.

◆ hasKernargSegmentPtr()

bool llvm::SIMachineFunctionInfo::hasKernargSegmentPtr ( ) const
inline

Definition at line 756 of file SIMachineFunctionInfo.h.

◆ hasLDSKernelId()

bool llvm::SIMachineFunctionInfo::hasLDSKernelId ( ) const
inline

Definition at line 784 of file SIMachineFunctionInfo.h.

◆ hasNonSpillStackObjects()

bool llvm::SIMachineFunctionInfo::hasNonSpillStackObjects ( ) const
inline

Definition at line 907 of file SIMachineFunctionInfo.h.

◆ hasPrivateSegmentBuffer()

bool llvm::SIMachineFunctionInfo::hasPrivateSegmentBuffer ( ) const
inline

Definition at line 744 of file SIMachineFunctionInfo.h.

◆ hasPrivateSegmentWaveByteOffset()

bool llvm::SIMachineFunctionInfo::hasPrivateSegmentWaveByteOffset ( ) const
inline

Definition at line 786 of file SIMachineFunctionInfo.h.

◆ hasPrologEpilogSGPRSpillEntry()

bool llvm::SIMachineFunctionInfo::hasPrologEpilogSGPRSpillEntry ( Register  Reg) const
inline

◆ hasQueuePtr()

bool llvm::SIMachineFunctionInfo::hasQueuePtr ( ) const
inline

◆ hasSpilledSGPRs()

bool llvm::SIMachineFunctionInfo::hasSpilledSGPRs ( ) const
inline

◆ hasSpilledVGPRs()

bool llvm::SIMachineFunctionInfo::hasSpilledVGPRs ( ) const
inline

◆ hasWorkGroupIDX()

bool llvm::SIMachineFunctionInfo::hasWorkGroupIDX ( ) const
inline

Definition at line 768 of file SIMachineFunctionInfo.h.

Referenced by getWorkGroupIDSGPR().

◆ hasWorkGroupIDY()

bool llvm::SIMachineFunctionInfo::hasWorkGroupIDY ( ) const
inline

Definition at line 772 of file SIMachineFunctionInfo.h.

Referenced by getWorkGroupIDSGPR().

◆ hasWorkGroupIDZ()

bool llvm::SIMachineFunctionInfo::hasWorkGroupIDZ ( ) const
inline

Definition at line 776 of file SIMachineFunctionInfo.h.

Referenced by getWorkGroupIDSGPR().

◆ hasWorkGroupInfo()

bool llvm::SIMachineFunctionInfo::hasWorkGroupInfo ( ) const
inline

Definition at line 780 of file SIMachineFunctionInfo.h.

◆ hasWorkItemIDX()

bool llvm::SIMachineFunctionInfo::hasWorkItemIDX ( ) const
inline

Definition at line 790 of file SIMachineFunctionInfo.h.

◆ hasWorkItemIDY()

bool llvm::SIMachineFunctionInfo::hasWorkItemIDY ( ) const
inline

Definition at line 794 of file SIMachineFunctionInfo.h.

◆ hasWorkItemIDZ()

bool llvm::SIMachineFunctionInfo::hasWorkItemIDZ ( ) const
inline

Definition at line 798 of file SIMachineFunctionInfo.h.

◆ increaseOccupancy()

void llvm::SIMachineFunctionInfo::increaseOccupancy ( const MachineFunction MF,
unsigned  Limit 
)
inline

◆ initializeBaseYamlFields()

bool SIMachineFunctionInfo::initializeBaseYamlFields ( const yaml::SIMachineFunctionInfo YamlMFI,
const MachineFunction MF,
PerFunctionMIParsingState PFS,
SMDiagnostic Error,
SMRange SourceRange 
)

◆ isCalleeSavedReg()

bool SIMachineFunctionInfo::isCalleeSavedReg ( const MCPhysReg CSRegs,
MCPhysReg  Reg 
) const

Definition at line 302 of file SIMachineFunctionInfo.cpp.

References I.

Referenced by splitWWMSpillRegisters().

◆ isPSInputAllocated()

bool llvm::SIMachineFunctionInfo::isPSInputAllocated ( unsigned  Index) const
inline

Definition at line 947 of file SIMachineFunctionInfo.h.

◆ isStackRealigned()

bool llvm::SIMachineFunctionInfo::isStackRealigned ( ) const
inline

Definition at line 915 of file SIMachineFunctionInfo.h.

Referenced by llvm::SIFrameLowering::emitEpilogue().

◆ limitOccupancy() [1/2]

void SIMachineFunctionInfo::limitOccupancy ( const MachineFunction MF)

◆ limitOccupancy() [2/2]

void llvm::SIMachineFunctionInfo::limitOccupancy ( unsigned  Limit)
inline

Definition at line 1032 of file SIMachineFunctionInfo.h.

◆ markPSInputAllocated()

void llvm::SIMachineFunctionInfo::markPSInputAllocated ( unsigned  Index)
inline

Definition at line 951 of file SIMachineFunctionInfo.h.

◆ markPSInputEnabled()

void llvm::SIMachineFunctionInfo::markPSInputEnabled ( unsigned  Index)
inline

Definition at line 955 of file SIMachineFunctionInfo.h.

◆ mayNeedAGPRs()

bool llvm::SIMachineFunctionInfo::mayNeedAGPRs ( ) const
inline

Definition at line 1043 of file SIMachineFunctionInfo.h.

◆ mayUseAGPRs()

bool SIMachineFunctionInfo::mayUseAGPRs ( const Function F) const

Definition at line 695 of file SIMachineFunctionInfo.cpp.

References Callee, F, I, and llvm::Intrinsic::not_intrinsic.

Referenced by SIMachineFunctionInfo().

◆ removeDeadFrameIndices()

bool SIMachineFunctionInfo::removeDeadFrameIndices ( MachineFrameInfo MFI,
bool  ResetSGPRSpillStackIDs 
)

◆ reserveWWMRegister()

void llvm::SIMachineFunctionInfo::reserveWWMRegister ( Register  Reg)
inline

◆ returnsVoid()

bool llvm::SIMachineFunctionInfo::returnsVoid ( ) const
inline

Definition at line 959 of file SIMachineFunctionInfo.h.

Referenced by llvm::AMDGPUCallLowering::lowerReturn().

◆ setBytesInStackArgArea()

void llvm::SIMachineFunctionInfo::setBytesInStackArgArea ( unsigned  Bytes)
inline

Definition at line 674 of file SIMachineFunctionInfo.h.

◆ setFrameOffsetReg()

void llvm::SIMachineFunctionInfo::setFrameOffsetReg ( Register  Reg)
inline

Definition at line 865 of file SIMachineFunctionInfo.h.

References assert(), and Reg.

◆ setHasNonSpillStackObjects()

void llvm::SIMachineFunctionInfo::setHasNonSpillStackObjects ( bool  StackObject = true)
inline

Definition at line 911 of file SIMachineFunctionInfo.h.

◆ setHasSpilledSGPRs()

void llvm::SIMachineFunctionInfo::setHasSpilledSGPRs ( bool  Spill = true)
inline

◆ setHasSpilledVGPRs()

void llvm::SIMachineFunctionInfo::setHasSpilledVGPRs ( bool  Spill = true)
inline

Definition at line 903 of file SIMachineFunctionInfo.h.

Referenced by llvm::SIInstrInfo::storeRegToStackSlot().

◆ setIfReturnsVoid()

void llvm::SIMachineFunctionInfo::setIfReturnsVoid ( bool  Value)
inline

Definition at line 963 of file SIMachineFunctionInfo.h.

Referenced by llvm::AMDGPUCallLowering::lowerReturn().

◆ setIsStackRealigned()

void llvm::SIMachineFunctionInfo::setIsStackRealigned ( bool  Realigned = true)
inline

Definition at line 919 of file SIMachineFunctionInfo.h.

Referenced by llvm::SIFrameLowering::emitPrologue().

◆ setPrivateSegmentWaveByteOffset()

void llvm::SIMachineFunctionInfo::setPrivateSegmentWaveByteOffset ( Register  Reg)
inline

Definition at line 740 of file SIMachineFunctionInfo.h.

References llvm::ArgDescriptor::createRegister(), and Reg.

◆ setScratchRSrcReg()

void llvm::SIMachineFunctionInfo::setScratchRSrcReg ( Register  Reg)
inline

Definition at line 856 of file SIMachineFunctionInfo.h.

References assert(), and Reg.

◆ setStackPtrOffsetReg()

void llvm::SIMachineFunctionInfo::setStackPtrOffsetReg ( Register  Reg)
inline

Definition at line 870 of file SIMachineFunctionInfo.h.

References assert(), and Reg.

◆ setVGPRForAGPRCopy()

void llvm::SIMachineFunctionInfo::setVGPRForAGPRCopy ( Register  NewVGPRForAGPRCopy)
inline

◆ setVGPRToAGPRSpillDead()

void llvm::SIMachineFunctionInfo::setVGPRToAGPRSpillDead ( int  FrameIndex)
inline

◆ setWorkItemIDX()

void llvm::SIMachineFunctionInfo::setWorkItemIDX ( ArgDescriptor  Arg)
inline

Definition at line 721 of file SIMachineFunctionInfo.h.

References Arg.

◆ setWorkItemIDY()

void llvm::SIMachineFunctionInfo::setWorkItemIDY ( ArgDescriptor  Arg)
inline

Definition at line 725 of file SIMachineFunctionInfo.h.

References Arg.

◆ setWorkItemIDZ()

void llvm::SIMachineFunctionInfo::setWorkItemIDZ ( ArgDescriptor  Arg)
inline

Definition at line 729 of file SIMachineFunctionInfo.h.

References Arg.

◆ splitWWMSpillRegisters()

void SIMachineFunctionInfo::splitWWMSpillRegisters ( MachineFunction MF,
SmallVectorImpl< std::pair< Register, int > > &  CalleeSavedRegs,
SmallVectorImpl< std::pair< Register, int > > &  ScratchRegs 
) const

◆ usesAGPRs()

bool SIMachineFunctionInfo::usesAGPRs ( const MachineFunction MF) const

Friends And Related Function Documentation

◆ GCNTargetMachine

friend class GCNTargetMachine
friend

Definition at line 359 of file SIMachineFunctionInfo.h.


The documentation for this class was generated from the following files: