llvm::SIMachineFunctionInfo Class Reference

This class keeps track of the SPI_SP_INPUT_ADDR config register, which tells the hardware which interpolation parameters to load. More...

#include "Target/AMDGPU/SIMachineFunctionInfo.h"

Inheritance diagram for llvm::SIMachineFunctionInfo:

Collaboration diagram for llvm::SIMachineFunctionInfo:

Classes
struct	SGPRSpillVGPRCSR
struct	SpilledReg
struct	VGPRSpillToAGPR

Public Member Functions
void	ReserveWWMRegister (unsigned reg)
	SIMachineFunctionInfo (const MachineFunction &MF)
bool	initializeBaseYamlFields (const yaml::SIMachineFunctionInfo &YamlMFI)
ArrayRef< SpilledReg >	getSGPRToVGPRSpills (int FrameIndex) const
ArrayRef< SGPRSpillVGPRCSR >	getSGPRSpillVGPRs () const
ArrayRef< MCPhysReg >	getAGPRSpillVGPRs () const
ArrayRef< MCPhysReg >	getVGPRSpillAGPRs () const
MCPhysReg	getVGPRToAGPRSpill (int FrameIndex, unsigned Lane) const
AMDGPU::SIModeRegisterDefaults	getMode () const
bool	haveFreeLanesForSGPRSpill (const MachineFunction &MF, unsigned NumLane) const
	returns true if NumLanes slots are available in VGPRs already used for SGPR spilling. More...
bool	allocateSGPRSpillToVGPR (MachineFunction &MF, int FI)
	Reserve a slice of a VGPR to support spilling for FrameIndex FI. More...
bool	allocateVGPRSpillToAGPR (MachineFunction &MF, int FI, bool isAGPRtoVGPR)
	Reserve AGPRs or VGPRs to support spilling for FrameIndex FI. More...
void	removeDeadFrameIndices (MachineFrameInfo &MFI)
bool	hasCalculatedTID () const
unsigned	getTIDReg () const
void	setTIDReg (unsigned Reg)
unsigned	getBytesInStackArgArea () const
void	setBytesInStackArgArea (unsigned Bytes)
unsigned	addPrivateSegmentBuffer (const SIRegisterInfo &TRI)
unsigned	addDispatchPtr (const SIRegisterInfo &TRI)
unsigned	addQueuePtr (const SIRegisterInfo &TRI)
unsigned	addKernargSegmentPtr (const SIRegisterInfo &TRI)
unsigned	addDispatchID (const SIRegisterInfo &TRI)
unsigned	addFlatScratchInit (const SIRegisterInfo &TRI)
unsigned	addImplicitBufferPtr (const SIRegisterInfo &TRI)
unsigned	addWorkGroupIDX ()
unsigned	addWorkGroupIDY ()
unsigned	addWorkGroupIDZ ()
unsigned	addWorkGroupInfo ()
void	setWorkItemIDX (ArgDescriptor Arg)
void	setWorkItemIDY (ArgDescriptor Arg)
void	setWorkItemIDZ (ArgDescriptor Arg)
unsigned	addPrivateSegmentWaveByteOffset ()
void	setPrivateSegmentWaveByteOffset (unsigned Reg)
bool	hasPrivateSegmentBuffer () const
bool	hasDispatchPtr () const
bool	hasQueuePtr () const
bool	hasKernargSegmentPtr () const
bool	hasDispatchID () const
bool	hasFlatScratchInit () const
bool	hasWorkGroupIDX () const
bool	hasWorkGroupIDY () const
bool	hasWorkGroupIDZ () const
bool	hasWorkGroupInfo () const
bool	hasPrivateSegmentWaveByteOffset () const
bool	hasWorkItemIDX () const
bool	hasWorkItemIDY () const
bool	hasWorkItemIDZ () const
bool	hasImplicitArgPtr () const
bool	hasImplicitBufferPtr () const
AMDGPUFunctionArgInfo &	getArgInfo ()
const AMDGPUFunctionArgInfo &	getArgInfo () const
std::pair< const ArgDescriptor *, const TargetRegisterClass * >	getPreloadedValue (AMDGPUFunctionArgInfo::PreloadedValue Value) const
Register	getPreloadedReg (AMDGPUFunctionArgInfo::PreloadedValue Value) const
unsigned	getGITPtrHigh () const
uint32_t	get32BitAddressHighBits () const
unsigned	getGDSSize () const
unsigned	getNumUserSGPRs () const
unsigned	getNumPreloadedSGPRs () const
unsigned	getPrivateSegmentWaveByteOffsetSystemSGPR () const
unsigned	getScratchRSrcReg () const
	Returns the physical register reserved for use as the resource descriptor for scratch accesses. More...
void	setScratchRSrcReg (unsigned Reg)
unsigned	getScratchWaveOffsetReg () const
unsigned	getFrameOffsetReg () const
void	setFrameOffsetReg (unsigned Reg)
void	setStackPtrOffsetReg (unsigned Reg)
unsigned	getStackPtrOffsetReg () const
void	setScratchWaveOffsetReg (unsigned Reg)
unsigned	getQueuePtrUserSGPR () const
unsigned	getImplicitBufferPtrUserSGPR () const
bool	hasSpilledSGPRs () const
void	setHasSpilledSGPRs (bool Spill=true)
bool	hasSpilledVGPRs () const
void	setHasSpilledVGPRs (bool Spill=true)
bool	hasNonSpillStackObjects () const
void	setHasNonSpillStackObjects (bool StackObject=true)
bool	isStackRealigned () const
void	setIsStackRealigned (bool Realigned=true)
unsigned	getNumSpilledSGPRs () const
unsigned	getNumSpilledVGPRs () const
void	addToSpilledSGPRs (unsigned num)
void	addToSpilledVGPRs (unsigned num)
unsigned	getPSInputAddr () const
unsigned	getPSInputEnable () const
bool	isPSInputAllocated (unsigned Index) const
void	markPSInputAllocated (unsigned Index)
void	markPSInputEnabled (unsigned Index)
bool	returnsVoid () const
void	setIfReturnsVoid (bool Value)
std::pair< unsigned, unsigned >	getFlatWorkGroupSizes () const
unsigned	getMinFlatWorkGroupSize () const
unsigned	getMaxFlatWorkGroupSize () const
std::pair< unsigned, unsigned >	getWavesPerEU () const
unsigned	getMinWavesPerEU () const
unsigned	getMaxWavesPerEU () const
unsigned	getWorkGroupIDSGPR (unsigned Dim) const
unsigned	getLDSWaveSpillSize () const
const AMDGPUBufferPseudoSourceValue *	getBufferPSV (const SIInstrInfo &TII, const Value *BufferRsrc)
const AMDGPUImagePseudoSourceValue *	getImagePSV (const SIInstrInfo &TII, const Value *ImgRsrc)
const AMDGPUGWSResourcePseudoSourceValue *	getGWSPSV (const SIInstrInfo &TII)
unsigned	getOccupancy () const
unsigned	getMinAllowedOccupancy () const
void	limitOccupancy (const MachineFunction &MF)
void	limitOccupancy (unsigned Limit)
void	increaseOccupancy (const MachineFunction &MF, unsigned Limit)
Public Member Functions inherited from llvm::AMDGPUMachineFunction
	AMDGPUMachineFunction (const MachineFunction &MF)
uint64_t	getExplicitKernArgSize () const
unsigned	getMaxKernArgAlign () const
unsigned	getLDSSize () const
bool	isEntryFunction () const
bool	hasNoSignedZerosFPMath () const
bool	isMemoryBound () const
bool	needsWaveLimiter () const
unsigned	allocateLDSGlobal (const DataLayout &DL, const GlobalValue &GV)
Public Member Functions inherited from llvm::MachineFunctionInfo
virtual	~MachineFunctionInfo ()

Public Attributes
SparseBitVector	WWMReservedRegs
unsigned	SGPRForFPSaveRestoreCopy = 0
	If this is set, an SGPR used for save/restore of the register used for the frame pointer. More...
Optional< int >	FramePointerSaveIndex

Friends
class	GCNTargetMachine

Additional Inherited Members
Static Public Member Functions inherited from llvm::MachineFunctionInfo
template<typename Ty >
static Ty *	create (BumpPtrAllocator &Allocator, MachineFunction &MF)
	Factory function: default behavior is to call new using the supplied allocator. More...
Protected Attributes inherited from llvm::AMDGPUMachineFunction
uint64_t	ExplicitKernArgSize
Align	MaxKernArgAlign
unsigned	LDSSize
	Number of bytes in the LDS that are being used. More...
bool	IsEntryFunction
bool	NoSignedZerosFPMath
bool	MemoryBound
bool	WaveLimiter

Detailed Description

This class keeps track of the SPI_SP_INPUT_ADDR config register, which tells the hardware which interpolation parameters to load.

Definition at line 315 of file SIMachineFunctionInfo.h.

Constructor & Destructor Documentation

SIMachineFunctionInfo()

SIMachineFunctionInfo::SIMachineFunctionInfo

(

const MachineFunction &

MF

)

Definition at line 29 of file SIMachineFunctionInfo.cpp.

References llvm::CallingConv::AMDGPU_GS, llvm::CallingConv::AMDGPU_HS, llvm::CallingConv::AMDGPU_KERNEL, llvm::CallingConv::AMDGPU_PS, llvm::GCNSubtarget::computeOccupancy(), llvm::StringRef::consumeInteger(), llvm::ArgDescriptor::createRegister(), llvm::StringRef::empty(), F(), llvm::AMDGPUSubtarget::getAlignmentForImplicitArgPtr(), llvm::AMDGPUSubtarget::getFlatWorkGroupSizes(), llvm::MachineFunction::getFrameInfo(), llvm::MachineFunction::getFunction(), llvm::GCNSubtarget::getGeneration(), llvm::AMDGPU::getInitialPSInputAddr(), llvm::AMDGPUMachineFunction::getLDSSize(), llvm::MachineFrameInfo::getObjectIndexBegin(), llvm::MachineFrameInfo::getObjectIndexEnd(), llvm::MachineFunction::getSubtarget(), llvm::Attribute::getValueAsString(), llvm::AMDGPUSubtarget::getWavesPerEU(), llvm::AMDGPUSubtarget::GFX9, llvm::GCNSubtarget::hasFlatAddressSpace(), hasNonSpillStackObjects(), llvm::MachineFrameInfo::hasStackObjects(), llvm::AMDGPUSubtarget::isAmdHsaOrMesa(), llvm::AMDGPUMachineFunction::isEntryFunction(), llvm::GCNSubtarget::isMesaGfxShader(), llvm::MachineFrameInfo::isSpillSlotObjectIndex(), llvm::max(), llvm::AMDGPUMachineFunction::MaxKernArgAlign, llvm::AMDGPUFunctionArgInfo::PrivateSegmentBuffer, llvm::AMDGPUFunctionArgInfo::PrivateSegmentWaveByteOffset, llvm::CallingConv::SPIR_KERNEL, and llvm::ARM_MB::ST.

Member Function Documentation

addDispatchID()

unsigned SIMachineFunctionInfo::addDispatchID

(

const SIRegisterInfo &

TRI

)

Definition at line 219 of file SIMachineFunctionInfo.cpp.

References llvm::ArgDescriptor::createRegister(), llvm::AMDGPUFunctionArgInfo::DispatchID, and llvm::ArgDescriptor::getRegister().

Referenced by allocateHSAUserSGPRs(), and llvm::SITargetLowering::allocateHSAUserSGPRs().

addDispatchPtr()

unsigned SIMachineFunctionInfo::addDispatchPtr

(

const SIRegisterInfo &

TRI

)

Definition at line 197 of file SIMachineFunctionInfo.cpp.

References llvm::ArgDescriptor::createRegister(), llvm::AMDGPUFunctionArgInfo::DispatchPtr, and llvm::ArgDescriptor::getRegister().

Referenced by allocateHSAUserSGPRs(), and llvm::SITargetLowering::allocateHSAUserSGPRs().

addFlatScratchInit()

unsigned SIMachineFunctionInfo::addFlatScratchInit

(

const SIRegisterInfo &

TRI

)

Definition at line 226 of file SIMachineFunctionInfo.cpp.

References llvm::ArgDescriptor::createRegister(), llvm::AMDGPUFunctionArgInfo::FlatScratchInit, and llvm::ArgDescriptor::getRegister().

Referenced by allocateHSAUserSGPRs(), and llvm::SITargetLowering::allocateHSAUserSGPRs().

addImplicitBufferPtr()

unsigned SIMachineFunctionInfo::addImplicitBufferPtr

(

const SIRegisterInfo &

TRI

)

Definition at line 233 of file SIMachineFunctionInfo.cpp.

References llvm::ArgDescriptor::createRegister(), llvm::ArgDescriptor::getRegister(), and llvm::AMDGPUFunctionArgInfo::ImplicitBufferPtr.

Referenced by llvm::SITargetLowering::allocateHSAUserSGPRs(), and llvm::AMDGPUCallLowering::lowerFormalArguments().

addKernargSegmentPtr()

unsigned SIMachineFunctionInfo::addKernargSegmentPtr

(

const SIRegisterInfo &

TRI

)

Definition at line 211 of file SIMachineFunctionInfo.cpp.

References llvm::ArgDescriptor::createRegister(), llvm::ArgDescriptor::getRegister(), and llvm::AMDGPUFunctionArgInfo::KernargSegmentPtr.

Referenced by allocateHSAUserSGPRs(), and llvm::SITargetLowering::allocateHSAUserSGPRs().

addPrivateSegmentBuffer()

unsigned SIMachineFunctionInfo::addPrivateSegmentBuffer

(

const SIRegisterInfo &

TRI

)

Definition at line 188 of file SIMachineFunctionInfo.cpp.

References llvm::ArgDescriptor::createRegister(), llvm::ArgDescriptor::getRegister(), and llvm::AMDGPUFunctionArgInfo::PrivateSegmentBuffer.

Referenced by allocateHSAUserSGPRs(), and llvm::SITargetLowering::allocateHSAUserSGPRs().

addPrivateSegmentWaveByteOffset()

unsigned llvm::SIMachineFunctionInfo::addPrivateSegmentWaveByteOffset ( )

inline

Definition at line 579 of file SIMachineFunctionInfo.h.

References llvm::ArgDescriptor::createRegister(), llvm::ArgDescriptor::getRegister(), and llvm::AMDGPUFunctionArgInfo::PrivateSegmentWaveByteOffset.

Referenced by llvm::SITargetLowering::allocateSystemSGPRs().

addQueuePtr()

unsigned SIMachineFunctionInfo::addQueuePtr

(

const SIRegisterInfo &

TRI

)

Definition at line 204 of file SIMachineFunctionInfo.cpp.

References llvm::ArgDescriptor::createRegister(), llvm::ArgDescriptor::getRegister(), and llvm::AMDGPUFunctionArgInfo::QueuePtr.

Referenced by allocateHSAUserSGPRs(), and llvm::SITargetLowering::allocateHSAUserSGPRs().

addToSpilledSGPRs()

void llvm::SIMachineFunctionInfo::addToSpilledSGPRs ( unsigned  num )

inline

Definition at line 786 of file SIMachineFunctionInfo.h.

Referenced by llvm::SIRegisterInfo::spillSGPR().

addToSpilledVGPRs()

void llvm::SIMachineFunctionInfo::addToSpilledVGPRs ( unsigned  num )

inline

Definition at line 790 of file SIMachineFunctionInfo.h.

Referenced by llvm::SIRegisterInfo::eliminateFrameIndex().

addWorkGroupIDX()

unsigned llvm::SIMachineFunctionInfo::addWorkGroupIDX ( )

inline

Definition at line 542 of file SIMachineFunctionInfo.h.

References llvm::ArgDescriptor::createRegister(), llvm::ArgDescriptor::getRegister(), and llvm::AMDGPUFunctionArgInfo::WorkGroupIDX.

Referenced by llvm::SITargetLowering::allocateSystemSGPRs().

addWorkGroupIDY()

unsigned llvm::SIMachineFunctionInfo::addWorkGroupIDY ( )

inline

Definition at line 548 of file SIMachineFunctionInfo.h.

References llvm::ArgDescriptor::createRegister(), llvm::ArgDescriptor::getRegister(), and llvm::AMDGPUFunctionArgInfo::WorkGroupIDY.

Referenced by llvm::SITargetLowering::allocateSystemSGPRs().

addWorkGroupIDZ()

unsigned llvm::SIMachineFunctionInfo::addWorkGroupIDZ ( )

inline

Definition at line 554 of file SIMachineFunctionInfo.h.

References llvm::ArgDescriptor::createRegister(), llvm::ArgDescriptor::getRegister(), and llvm::AMDGPUFunctionArgInfo::WorkGroupIDZ.

Referenced by llvm::SITargetLowering::allocateSystemSGPRs().

addWorkGroupInfo()

unsigned llvm::SIMachineFunctionInfo::addWorkGroupInfo ( )

inline

Definition at line 560 of file SIMachineFunctionInfo.h.

References llvm::ArgDescriptor::createRegister(), llvm::ArgDescriptor::getRegister(), and llvm::AMDGPUFunctionArgInfo::WorkGroupInfo.

Referenced by llvm::SITargetLowering::allocateSystemSGPRs().

allocateSGPRSpillToVGPR()

bool SIMachineFunctionInfo::allocateSGPRSpillToVGPR	(	MachineFunction &	MF,
		int	FI
	)

Reserve a slice of a VGPR to support spilling for FrameIndex FI.

Definition at line 261 of file SIMachineFunctionInfo.cpp.

References assert(), llvm::MachineFrameInfo::CreateSpillStackObject(), llvm::MachineRegisterInfo::getCalleeSavedRegs(), llvm::MachineFunction::getFrameInfo(), llvm::MachineFrameInfo::getObjectSize(), llvm::MachineFunction::getRegInfo(), llvm::GCNSubtarget::getRegisterInfo(), llvm::MachineFunction::getSubtarget(), llvm::AMDGPUSubtarget::getWavefrontSize(), llvm::MachineFrameInfo::hasCalls(), I, isCalleeSavedReg(), llvm::AMDGPUMachineFunction::isEntryFunction(), MRI, Size, llvm::ARM_MB::ST, and TRI.

Referenced by llvm::SIFrameLowering::determineCalleeSaves(), and insertCSRRestores().

allocateVGPRSpillToAGPR()

bool SIMachineFunctionInfo::allocateVGPRSpillToAGPR	(	MachineFunction &	MF,
		int	FI,
		bool	isAGPRtoVGPR
	)

Reserve AGPRs or VGPRs to support spilling for FrameIndex FI.

Either AGPR is spilled to VGPR to vice versa. Returns true if a FI can be eliminated completely.

Definition at line 324 of file SIMachineFunctionInfo.cpp.

References assert(), llvm::SmallVectorTemplateCommon< T, typename >::begin(), llvm::SmallVectorTemplateCommon< T >::end(), llvm::find_if(), llvm::Function::getCallingConv(), llvm::SIRegisterInfo::getCallPreservedMask(), llvm::MachineFunction::getFrameInfo(), llvm::MachineFunction::getFunction(), llvm::MachineFrameInfo::getObjectSize(), llvm::MachineFunction::getRegInfo(), llvm::GCNSubtarget::getRegisterInfo(), llvm::TargetRegisterClass::getRegisters(), llvm::MachineFunction::getSubtarget(), llvm::GCNSubtarget::hasMAIInsts(), I, llvm::MachineRegisterInfo::isAllocatable(), llvm::MachineRegisterInfo::isPhysRegUsed(), llvm::MachineFrameInfo::isSpillSlotObjectIndex(), MRI, llvm::BitVector::push_back(), Reg, llvm::BitVector::resize(), llvm::BitVector::set(), llvm::BitVector::setBitsInMask(), Size, llvm::ARM_MB::ST, and TRI.

Referenced by insertCSRRestores().

get32BitAddressHighBits()

uint32_t llvm::SIMachineFunctionInfo::get32BitAddressHighBits ( ) const

inline

Definition at line 676 of file SIMachineFunctionInfo.h.

Referenced by findMemSDNode(), and llvm::AMDGPULegalizerInfo::legalizeAddrSpaceCast().

getAGPRSpillVGPRs()

ArrayRef<MCPhysReg> llvm::SIMachineFunctionInfo::getAGPRSpillVGPRs ( ) const

inline

Definition at line 496 of file SIMachineFunctionInfo.h.

Referenced by llvm::SIRegisterInfo::getReservedRegs(), and insertCSRRestores().

getArgInfo() [1/2]

AMDGPUFunctionArgInfo& llvm::SIMachineFunctionInfo::getArgInfo ( )

inline

Definition at line 654 of file SIMachineFunctionInfo.h.

Referenced by llvm::SITargetLowering::allocateSpecialInputSGPRs(), llvm::AMDGPULegalizerInfo::getSegmentAperture(), llvm::SITargetLowering::LowerFormalArguments(), and llvm::SITargetLowering::passSpecialInputs().

getArgInfo() [2/2]

const AMDGPUFunctionArgInfo& llvm::SIMachineFunctionInfo::getArgInfo ( ) const

inline

Definition at line 658 of file SIMachineFunctionInfo.h.

getBufferPSV()

const AMDGPUBufferPseudoSourceValue* llvm::SIMachineFunctionInfo::getBufferPSV ( const SIInstrInfo &  TII, const Value *  BufferRsrc  )

inline

Definition at line 874 of file SIMachineFunctionInfo.h.

References assert().

Referenced by llvm::SITargetLowering::getTgtMemIntrinsic().

getBytesInStackArgArea()

unsigned llvm::SIMachineFunctionInfo::getBytesInStackArgArea ( ) const

inline

Definition at line 524 of file SIMachineFunctionInfo.h.

Referenced by llvm::SITargetLowering::isEligibleForTailCallOptimization().

getFlatWorkGroupSizes()

std::pair<unsigned, unsigned> llvm::SIMachineFunctionInfo::getFlatWorkGroupSizes ( ) const

inline

Returns

A pair of default/requested minimum/maximum flat work group sizes for this function.

Definition at line 824 of file SIMachineFunctionInfo.h.

getFrameOffsetReg()

unsigned llvm::SIMachineFunctionInfo::getFrameOffsetReg ( ) const

inline

Definition at line 711 of file SIMachineFunctionInfo.h.

Referenced by llvm::SIFrameLowering::assignCalleeSavedSpillSlots(), llvm::SIFrameLowering::emitEpilogue(), llvm::SITargetLowering::EmitInstrWithCustomInserter(), llvm::SIFrameLowering::emitPrologue(), llvm::SITargetLowering::finalizeLowering(), llvm::SIRegisterInfo::getFrameRegister(), llvm::SIRegisterInfo::getReservedRegs(), llvm::AMDGPUCallLowering::lowerFormalArguments(), llvm::SITargetLowering::LowerFormalArguments(), and llvm::SIRegisterInfo::spillSGPR().

getGDSSize()

unsigned llvm::SIMachineFunctionInfo::getGDSSize ( ) const

inline

Definition at line 680 of file SIMachineFunctionInfo.h.

getGITPtrHigh()

unsigned llvm::SIMachineFunctionInfo::getGITPtrHigh ( ) const

inline

Definition at line 672 of file SIMachineFunctionInfo.h.

Referenced by llvm::SIFrameLowering::emitEntryFunctionPrologue().

getGWSPSV()

const AMDGPUGWSResourcePseudoSourceValue* llvm::SIMachineFunctionInfo::getGWSPSV ( const SIInstrInfo &  TII )

inline

Definition at line 892 of file SIMachineFunctionInfo.h.

References TII.

Referenced by llvm::SITargetLowering::getTgtMemIntrinsic().

getImagePSV()

const AMDGPUImagePseudoSourceValue* llvm::SIMachineFunctionInfo::getImagePSV ( const SIInstrInfo &  TII, const Value *  ImgRsrc  )

inline

Definition at line 883 of file SIMachineFunctionInfo.h.

References assert().

Referenced by llvm::SITargetLowering::getTgtMemIntrinsic().

getImplicitBufferPtrUserSGPR()

unsigned llvm::SIMachineFunctionInfo::getImplicitBufferPtrUserSGPR ( ) const

inline

Definition at line 742 of file SIMachineFunctionInfo.h.

References llvm::ArgDescriptor::getRegister(), and llvm::AMDGPUFunctionArgInfo::ImplicitBufferPtr.

Referenced by llvm::SIFrameLowering::emitEntryFunctionPrologue().

getLDSWaveSpillSize()

unsigned llvm::SIMachineFunctionInfo::getLDSWaveSpillSize ( ) const

inline

Definition at line 870 of file SIMachineFunctionInfo.h.

Referenced by hasAnyNonFlatUseOfReg().

getMaxFlatWorkGroupSize()

unsigned llvm::SIMachineFunctionInfo::getMaxFlatWorkGroupSize ( ) const

inline

Returns

Default/requested maximum flat work group size for this function.

Definition at line 834 of file SIMachineFunctionInfo.h.

Referenced by llvm::SIInstrInfo::calculateLDSSpillAddress(), and hasAnyNonFlatUseOfReg().

getMaxWavesPerEU()

unsigned llvm::SIMachineFunctionInfo::getMaxWavesPerEU ( ) const

inline

Returns

Default/requested maximum number of waves per execution unit.

Definition at line 850 of file SIMachineFunctionInfo.h.

Referenced by hasAnyNonFlatUseOfReg(), and limitOccupancy().

getMinAllowedOccupancy()

unsigned llvm::SIMachineFunctionInfo::getMinAllowedOccupancy ( ) const

inline

Definition at line 905 of file SIMachineFunctionInfo.h.

Referenced by llvm::GCNScheduleDAGMILive::schedule(), llvm::GCNIterativeScheduler::scheduleILP(), and llvm::GCNIterativeScheduler::scheduleLegacyMaxOccupancy().

getMinFlatWorkGroupSize()

unsigned llvm::SIMachineFunctionInfo::getMinFlatWorkGroupSize ( ) const

inline

Returns

Default/requested minimum flat work group size for this function.

Definition at line 829 of file SIMachineFunctionInfo.h.

getMinWavesPerEU()

unsigned llvm::SIMachineFunctionInfo::getMinWavesPerEU ( ) const

inline

Returns

Default/requested minimum number of waves per execution unit.

Definition at line 845 of file SIMachineFunctionInfo.h.

getMode()

AMDGPU::SIModeRegisterDefaults llvm::SIMachineFunctionInfo::getMode ( ) const

inline

Definition at line 510 of file SIMachineFunctionInfo.h.

References Mode.

Referenced by getOModValue(), getSplatConstantFP(), hasAnyNonFlatUseOfReg(), isClampZeroToOne(), llvm::SITargetLowering::isKnownNeverNaNForTargetNode(), llvm::AMDGPULegalizerInfo::legalizeMinNumMaxNum(), and llvm::SITargetLowering::shouldEmitPCReloc().

getNumPreloadedSGPRs()

unsigned llvm::SIMachineFunctionInfo::getNumPreloadedSGPRs ( ) const

inline

Definition at line 688 of file SIMachineFunctionInfo.h.

Referenced by buildEpilogReload(), and llvm::GCNSubtarget::getMaxNumSGPRs().

getNumSpilledSGPRs()

unsigned llvm::SIMachineFunctionInfo::getNumSpilledSGPRs ( ) const

inline

Definition at line 778 of file SIMachineFunctionInfo.h.

References llvm::AMDGPU::HSAMD::Kernel::CodeProps::Key::NumSpilledSGPRs.

Referenced by getRsrcReg().

getNumSpilledVGPRs()

unsigned llvm::SIMachineFunctionInfo::getNumSpilledVGPRs ( ) const

inline

Definition at line 782 of file SIMachineFunctionInfo.h.

References llvm::AMDGPU::HSAMD::Kernel::CodeProps::Key::NumSpilledVGPRs.

Referenced by getRsrcReg().

getNumUserSGPRs()

unsigned llvm::SIMachineFunctionInfo::getNumUserSGPRs ( ) const

inline

Definition at line 684 of file SIMachineFunctionInfo.h.

Referenced by hasAnyNonFlatUseOfReg().

getOccupancy()

unsigned llvm::SIMachineFunctionInfo::getOccupancy ( ) const

inline

Definition at line 901 of file SIMachineFunctionInfo.h.

Referenced by llvm::GCNScheduleDAGMILive::schedule(), and llvm::GCNIterativeScheduler::scheduleMinReg().

getPreloadedReg()

Register llvm::SIMachineFunctionInfo::getPreloadedReg ( AMDGPUFunctionArgInfo::PreloadedValue  Value ) const

inline

Definition at line 667 of file SIMachineFunctionInfo.h.

References Arg, llvm::AMDGPUFunctionArgInfo::getPreloadedValue(), and Register.

Referenced by buildEpilogReload(), llvm::SIInstrInfo::calculateLDSSpillAddress(), llvm::AMDGPUCallLowering::lowerReturn(), and reservePrivateMemoryRegs().

getPreloadedValue()

std::pair<const ArgDescriptor *, const TargetRegisterClass *> llvm::SIMachineFunctionInfo::getPreloadedValue ( AMDGPUFunctionArgInfo::PreloadedValue  Value ) const

inline

Definition at line 663 of file SIMachineFunctionInfo.h.

References llvm::AMDGPUFunctionArgInfo::getPreloadedValue().

Referenced by llvm::SITargetLowering::isTypeDesirableForOp(), llvm::AMDGPULegalizerInfo::legalizeImplicitArgPtr(), and llvm::AMDGPULegalizerInfo::legalizePreloadedArgIntrin().

getPrivateSegmentWaveByteOffsetSystemSGPR()

unsigned llvm::SIMachineFunctionInfo::getPrivateSegmentWaveByteOffsetSystemSGPR ( ) const

inline

Definition at line 692 of file SIMachineFunctionInfo.h.

References llvm::ArgDescriptor::getRegister(), and llvm::AMDGPUFunctionArgInfo::PrivateSegmentWaveByteOffset.

Referenced by llvm::SITargetLowering::allocateSystemSGPRs().

getPSInputAddr()

unsigned llvm::SIMachineFunctionInfo::getPSInputAddr ( ) const

inline

Definition at line 794 of file SIMachineFunctionInfo.h.

Referenced by getRsrcReg(), llvm::AMDGPUCallLowering::lowerFormalArguments(), and llvm::SITargetLowering::LowerFormalArguments().

getPSInputEnable()

unsigned llvm::SIMachineFunctionInfo::getPSInputEnable ( ) const

inline

Definition at line 798 of file SIMachineFunctionInfo.h.

Referenced by getRsrcReg(), llvm::AMDGPUCallLowering::lowerFormalArguments(), and llvm::SITargetLowering::LowerFormalArguments().

getQueuePtrUserSGPR()

unsigned llvm::SIMachineFunctionInfo::getQueuePtrUserSGPR ( ) const

inline

Definition at line 738 of file SIMachineFunctionInfo.h.

References llvm::ArgDescriptor::getRegister(), and llvm::AMDGPUFunctionArgInfo::QueuePtr.

Referenced by llvm::SITargetLowering::shouldEmitPCReloc().

getScratchRSrcReg()

unsigned llvm::SIMachineFunctionInfo::getScratchRSrcReg ( ) const

inline

Returns the physical register reserved for use as the resource descriptor for scratch accesses.

Definition at line 698 of file SIMachineFunctionInfo.h.

Referenced by buildEpilogReload(), llvm::SIFrameLowering::emitEpilogue(), llvm::SIFrameLowering::emitPrologue(), llvm::SITargetLowering::finalizeLowering(), llvm::SIInstrInfo::getMemOperandWithOffset(), llvm::SIRegisterInfo::getReservedRegs(), isStackPtrRelative(), llvm::SIInstrInfo::loadRegFromStackSlot(), llvm::SITargetLowering::LowerCall(), llvm::AMDGPUCallLowering::lowerFormalArguments(), llvm::SITargetLowering::LowerFormalArguments(), llvm::SIRegisterInfo::restoreSGPR(), llvm::SIRegisterInfo::spillSGPR(), and llvm::SIInstrInfo::storeRegToStackSlot().

getScratchWaveOffsetReg()

unsigned llvm::SIMachineFunctionInfo::getScratchWaveOffsetReg ( ) const

inline

Definition at line 707 of file SIMachineFunctionInfo.h.

Referenced by buildEpilogReload(), llvm::SIRegisterInfo::eliminateFrameIndex(), llvm::SITargetLowering::finalizeLowering(), llvm::SIRegisterInfo::getReservedRegs(), isStackPtrRelative(), llvm::AMDGPUCallLowering::lowerFormalArguments(), llvm::SITargetLowering::LowerFormalArguments(), and llvm::SIRegisterInfo::spillSGPR().

getSGPRSpillVGPRs()

ArrayRef<SGPRSpillVGPRCSR> llvm::SIMachineFunctionInfo::getSGPRSpillVGPRs ( ) const

inline

Definition at line 492 of file SIMachineFunctionInfo.h.

Referenced by llvm::SIFrameLowering::determineCalleeSaves(), llvm::SIFrameLowering::emitEpilogue(), llvm::SIFrameLowering::emitPrologue(), and insertCSRRestores().

getSGPRToVGPRSpills()

ArrayRef<SpilledReg> llvm::SIMachineFunctionInfo::getSGPRToVGPRSpills ( int  FrameIndex ) const

inline

Definition at line 486 of file SIMachineFunctionInfo.h.

References llvm::DenseMapBase< DenseMap< KeyT, ValueT, KeyInfoT, BucketT >, KeyT, ValueT, KeyInfoT, BucketT >::end(), llvm::DenseMapBase< DenseMap< KeyT, ValueT, KeyInfoT, BucketT >, KeyT, ValueT, KeyInfoT, BucketT >::find(), I, and llvm::makeArrayRef().

Referenced by llvm::SIFrameLowering::determineCalleeSaves(), llvm::SIFrameLowering::emitEpilogue(), llvm::SIFrameLowering::emitPrologue(), llvm::SIRegisterInfo::restoreSGPR(), and llvm::SIRegisterInfo::spillSGPR().

getStackPtrOffsetReg()

unsigned llvm::SIMachineFunctionInfo::getStackPtrOffsetReg ( ) const

inline

Definition at line 729 of file SIMachineFunctionInfo.h.

Referenced by buildEpilogReload(), llvm::SIFrameLowering::determineCalleeSavesSGPR(), llvm::SIFrameLowering::eliminateCallFramePseudoInstr(), llvm::SIRegisterInfo::eliminateFrameIndex(), llvm::SIFrameLowering::emitEpilogue(), llvm::SITargetLowering::EmitInstrWithCustomInserter(), llvm::SIFrameLowering::emitPrologue(), llvm::SITargetLowering::finalizeLowering(), llvm::SIRegisterInfo::getFrameRegister(), llvm::SIRegisterInfo::getReservedRegs(), isStackPtrRelative(), llvm::SIInstrInfo::loadRegFromStackSlot(), reservePrivateMemoryRegs(), llvm::SIRegisterInfo::restoreSGPR(), llvm::SIRegisterInfo::spillSGPR(), and llvm::SIInstrInfo::storeRegToStackSlot().

getTIDReg()

unsigned llvm::SIMachineFunctionInfo::getTIDReg ( ) const

inline

Definition at line 521 of file SIMachineFunctionInfo.h.

Referenced by llvm::SIInstrInfo::calculateLDSSpillAddress().

getVGPRSpillAGPRs()

ArrayRef<MCPhysReg> llvm::SIMachineFunctionInfo::getVGPRSpillAGPRs ( ) const

inline

Definition at line 500 of file SIMachineFunctionInfo.h.

Referenced by llvm::SIRegisterInfo::getReservedRegs(), and insertCSRRestores().

getVGPRToAGPRSpill()

MCPhysReg llvm::SIMachineFunctionInfo::getVGPRToAGPRSpill ( int  FrameIndex, unsigned  Lane  ) const

inline

Definition at line 504 of file SIMachineFunctionInfo.h.

References llvm::DenseMapBase< DenseMap< KeyT, ValueT, KeyInfoT, BucketT >, KeyT, ValueT, KeyInfoT, BucketT >::end(), llvm::DenseMapBase< DenseMap< KeyT, ValueT, KeyInfoT, BucketT >, KeyT, ValueT, KeyInfoT, BucketT >::find(), and I.

Referenced by spillVGPRtoAGPR().

getWavesPerEU()

std::pair<unsigned, unsigned> llvm::SIMachineFunctionInfo::getWavesPerEU ( ) const

inline

Returns

A pair of default/requested minimum/maximum number of waves per execution unit.

Definition at line 840 of file SIMachineFunctionInfo.h.

Referenced by llvm::GCNSubtarget::getMaxNumSGPRs(), and llvm::GCNSubtarget::getMaxNumVGPRs().

getWorkGroupIDSGPR()

unsigned llvm::SIMachineFunctionInfo::getWorkGroupIDSGPR ( unsigned  Dim ) const

inline

Returns

SGPR used for Dim's work group ID.

Definition at line 855 of file SIMachineFunctionInfo.h.

References assert(), llvm::ArgDescriptor::getRegister(), llvm_unreachable, llvm::AMDGPUFunctionArgInfo::WorkGroupIDX, llvm::AMDGPUFunctionArgInfo::WorkGroupIDY, and llvm::AMDGPUFunctionArgInfo::WorkGroupIDZ.

hasCalculatedTID()

bool llvm::SIMachineFunctionInfo::hasCalculatedTID ( ) const

inline

Definition at line 520 of file SIMachineFunctionInfo.h.

Referenced by llvm::SIInstrInfo::calculateLDSSpillAddress().

hasDispatchID()

bool llvm::SIMachineFunctionInfo::hasDispatchID ( ) const

inline

Definition at line 606 of file SIMachineFunctionInfo.h.

Referenced by allocateHSAUserSGPRs(), llvm::SITargetLowering::allocateHSAUserSGPRs(), llvm::SITargetLowering::allocateSpecialInputSGPRs(), and llvm::AMDGPUAsmPrinter::doFinalization().

hasDispatchPtr()

bool llvm::SIMachineFunctionInfo::hasDispatchPtr ( ) const

inline

Definition at line 594 of file SIMachineFunctionInfo.h.

Referenced by allocateHSAUserSGPRs(), llvm::SITargetLowering::allocateHSAUserSGPRs(), llvm::SITargetLowering::allocateSpecialInputSGPRs(), llvm::AMDGPUAsmPrinter::doFinalization(), and llvm::SITargetLowering::LowerFormalArguments().

hasFlatScratchInit()

bool llvm::SIMachineFunctionInfo::hasFlatScratchInit ( ) const

inline

Definition at line 610 of file SIMachineFunctionInfo.h.

Referenced by allocateHSAUserSGPRs(), llvm::SITargetLowering::allocateHSAUserSGPRs(), llvm::AMDGPUAsmPrinter::doFinalization(), getLoadExtOrTrunc(), llvm::GCNSubtarget::getReservedNumSGPRs(), getSPDenormModeValue(), hasAnyNonFlatUseOfReg(), and llvm::SITargetLowering::LowerFormalArguments().

hasImplicitArgPtr()

bool llvm::SIMachineFunctionInfo::hasImplicitArgPtr ( ) const

inline

Definition at line 646 of file SIMachineFunctionInfo.h.

Referenced by llvm::SITargetLowering::allocateSpecialInputSGPRs().

hasImplicitBufferPtr()

bool llvm::SIMachineFunctionInfo::hasImplicitBufferPtr ( ) const

inline

Definition at line 650 of file SIMachineFunctionInfo.h.

Referenced by llvm::SITargetLowering::allocateHSAUserSGPRs(), llvm::SIFrameLowering::emitEntryFunctionPrologue(), and llvm::AMDGPUCallLowering::lowerFormalArguments().

hasKernargSegmentPtr()

bool llvm::SIMachineFunctionInfo::hasKernargSegmentPtr ( ) const

inline

Definition at line 602 of file SIMachineFunctionInfo.h.

Referenced by allocateHSAUserSGPRs(), llvm::SITargetLowering::allocateHSAUserSGPRs(), llvm::SITargetLowering::allocateSpecialInputSGPRs(), llvm::AMDGPUAsmPrinter::doFinalization(), and llvm::SITargetLowering::LowerFormalArguments().

hasNonSpillStackObjects()

bool llvm::SIMachineFunctionInfo::hasNonSpillStackObjects ( ) const

inline

Definition at line 762 of file SIMachineFunctionInfo.h.

Referenced by SIMachineFunctionInfo().

hasPrivateSegmentBuffer()

bool llvm::SIMachineFunctionInfo::hasPrivateSegmentBuffer ( ) const

inline

Definition at line 590 of file SIMachineFunctionInfo.h.

Referenced by allocateHSAUserSGPRs(), llvm::SITargetLowering::allocateHSAUserSGPRs(), and llvm::AMDGPUAsmPrinter::doFinalization().

hasPrivateSegmentWaveByteOffset()

bool llvm::SIMachineFunctionInfo::hasPrivateSegmentWaveByteOffset ( ) const

inline

Definition at line 630 of file SIMachineFunctionInfo.h.

Referenced by llvm::SITargetLowering::allocateSystemSGPRs().

hasQueuePtr()

bool llvm::SIMachineFunctionInfo::hasQueuePtr ( ) const

inline

Definition at line 598 of file SIMachineFunctionInfo.h.

Referenced by allocateHSAUserSGPRs(), llvm::SITargetLowering::allocateHSAUserSGPRs(), llvm::SITargetLowering::allocateSpecialInputSGPRs(), and llvm::AMDGPUAsmPrinter::doFinalization().

hasSpilledSGPRs()

bool llvm::SIMachineFunctionInfo::hasSpilledSGPRs ( ) const

inline

Definition at line 746 of file SIMachineFunctionInfo.h.

Referenced by insertCSRRestores().

hasSpilledVGPRs()

bool llvm::SIMachineFunctionInfo::hasSpilledVGPRs ( ) const

inline

Definition at line 754 of file SIMachineFunctionInfo.h.

Referenced by insertCSRRestores().

hasWorkGroupIDX()

bool llvm::SIMachineFunctionInfo::hasWorkGroupIDX ( ) const

inline

Definition at line 614 of file SIMachineFunctionInfo.h.

Referenced by llvm::SITargetLowering::allocateSpecialInputSGPRs(), llvm::SITargetLowering::allocateSystemSGPRs(), hasAnyNonFlatUseOfReg(), and llvm::SITargetLowering::LowerFormalArguments().

hasWorkGroupIDY()

bool llvm::SIMachineFunctionInfo::hasWorkGroupIDY ( ) const

inline

Definition at line 618 of file SIMachineFunctionInfo.h.

Referenced by llvm::SITargetLowering::allocateSpecialInputSGPRs(), llvm::SITargetLowering::allocateSystemSGPRs(), hasAnyNonFlatUseOfReg(), and llvm::SITargetLowering::LowerFormalArguments().

hasWorkGroupIDZ()

bool llvm::SIMachineFunctionInfo::hasWorkGroupIDZ ( ) const

inline

Definition at line 622 of file SIMachineFunctionInfo.h.

Referenced by llvm::SITargetLowering::allocateSpecialInputSGPRs(), llvm::SITargetLowering::allocateSystemSGPRs(), hasAnyNonFlatUseOfReg(), and llvm::SITargetLowering::LowerFormalArguments().

hasWorkGroupInfo()

bool llvm::SIMachineFunctionInfo::hasWorkGroupInfo ( ) const

inline

Definition at line 626 of file SIMachineFunctionInfo.h.

Referenced by llvm::SITargetLowering::allocateSystemSGPRs(), hasAnyNonFlatUseOfReg(), and llvm::SITargetLowering::LowerFormalArguments().

hasWorkItemIDX()

bool llvm::SIMachineFunctionInfo::hasWorkItemIDX ( ) const

inline

Definition at line 634 of file SIMachineFunctionInfo.h.

Referenced by llvm::SITargetLowering::allocateSpecialEntryInputVGPRs(), llvm::SITargetLowering::allocateSpecialInputVGPRs(), and llvm::SITargetLowering::LowerFormalArguments().

hasWorkItemIDY()

bool llvm::SIMachineFunctionInfo::hasWorkItemIDY ( ) const

inline

Definition at line 638 of file SIMachineFunctionInfo.h.

Referenced by llvm::SITargetLowering::allocateSpecialEntryInputVGPRs(), llvm::SITargetLowering::allocateSpecialInputVGPRs(), hasAnyNonFlatUseOfReg(), and llvm::SITargetLowering::LowerFormalArguments().

hasWorkItemIDZ()

bool llvm::SIMachineFunctionInfo::hasWorkItemIDZ ( ) const

inline

Definition at line 642 of file SIMachineFunctionInfo.h.

Referenced by llvm::SITargetLowering::allocateSpecialEntryInputVGPRs(), llvm::SITargetLowering::allocateSpecialInputVGPRs(), hasAnyNonFlatUseOfReg(), and llvm::SITargetLowering::LowerFormalArguments().

haveFreeLanesForSGPRSpill()

bool SIMachineFunctionInfo::haveFreeLanesForSGPRSpill	(	const MachineFunction &	MF,
		unsigned	NumNeed
	)		const

returns true if NumLanes slots are available in VGPRs already used for SGPR spilling.

Definition at line 253 of file SIMachineFunctionInfo.cpp.

References llvm::MachineFunction::getSubtarget(), llvm::AMDGPUSubtarget::getWavefrontSize(), and llvm::ARM_MB::ST.

Referenced by llvm::SIFrameLowering::determineCalleeSaves().

increaseOccupancy()

void llvm::SIMachineFunctionInfo::increaseOccupancy ( const MachineFunction &  MF, unsigned  Limit  )

inline

Definition at line 918 of file SIMachineFunctionInfo.h.

Referenced by llvm::GCNIterativeScheduler::tryMaximizeOccupancy().

initializeBaseYamlFields()

bool SIMachineFunctionInfo::initializeBaseYamlFields

(

const yaml::SIMachineFunctionInfo &

YamlMFI

)

Definition at line 501 of file SIMachineFunctionInfo.cpp.

References llvm::assumeAligned(), llvm::yaml::SIMachineFunctionInfo::ExplicitKernArgSize, llvm::yaml::SIMachineFunctionInfo::HighBitsOf32BitAddress, llvm::yaml::SIMachineFunctionInfo::IsEntryFunction, llvm::yaml::SIMachineFunctionInfo::LDSSize, llvm::yaml::SIMachineFunctionInfo::MaxKernArgAlign, llvm::yaml::SIMachineFunctionInfo::MemoryBound, llvm::yaml::SIMachineFunctionInfo::NoSignedZerosFPMath, and llvm::yaml::SIMachineFunctionInfo::WaveLimiter.

Referenced by llvm::GCNTargetMachine::parseMachineFunctionInfo().

isPSInputAllocated()

bool llvm::SIMachineFunctionInfo::isPSInputAllocated ( unsigned  Index ) const

inline

Definition at line 802 of file SIMachineFunctionInfo.h.

Referenced by llvm::AMDGPUCallLowering::lowerFormalArguments(), llvm::SITargetLowering::LowerFormalArguments(), and processShaderInputArgs().

isStackRealigned()

bool llvm::SIMachineFunctionInfo::isStackRealigned ( ) const

inline

Definition at line 770 of file SIMachineFunctionInfo.h.

Referenced by llvm::SIFrameLowering::emitEpilogue(), and hasAnyNonFlatUseOfReg().

limitOccupancy() [1/2]

void SIMachineFunctionInfo::limitOccupancy

(

const MachineFunction &

MF

)

Definition at line 181 of file SIMachineFunctionInfo.cpp.

References llvm::MachineFunction::getFunction(), llvm::AMDGPUMachineFunction::getLDSSize(), getMaxWavesPerEU(), llvm::AMDGPUSubtarget::getOccupancyWithLocalMemSize(), llvm::MachineFunction::getSubtarget(), and llvm::ARM_MB::ST.

Referenced by llvm::SITargetLowering::finalizeLowering(), and llvm::GCNScheduleDAGMILive::schedule().

limitOccupancy() [2/2]

void llvm::SIMachineFunctionInfo::limitOccupancy ( unsigned  Limit )

inline

Definition at line 913 of file SIMachineFunctionInfo.h.

markPSInputAllocated()

void llvm::SIMachineFunctionInfo::markPSInputAllocated ( unsigned  Index )

inline

Definition at line 806 of file SIMachineFunctionInfo.h.

Referenced by llvm::AMDGPUCallLowering::lowerFormalArguments(), llvm::SITargetLowering::LowerFormalArguments(), and processShaderInputArgs().

markPSInputEnabled()

void llvm::SIMachineFunctionInfo::markPSInputEnabled ( unsigned  Index )

inline

Definition at line 810 of file SIMachineFunctionInfo.h.

Referenced by llvm::AMDGPUCallLowering::lowerFormalArguments(), llvm::SITargetLowering::LowerFormalArguments(), and processShaderInputArgs().

removeDeadFrameIndices()

void SIMachineFunctionInfo::removeDeadFrameIndices

(

MachineFrameInfo &

MFI

)

Definition at line 389 of file SIMachineFunctionInfo.cpp.

References assert(), llvm::TargetStackID::Default, llvm::numbers::e, FramePointerSaveIndex, llvm::MachineFrameInfo::getObjectIndexBegin(), llvm::MachineFrameInfo::getObjectIndexEnd(), llvm::MachineFrameInfo::RemoveStackObject(), and llvm::MachineFrameInfo::setStackID().

Referenced by llvm::SIFrameLowering::processFunctionBeforeFrameFinalized().

ReserveWWMRegister()

void llvm::SIMachineFunctionInfo::ReserveWWMRegister ( unsigned  reg )

inline

Definition at line 455 of file SIMachineFunctionInfo.h.

References llvm::SparseBitVector< ElementSize >::set().

Referenced by llvm::createSIPreAllocateWWMRegsPass().

returnsVoid()

bool llvm::SIMachineFunctionInfo::returnsVoid ( ) const

inline

Definition at line 814 of file SIMachineFunctionInfo.h.

Referenced by llvm::SIInstrInfo::insertReturn(), llvm::AMDGPUCallLowering::lowerReturn(), and llvm::SITargetLowering::LowerReturn().

setBytesInStackArgArea()

void llvm::SIMachineFunctionInfo::setBytesInStackArgArea ( unsigned  Bytes )

inline

Definition at line 528 of file SIMachineFunctionInfo.h.

References TRI.

Referenced by llvm::SITargetLowering::LowerFormalArguments().

setFrameOffsetReg()

void llvm::SIMachineFunctionInfo::setFrameOffsetReg ( unsigned  Reg )

inline

Definition at line 715 of file SIMachineFunctionInfo.h.

References assert(), and Reg.

Referenced by buildEpilogReload(), and reservePrivateMemoryRegs().

setHasNonSpillStackObjects()

void llvm::SIMachineFunctionInfo::setHasNonSpillStackObjects ( bool  StackObject = true )

inline

Definition at line 766 of file SIMachineFunctionInfo.h.

Referenced by reservePrivateMemoryRegs().

setHasSpilledSGPRs()

void llvm::SIMachineFunctionInfo::setHasSpilledSGPRs ( bool  Spill = true )

inline

Definition at line 750 of file SIMachineFunctionInfo.h.

Referenced by llvm::SIInstrInfo::loadRegFromStackSlot(), and llvm::SIInstrInfo::storeRegToStackSlot().

setHasSpilledVGPRs()

void llvm::SIMachineFunctionInfo::setHasSpilledVGPRs ( bool  Spill = true )

inline

Definition at line 758 of file SIMachineFunctionInfo.h.

Referenced by llvm::SIInstrInfo::storeRegToStackSlot().

setIfReturnsVoid()

void llvm::SIMachineFunctionInfo::setIfReturnsVoid ( bool  Value )

inline

Definition at line 818 of file SIMachineFunctionInfo.h.

Referenced by llvm::AMDGPUCallLowering::lowerReturn(), and llvm::SITargetLowering::LowerReturn().

setIsStackRealigned()

void llvm::SIMachineFunctionInfo::setIsStackRealigned ( bool  Realigned = true )

inline

Definition at line 774 of file SIMachineFunctionInfo.h.

Referenced by llvm::SIFrameLowering::emitPrologue().

setPrivateSegmentWaveByteOffset()

void llvm::SIMachineFunctionInfo::setPrivateSegmentWaveByteOffset ( unsigned  Reg )

inline

Definition at line 586 of file SIMachineFunctionInfo.h.

References llvm::ArgDescriptor::createRegister(), and llvm::AMDGPUFunctionArgInfo::PrivateSegmentWaveByteOffset.

Referenced by llvm::SITargetLowering::allocateSystemSGPRs().

setScratchRSrcReg()

void llvm::SIMachineFunctionInfo::setScratchRSrcReg ( unsigned  Reg )

inline

Definition at line 702 of file SIMachineFunctionInfo.h.

References assert(), and Reg.

Referenced by buildEpilogReload(), and reservePrivateMemoryRegs().

setScratchWaveOffsetReg()

void llvm::SIMachineFunctionInfo::setScratchWaveOffsetReg ( unsigned  Reg )

inline

Definition at line 733 of file SIMachineFunctionInfo.h.

References assert(), and Reg.

Referenced by buildEpilogReload(), and reservePrivateMemoryRegs().

setStackPtrOffsetReg()

void llvm::SIMachineFunctionInfo::setStackPtrOffsetReg ( unsigned  Reg )

inline

Definition at line 720 of file SIMachineFunctionInfo.h.

References assert(), and Reg.

Referenced by buildEpilogReload(), and reservePrivateMemoryRegs().

setTIDReg()

void llvm::SIMachineFunctionInfo::setTIDReg ( unsigned  Reg )

inline

Definition at line 522 of file SIMachineFunctionInfo.h.

References Reg.

Referenced by llvm::SIInstrInfo::calculateLDSSpillAddress().

setWorkItemIDX()

void llvm::SIMachineFunctionInfo::setWorkItemIDX ( ArgDescriptor  Arg )

inline

Definition at line 567 of file SIMachineFunctionInfo.h.

References Arg, and llvm::AMDGPUFunctionArgInfo::WorkItemIDX.

Referenced by llvm::SITargetLowering::allocateSpecialEntryInputVGPRs(), and llvm::SITargetLowering::allocateSpecialInputVGPRs().

setWorkItemIDY()

void llvm::SIMachineFunctionInfo::setWorkItemIDY ( ArgDescriptor  Arg )

inline

Definition at line 571 of file SIMachineFunctionInfo.h.

References Arg, and llvm::AMDGPUFunctionArgInfo::WorkItemIDY.

Referenced by llvm::SITargetLowering::allocateSpecialEntryInputVGPRs(), and llvm::SITargetLowering::allocateSpecialInputVGPRs().

setWorkItemIDZ()

void llvm::SIMachineFunctionInfo::setWorkItemIDZ ( ArgDescriptor  Arg )

inline

Definition at line 575 of file SIMachineFunctionInfo.h.

References Arg, and llvm::AMDGPUFunctionArgInfo::WorkItemIDZ.

Referenced by llvm::SITargetLowering::allocateSpecialEntryInputVGPRs(), and llvm::SITargetLowering::allocateSpecialInputVGPRs().

Friends And Related Function Documentation

GCNTargetMachine

friend class GCNTargetMachine

friend

Definition at line 316 of file SIMachineFunctionInfo.h.

Member Data Documentation

FramePointerSaveIndex

Optional<int> llvm::SIMachineFunctionInfo::FramePointerSaveIndex

Definition at line 479 of file SIMachineFunctionInfo.h.

Referenced by llvm::SIFrameLowering::determineCalleeSaves(), llvm::SIFrameLowering::emitEpilogue(), llvm::SIFrameLowering::emitPrologue(), and removeDeadFrameIndices().

SGPRForFPSaveRestoreCopy

unsigned llvm::SIMachineFunctionInfo::SGPRForFPSaveRestoreCopy = 0

If this is set, an SGPR used for save/restore of the register used for the frame pointer.

Definition at line 478 of file SIMachineFunctionInfo.h.

Referenced by llvm::SIFrameLowering::assignCalleeSavedSpillSlots(), llvm::SIFrameLowering::determineCalleeSaves(), llvm::SIFrameLowering::emitEpilogue(), and llvm::SIFrameLowering::emitPrologue().

WWMReservedRegs

SparseBitVector llvm::SIMachineFunctionInfo::WWMReservedRegs

Definition at line 453 of file SIMachineFunctionInfo.h.

Referenced by llvm::SIRegisterInfo::getReservedRegs().

---

The documentation for this class was generated from the following files:

• lib/Target/AMDGPU/SIMachineFunctionInfo.h
• lib/Target/AMDGPU/SIMachineFunctionInfo.cpp