llvm::SIMachineFunctionInfo Class Reference

This class keeps track of the SPI_SP_INPUT_ADDR config register, which tells the hardware which interpolation parameters to load. More...

#include "Target/AMDGPU/SIMachineFunctionInfo.h"

Inheritance diagram for llvm::SIMachineFunctionInfo:

Classes
struct	VGPRSpillToAGPR

Public Member Functions
Register	getVGPRForAGPRCopy () const
void	setVGPRForAGPRCopy (Register NewVGPRForAGPRCopy)
bool	isCalleeSavedReg (const MCPhysReg *CSRegs, MCPhysReg Reg) const
	SIMachineFunctionInfo (const SIMachineFunctionInfo &MFI)=default
	SIMachineFunctionInfo (const Function &F, const GCNSubtarget *STI)
MachineFunctionInfo *	clone (BumpPtrAllocator &Allocator, MachineFunction &DestMF, const DenseMap< MachineBasicBlock *, MachineBasicBlock * > &Src2DstMBB) const override
	Make a functionally equivalent copy of this MachineFunctionInfo in MF.
bool	initializeBaseYamlFields (const yaml::SIMachineFunctionInfo &YamlMFI, const MachineFunction &MF, PerFunctionMIParsingState &PFS, SMDiagnostic &Error, SMRange &SourceRange)
void	reserveWWMRegister (Register Reg)
SIModeRegisterDefaults	getMode () const
ArrayRef< SIRegisterInfo::SpilledReg >	getSGPRSpillToVirtualVGPRLanes (int FrameIndex) const
ArrayRef< Register >	getSGPRSpillVGPRs () const
const WWMSpillsMap &	getWWMSpills () const
const ReservedRegSet &	getWWMReservedRegs () const
const PrologEpilogSGPRSpillsMap &	getPrologEpilogSGPRSpills () const
GCNUserSGPRUsageInfo &	getUserSGPRInfo ()
const GCNUserSGPRUsageInfo &	getUserSGPRInfo () const
void	addToPrologEpilogSGPRSpills (Register Reg, PrologEpilogSGPRSaveRestoreInfo SI)
bool	hasPrologEpilogSGPRSpillEntry (Register Reg) const
Register	getScratchSGPRCopyDstReg (Register Reg) const
void	getAllScratchSGPRCopyDstRegs (SmallVectorImpl< Register > &Regs) const
bool	checkIndexInPrologEpilogSGPRSpills (int FI) const
const PrologEpilogSGPRSaveRestoreInfo &	getPrologEpilogSGPRSaveRestoreInfo (Register Reg) const
ArrayRef< SIRegisterInfo::SpilledReg >	getSGPRSpillToPhysicalVGPRLanes (int FrameIndex) const
void	setFlag (Register Reg, uint8_t Flag)
bool	checkFlag (Register Reg, uint8_t Flag) const
bool	hasVRegFlags ()
void	allocateWWMSpill (MachineFunction &MF, Register VGPR, uint64_t Size=4, Align Alignment=Align(4))
void	splitWWMSpillRegisters (MachineFunction &MF, SmallVectorImpl< std::pair< Register, int > > &CalleeSavedRegs, SmallVectorImpl< std::pair< Register, int > > &ScratchRegs) const
ArrayRef< MCPhysReg >	getAGPRSpillVGPRs () const
Register	getSGPRForEXECCopy () const
void	setSGPRForEXECCopy (Register Reg)
ArrayRef< MCPhysReg >	getVGPRSpillAGPRs () const
MCPhysReg	getVGPRToAGPRSpill (int FrameIndex, unsigned Lane) const
void	setVGPRToAGPRSpillDead (int FrameIndex)
bool	allocateSGPRSpillToVGPRLane (MachineFunction &MF, int FI, bool IsPrologEpilog=false)
bool	allocateVGPRSpillToAGPR (MachineFunction &MF, int FI, bool isAGPRtoVGPR)
	Reserve AGPRs or VGPRs to support spilling for FrameIndex FI.
bool	removeDeadFrameIndices (MachineFrameInfo &MFI, bool ResetSGPRSpillStackIDs)
	If ResetSGPRSpillStackIDs is true, reset the stack ID from sgpr-spill to the default stack.
int	getScavengeFI (MachineFrameInfo &MFI, const SIRegisterInfo &TRI)
std::optional< int >	getOptionalScavengeFI () const
unsigned	getBytesInStackArgArea () const
void	setBytesInStackArgArea (unsigned Bytes)
Register	addPrivateSegmentBuffer (const SIRegisterInfo &TRI)
Register	addDispatchPtr (const SIRegisterInfo &TRI)
Register	addQueuePtr (const SIRegisterInfo &TRI)
Register	addKernargSegmentPtr (const SIRegisterInfo &TRI)
Register	addDispatchID (const SIRegisterInfo &TRI)
Register	addFlatScratchInit (const SIRegisterInfo &TRI)
Register	addImplicitBufferPtr (const SIRegisterInfo &TRI)
Register	addLDSKernelId ()
SmallVectorImpl< MCRegister > *	addPreloadedKernArg (const SIRegisterInfo &TRI, const TargetRegisterClass *RC, unsigned AllocSizeDWord, int KernArgIdx, int PaddingSGPRs)
Register	addReservedUserSGPR ()
	Increment user SGPRs used for padding the argument list only.
Register	addWorkGroupIDX (bool HasArchitectedSGPRs)
Register	addWorkGroupIDY (bool HasArchitectedSGPRs)
Register	addWorkGroupIDZ (bool HasArchitectedSGPRs)
Register	addWorkGroupInfo ()
bool	hasLDSKernelId () const
void	setWorkItemIDX (ArgDescriptor Arg)
void	setWorkItemIDY (ArgDescriptor Arg)
void	setWorkItemIDZ (ArgDescriptor Arg)
Register	addPrivateSegmentWaveByteOffset ()
void	setPrivateSegmentWaveByteOffset (Register Reg)
bool	hasWorkGroupIDX () const
bool	hasWorkGroupIDY () const
bool	hasWorkGroupIDZ () const
bool	hasWorkGroupInfo () const
bool	hasPrivateSegmentWaveByteOffset () const
bool	hasWorkItemIDX () const
bool	hasWorkItemIDY () const
bool	hasWorkItemIDZ () const
bool	hasImplicitArgPtr () const
AMDGPUFunctionArgInfo &	getArgInfo ()
const AMDGPUFunctionArgInfo &	getArgInfo () const
std::tuple< const ArgDescriptor *, const TargetRegisterClass *, LLT >	getPreloadedValue (AMDGPUFunctionArgInfo::PreloadedValue Value) const
MCRegister	getPreloadedReg (AMDGPUFunctionArgInfo::PreloadedValue Value) const
unsigned	getGITPtrHigh () const
Register	getGITPtrLoReg (const MachineFunction &MF) const
uint32_t	get32BitAddressHighBits () const
unsigned	getNumUserSGPRs () const
unsigned	getNumPreloadedSGPRs () const
unsigned	getNumKernargPreloadedSGPRs () const
Register	getPrivateSegmentWaveByteOffsetSystemSGPR () const
Register	getScratchRSrcReg () const
	Returns the physical register reserved for use as the resource descriptor for scratch accesses.
void	setScratchRSrcReg (Register Reg)
Register	getFrameOffsetReg () const
void	setFrameOffsetReg (Register Reg)
void	setStackPtrOffsetReg (Register Reg)
void	setLongBranchReservedReg (Register Reg)
Register	getStackPtrOffsetReg () const
Register	getLongBranchReservedReg () const
Register	getQueuePtrUserSGPR () const
Register	getImplicitBufferPtrUserSGPR () const
bool	hasSpilledSGPRs () const
void	setHasSpilledSGPRs (bool Spill=true)
bool	hasSpilledVGPRs () const
void	setHasSpilledVGPRs (bool Spill=true)
bool	hasNonSpillStackObjects () const
void	setHasNonSpillStackObjects (bool StackObject=true)
bool	isStackRealigned () const
void	setIsStackRealigned (bool Realigned=true)
unsigned	getNumSpilledSGPRs () const
unsigned	getNumSpilledVGPRs () const
void	addToSpilledSGPRs (unsigned num)
void	addToSpilledVGPRs (unsigned num)
unsigned	getPSInputAddr () const
unsigned	getPSInputEnable () const
bool	isPSInputAllocated (unsigned Index) const
void	markPSInputAllocated (unsigned Index)
void	markPSInputEnabled (unsigned Index)
bool	returnsVoid () const
void	setIfReturnsVoid (bool Value)
std::pair< unsigned, unsigned >	getFlatWorkGroupSizes () const
unsigned	getMinFlatWorkGroupSize () const
unsigned	getMaxFlatWorkGroupSize () const
std::pair< unsigned, unsigned >	getWavesPerEU () const
unsigned	getMinWavesPerEU () const
unsigned	getMaxWavesPerEU () const
Register	getWorkGroupIDSGPR (unsigned Dim) const
const AMDGPUGWSResourcePseudoSourceValue *	getGWSPSV (const AMDGPUTargetMachine &TM)
unsigned	getOccupancy () const
unsigned	getMinAllowedOccupancy () const
void	limitOccupancy (const MachineFunction &MF)
void	limitOccupancy (unsigned Limit)
void	increaseOccupancy (const MachineFunction &MF, unsigned Limit)
bool	mayNeedAGPRs () const
bool	mayUseAGPRs (const Function &F) const
bool	usesAGPRs (const MachineFunction &MF) const
Public Member Functions inherited from llvm::AMDGPUMachineFunction
	AMDGPUMachineFunction (const Function &F, const AMDGPUSubtarget &ST)
uint64_t	getExplicitKernArgSize () const
Align	getMaxKernArgAlign () const
uint32_t	getLDSSize () const
uint32_t	getGDSSize () const
bool	isEntryFunction () const
bool	isModuleEntryFunction () const
bool	isChainFunction () const
bool	hasNoSignedZerosFPMath () const
bool	isMemoryBound () const
bool	needsWaveLimiter () const
unsigned	allocateLDSGlobal (const DataLayout &DL, const GlobalVariable &GV)
unsigned	allocateLDSGlobal (const DataLayout &DL, const GlobalVariable &GV, Align Trailing)
Align	getDynLDSAlign () const
void	setDynLDSAlign (const Function &F, const GlobalVariable &GV)
Public Member Functions inherited from llvm::MachineFunctionInfo
virtual	~MachineFunctionInfo ()
virtual MachineFunctionInfo *	clone (BumpPtrAllocator &Allocator, MachineFunction &DestMF, const DenseMap< MachineBasicBlock *, MachineBasicBlock * > &Src2DstMBB) const
	Make a functionally equivalent copy of this MachineFunctionInfo in MF.

Friends
class	GCNTargetMachine

Additional Inherited Members
Static Public Member Functions inherited from llvm::AMDGPUMachineFunction
static std::optional< uint32_t >	getLDSKernelIdMetadata (const Function &F)
static std::optional< uint32_t >	getLDSAbsoluteAddress (const GlobalValue &GV)
Static Public Member Functions inherited from llvm::MachineFunctionInfo
template<typename FuncInfoTy , typename SubtargetTy = TargetSubtargetInfo>
static FuncInfoTy *	create (BumpPtrAllocator &Allocator, const Function &F, const SubtargetTy *STI)
	Factory function: default behavior is to call new using the supplied allocator.
template<typename Ty >
static Ty *	create (BumpPtrAllocator &Allocator, const Ty &MFI)
Protected Attributes inherited from llvm::AMDGPUMachineFunction
uint64_t	ExplicitKernArgSize = 0
Align	MaxKernArgAlign
uint32_t	LDSSize = 0
	Number of bytes in the LDS that are being used.
uint32_t	GDSSize = 0
uint32_t	StaticLDSSize = 0
	Number of bytes in the LDS allocated statically.
uint32_t	StaticGDSSize = 0
Align	DynLDSAlign
	Align for dynamic shared memory if any.
bool	IsEntryFunction = false
bool	IsModuleEntryFunction = false
bool	IsChainFunction = false
bool	NoSignedZerosFPMath = false
bool	MemoryBound = false
bool	WaveLimiter = false

Detailed Description

This class keeps track of the SPI_SP_INPUT_ADDR config register, which tells the hardware which interpolation parameters to load.

Definition at line 375 of file SIMachineFunctionInfo.h.

Constructor & Destructor Documentation

SIMachineFunctionInfo() [1/2]

llvm::SIMachineFunctionInfo::SIMachineFunctionInfo ( const SIMachineFunctionInfo &  MFI )

default

SIMachineFunctionInfo() [2/2]

SIMachineFunctionInfo::SIMachineFunctionInfo	(	const Function &	F,
		const GCNSubtarget *	STI
	)

Definition at line 38 of file SIMachineFunctionInfo.cpp.

References A, llvm::CallingConv::AMDGPU_CS, llvm::CallingConv::AMDGPU_Gfx, llvm::CallingConv::AMDGPU_GS, llvm::CallingConv::AMDGPU_HS, llvm::CallingConv::AMDGPU_KERNEL, llvm::CallingConv::AMDGPU_PS, CC, llvm::StringRef::consumeInteger(), llvm::ArgDescriptor::createRegister(), llvm::StringRef::empty(), F, llvm::AMDGPUArgumentUsageInfo::FixedABIFunctionInfo, llvm::AMDGPU::getInitialPSInputAddr(), llvm::AMDGPUMachineFunction::getLDSSize(), llvm::AMDGPUSubtarget::GFX9, llvm::AMDGPU::isChainCC(), llvm::AMDGPUMachineFunction::isEntryFunction(), llvm::AMDGPU::isGraphics(), llvm::AMDGPUMachineFunction::MaxKernArgAlign, mayUseAGPRs(), and llvm::CallingConv::SPIR_KERNEL.

Member Function Documentation

addDispatchID()

Register SIMachineFunctionInfo::addDispatchID

(

const SIRegisterInfo &

TRI

)

Definition at line 219 of file SIMachineFunctionInfo.cpp.

References llvm::ArgDescriptor::createRegister(), and TRI.

addDispatchPtr()

Register SIMachineFunctionInfo::addDispatchPtr

(

const SIRegisterInfo &

TRI

)

Definition at line 197 of file SIMachineFunctionInfo.cpp.

References llvm::ArgDescriptor::createRegister(), and TRI.

addFlatScratchInit()

Register SIMachineFunctionInfo::addFlatScratchInit

(

const SIRegisterInfo &

TRI

)

Definition at line 226 of file SIMachineFunctionInfo.cpp.

References llvm::ArgDescriptor::createRegister(), and TRI.

addImplicitBufferPtr()

Register SIMachineFunctionInfo::addImplicitBufferPtr

(

const SIRegisterInfo &

TRI

)

Definition at line 233 of file SIMachineFunctionInfo.cpp.

References llvm::ArgDescriptor::createRegister(), and TRI.

addKernargSegmentPtr()

Register SIMachineFunctionInfo::addKernargSegmentPtr

(

const SIRegisterInfo &

TRI

)

Definition at line 211 of file SIMachineFunctionInfo.cpp.

References llvm::ArgDescriptor::createRegister(), and TRI.

addLDSKernelId()

Register SIMachineFunctionInfo::addLDSKernelId

(

)

Definition at line 240 of file SIMachineFunctionInfo.cpp.

References llvm::ArgDescriptor::createRegister().

addPreloadedKernArg()

SmallVectorImpl< MCRegister > * SIMachineFunctionInfo::addPreloadedKernArg	(	const SIRegisterInfo &	TRI,
		const TargetRegisterClass *	RC,
		unsigned	AllocSizeDWord,
		int	KernArgIdx,
		int	PaddingSGPRs
	)

Definition at line 246 of file SIMachineFunctionInfo.cpp.

References llvm::GCNUserSGPRUsageInfo::allocKernargPreloadSGPRs(), assert(), I, and TRI.

addPrivateSegmentBuffer()

Register SIMachineFunctionInfo::addPrivateSegmentBuffer

(

const SIRegisterInfo &

TRI

)

Definition at line 188 of file SIMachineFunctionInfo.cpp.

References llvm::ArgDescriptor::createRegister(), and TRI.

addPrivateSegmentWaveByteOffset()

Register llvm::SIMachineFunctionInfo::addPrivateSegmentWaveByteOffset ( )

inline

Definition at line 799 of file SIMachineFunctionInfo.h.

References llvm::ArgDescriptor::createRegister().

addQueuePtr()

Register SIMachineFunctionInfo::addQueuePtr

(

const SIRegisterInfo &

TRI

)

Definition at line 204 of file SIMachineFunctionInfo.cpp.

References llvm::ArgDescriptor::createRegister(), and TRI.

addReservedUserSGPR()

Register llvm::SIMachineFunctionInfo::addReservedUserSGPR ( )

inline

Increment user SGPRs used for padding the argument list only.

Definition at line 739 of file SIMachineFunctionInfo.h.

addToPrologEpilogSGPRSpills()

void llvm::SIMachineFunctionInfo::addToPrologEpilogSGPRSpills ( Register  Reg, PrologEpilogSGPRSaveRestoreInfo  SI  )

inline

Definition at line 601 of file SIMachineFunctionInfo.h.

References llvm::DenseMapBase< DerivedT, KeyT, ValueT, KeyInfoT, BucketT >::insert(), and Reg.

Referenced by getVGPRSpillLaneOrTempRegister().

addToSpilledSGPRs()

void llvm::SIMachineFunctionInfo::addToSpilledSGPRs ( unsigned  num )

inline

Definition at line 975 of file SIMachineFunctionInfo.h.

Referenced by llvm::SIRegisterInfo::spillEmergencySGPR(), and llvm::SIRegisterInfo::spillSGPR().

addToSpilledVGPRs()

void llvm::SIMachineFunctionInfo::addToSpilledVGPRs ( unsigned  num )

inline

Definition at line 979 of file SIMachineFunctionInfo.h.

Referenced by llvm::SIRegisterInfo::buildVGPRSpillLoadStore(), and llvm::SIRegisterInfo::eliminateFrameIndex().

addWorkGroupIDX()

Register llvm::SIMachineFunctionInfo::addWorkGroupIDX ( bool  HasArchitectedSGPRs )

inline

Definition at line 746 of file SIMachineFunctionInfo.h.

References llvm::ArgDescriptor::createRegister(), and Reg.

addWorkGroupIDY()

Register llvm::SIMachineFunctionInfo::addWorkGroupIDY ( bool  HasArchitectedSGPRs )

inline

Definition at line 756 of file SIMachineFunctionInfo.h.

References llvm::ArgDescriptor::createRegister(), hasWorkGroupIDZ(), and Reg.

addWorkGroupIDZ()

Register llvm::SIMachineFunctionInfo::addWorkGroupIDZ ( bool  HasArchitectedSGPRs )

inline

Definition at line 767 of file SIMachineFunctionInfo.h.

References llvm::ArgDescriptor::createRegister(), and Reg.

addWorkGroupInfo()

Register llvm::SIMachineFunctionInfo::addWorkGroupInfo ( )

inline

Definition at line 778 of file SIMachineFunctionInfo.h.

References llvm::ArgDescriptor::createRegister().

allocateSGPRSpillToVGPRLane()

bool SIMachineFunctionInfo::allocateSGPRSpillToVGPRLane	(	MachineFunction &	MF,
		int	FI,
		bool	IsPrologEpilog = false
	)

Definition at line 361 of file SIMachineFunctionInfo.cpp.

References assert(), llvm::MachineFunction::getFrameInfo(), llvm::MachineFunction::getSubtarget(), I, and Size.

Referenced by getVGPRSpillLaneOrTempRegister().

allocateVGPRSpillToAGPR()

bool SIMachineFunctionInfo::allocateVGPRSpillToAGPR	(	MachineFunction &	MF,
		int	FI,
		bool	isAGPRtoVGPR
	)

Reserve AGPRs or VGPRs to support spilling for FrameIndex FI.

Either AGPR is spilled to VGPR to vice versa. Returns true if a FI can be eliminated completely.

Definition at line 407 of file SIMachineFunctionInfo.cpp.

References assert(), llvm::SmallVectorTemplateCommon< T, typename >::end(), llvm::Function::getCallingConv(), llvm::MachineFunction::getFrameInfo(), llvm::MachineFunction::getFunction(), llvm::MachineFrameInfo::getObjectSize(), llvm::MachineFunction::getRegInfo(), llvm::TargetRegisterClass::getRegisters(), llvm::MachineFunction::getSubtarget(), I, llvm::MachineFrameInfo::isSpillSlotObjectIndex(), MRI, llvm::BitVector::push_back(), llvm::BitVector::resize(), llvm::BitVector::set(), llvm::BitVector::setBitsInMask(), Size, and TRI.

Referenced by llvm::SIFrameLowering::processFunctionBeforeFrameFinalized().

allocateWWMSpill()

void SIMachineFunctionInfo::allocateWWMSpill	(	MachineFunction &	MF,
		Register	VGPR,
		uint64_t	Size = 4,
		Align	Alignment = Align(4)
	)

Definition at line 273 of file SIMachineFunctionInfo.cpp.

References llvm::MapVector< KeyT, ValueT, MapType, VectorType >::count(), llvm::MachineFrameInfo::CreateSpillStackObject(), llvm::MachineFunction::getFrameInfo(), llvm::MapVector< KeyT, ValueT, MapType, VectorType >::insert(), llvm::AMDGPUMachineFunction::isChainFunction(), llvm::SIRegisterInfo::isChainScratchRegister(), llvm::AMDGPUMachineFunction::isEntryFunction(), and Size.

Referenced by llvm::SIFrameLowering::determineCalleeSaves(), and llvm::SIFrameLowering::processFunctionBeforeFrameFinalized().

checkFlag()

bool llvm::SIMachineFunctionInfo::checkFlag ( Register  Reg, uint8_t  Flag  ) const

inline

Definition at line 663 of file SIMachineFunctionInfo.h.

References Reg.

Referenced by llvm::SIInstrInfo::getLiveRangeSplitOpcode(), getVectorRegSpillRestoreOpcode(), and getVectorRegSpillSaveOpcode().

checkIndexInPrologEpilogSGPRSpills()

bool llvm::SIMachineFunctionInfo::checkIndexInPrologEpilogSGPRSpills ( int  FI ) const

inline

Definition at line 631 of file SIMachineFunctionInfo.h.

References llvm::DenseMapBase< DerivedT, KeyT, ValueT, KeyInfoT, BucketT >::end(), llvm::find_if(), and llvm::SPILL_TO_VGPR_LANE.

Referenced by allSGPRSpillsAreDead(), and removeDeadFrameIndices().

clone()

MachineFunctionInfo * SIMachineFunctionInfo::clone ( BumpPtrAllocator &  Allocator, MachineFunction &  DestMF, const DenseMap< MachineBasicBlock *, MachineBasicBlock * > &  Src2DstMBB  ) const

overridevirtual

Make a functionally equivalent copy of this MachineFunctionInfo in MF.

This requires remapping MachineBasicBlock references from the original parent to values in the new function. Targets may assume that virtual register and frame index values are preserved in the new function.

Reimplemented from llvm::MachineFunctionInfo.

Definition at line 174 of file SIMachineFunctionInfo.cpp.

References llvm::MachineFunction::cloneInfo().

get32BitAddressHighBits()

uint32_t llvm::SIMachineFunctionInfo::get32BitAddressHighBits ( ) const

inline

Definition at line 870 of file SIMachineFunctionInfo.h.

getAGPRSpillVGPRs()

ArrayRef< MCPhysReg > llvm::SIMachineFunctionInfo::getAGPRSpillVGPRs ( ) const

inline

Definition at line 680 of file SIMachineFunctionInfo.h.

Referenced by llvm::SIRegisterInfo::getReservedRegs(), and llvm::SIFrameLowering::processFunctionBeforeFrameFinalized().

getAllScratchSGPRCopyDstRegs()

void llvm::SIMachineFunctionInfo::getAllScratchSGPRCopyDstRegs ( SmallVectorImpl< Register > &  Regs ) const

inline

Definition at line 623 of file SIMachineFunctionInfo.h.

References llvm::COPY_TO_SCRATCH_SGPR, and llvm::SmallVectorTemplateBase< T, bool >::push_back().

Referenced by llvm::SIFrameLowering::emitCSRSpillStores().

getArgInfo() [1/2]

AMDGPUFunctionArgInfo & llvm::SIMachineFunctionInfo::getArgInfo ( )

inline

Definition at line 846 of file SIMachineFunctionInfo.h.

Referenced by llvm::AMDGPUCallLowering::passSpecialInputs().

getArgInfo() [2/2]

const AMDGPUFunctionArgInfo & llvm::SIMachineFunctionInfo::getArgInfo ( ) const

inline

Definition at line 850 of file SIMachineFunctionInfo.h.

getBytesInStackArgArea()

unsigned llvm::SIMachineFunctionInfo::getBytesInStackArgArea ( ) const

inline

Definition at line 716 of file SIMachineFunctionInfo.h.

Referenced by llvm::AMDGPUCallLowering::areCalleeOutgoingArgsTailCallable(), and llvm::SITargetLowering::isEligibleForTailCallOptimization().

getFlatWorkGroupSizes()

std::pair< unsigned, unsigned > llvm::SIMachineFunctionInfo::getFlatWorkGroupSizes ( ) const

inline

Returns

A pair of default/requested minimum/maximum flat work group sizes for this function.

Definition at line 1013 of file SIMachineFunctionInfo.h.

getFrameOffsetReg()

Register llvm::SIMachineFunctionInfo::getFrameOffsetReg ( ) const

inline

Definition at line 901 of file SIMachineFunctionInfo.h.

Referenced by llvm::SIFrameLowering::assignCalleeSavedSpillSlots(), llvm::SIFrameLowering::determineCalleeSavesSGPR(), llvm::SIFrameLowering::determinePrologEpilogSGPRSaves(), llvm::SIFrameLowering::emitCSRSpillRestores(), llvm::SIFrameLowering::emitCSRSpillStores(), llvm::SIFrameLowering::emitEntryFunctionPrologue(), llvm::SIFrameLowering::emitEpilogue(), llvm::SIFrameLowering::emitPrologue(), llvm::SIRegisterInfo::getFrameRegister(), llvm::SIRegisterInfo::getReservedRegs(), and llvm::SIRegisterInfo::spillSGPR().

getGITPtrHigh()

unsigned llvm::SIMachineFunctionInfo::getGITPtrHigh ( ) const

inline

Definition at line 864 of file SIMachineFunctionInfo.h.

Referenced by buildGitPtr().

getGITPtrLoReg()

Register SIMachineFunctionInfo::getGITPtrLoReg

(

const MachineFunction &

MF

)

const

Definition at line 553 of file SIMachineFunctionInfo.cpp.

References llvm::CallingConv::AMDGPU_GS, llvm::CallingConv::AMDGPU_HS, llvm::Function::getCallingConv(), llvm::MachineFunction::getFunction(), and llvm::MachineFunction::getSubtarget().

Referenced by buildGitPtr(), and llvm::SIFrameLowering::emitEntryFunctionPrologue().

getGWSPSV()

const AMDGPUGWSResourcePseudoSourceValue * llvm::SIMachineFunctionInfo::getGWSPSV ( const AMDGPUTargetMachine &  TM )

inline

Definition at line 1060 of file SIMachineFunctionInfo.h.

Referenced by llvm::SITargetLowering::getTgtMemIntrinsic(), and llvm::AMDGPUMIRFormatter::parseCustomPseudoSourceValue().

getImplicitBufferPtrUserSGPR()

Register llvm::SIMachineFunctionInfo::getImplicitBufferPtrUserSGPR ( ) const

inline

Definition at line 931 of file SIMachineFunctionInfo.h.

getLongBranchReservedReg()

Register llvm::SIMachineFunctionInfo::getLongBranchReservedReg ( ) const

inline

Definition at line 925 of file SIMachineFunctionInfo.h.

Referenced by llvm::SIRegisterInfo::getReservedRegs(), llvm::SIInstrInfo::insertIndirectBranch(), llvm::SIFrameLowering::processFunctionBeforeFrameIndicesReplaced(), and llvm::yaml::SIMachineFunctionInfo::SIMachineFunctionInfo().

getMaxFlatWorkGroupSize()

unsigned llvm::SIMachineFunctionInfo::getMaxFlatWorkGroupSize ( ) const

inline

Returns

Default/requested maximum flat work group size for this function.

Definition at line 1023 of file SIMachineFunctionInfo.h.

getMaxWavesPerEU()

unsigned llvm::SIMachineFunctionInfo::getMaxWavesPerEU ( ) const

inline

Returns

Default/requested maximum number of waves per execution unit.

Definition at line 1039 of file SIMachineFunctionInfo.h.

Referenced by llvm::UnclusteredHighRPStage::initGCNSchedStage(), and limitOccupancy().

getMinAllowedOccupancy()

unsigned llvm::SIMachineFunctionInfo::getMinAllowedOccupancy ( ) const

inline

Definition at line 1068 of file SIMachineFunctionInfo.h.

References llvm::AMDGPUMachineFunction::isMemoryBound(), and llvm::AMDGPUMachineFunction::needsWaveLimiter().

Referenced by llvm::GCNSchedStage::checkScheduling(), llvm::GCNScheduleDAGMILive::GCNScheduleDAGMILive(), and llvm::GCNSchedStrategy::initialize().

getMinFlatWorkGroupSize()

unsigned llvm::SIMachineFunctionInfo::getMinFlatWorkGroupSize ( ) const

inline

Returns

Default/requested minimum flat work group size for this function.

Definition at line 1018 of file SIMachineFunctionInfo.h.

getMinWavesPerEU()

unsigned llvm::SIMachineFunctionInfo::getMinWavesPerEU ( ) const

inline

Returns

Default/requested minimum number of waves per execution unit.

Definition at line 1034 of file SIMachineFunctionInfo.h.

Referenced by llvm::GCNSchedStage::mayCauseSpilling().

getMode()

SIModeRegisterDefaults llvm::SIMachineFunctionInfo::getMode ( ) const

inline

Definition at line 579 of file SIMachineFunctionInfo.h.

Referenced by llvm::AMDGPULegalizerInfo::legalizeFDIV32(), llvm::AMDGPULegalizerInfo::legalizeFFloor(), llvm::AMDGPULegalizerInfo::legalizeFMad(), llvm::AMDGPULegalizerInfo::legalizeMinNumMaxNum(), llvm::AMDGPULegalizerInfo::legalizeRsqClampIntrinsic(), llvm::AMDGPUTargetLowering::LowerDIVREM24(), and llvm::AMDGPUTargetLowering::LowerUDIVREM64().

getNumKernargPreloadedSGPRs()

unsigned llvm::SIMachineFunctionInfo::getNumKernargPreloadedSGPRs ( ) const

inline

Definition at line 882 of file SIMachineFunctionInfo.h.

Referenced by llvm::AMDGPUAsmPrinter::emitFunctionBodyStart().

getNumPreloadedSGPRs()

unsigned llvm::SIMachineFunctionInfo::getNumPreloadedSGPRs ( ) const

inline

Definition at line 878 of file SIMachineFunctionInfo.h.

Referenced by llvm::SIFrameLowering::emitEntryFunctionPrologue(), and llvm::GCNSubtarget::getMaxNumSGPRs().

getNumSpilledSGPRs()

unsigned llvm::SIMachineFunctionInfo::getNumSpilledSGPRs ( ) const

inline

Definition at line 967 of file SIMachineFunctionInfo.h.

getNumSpilledVGPRs()

unsigned llvm::SIMachineFunctionInfo::getNumSpilledVGPRs ( ) const

inline

Definition at line 971 of file SIMachineFunctionInfo.h.

getNumUserSGPRs()

unsigned llvm::SIMachineFunctionInfo::getNumUserSGPRs ( ) const

inline

Definition at line 874 of file SIMachineFunctionInfo.h.

getOccupancy()

unsigned llvm::SIMachineFunctionInfo::getOccupancy ( ) const

inline

Definition at line 1064 of file SIMachineFunctionInfo.h.

Referenced by llvm::GCNSchedStrategy::initialize().

getOptionalScavengeFI()

std::optional< int > llvm::SIMachineFunctionInfo::getOptionalScavengeFI ( ) const

inline

Definition at line 714 of file SIMachineFunctionInfo.h.

Referenced by llvm::yaml::SIMachineFunctionInfo::SIMachineFunctionInfo().

getPreloadedReg()

MCRegister llvm::SIMachineFunctionInfo::getPreloadedReg ( AMDGPUFunctionArgInfo::PreloadedValue  Value ) const

inline

Definition at line 859 of file SIMachineFunctionInfo.h.

Referenced by llvm::SIFrameLowering::emitEntryFunctionPrologue().

getPreloadedValue()

std::tuple< const ArgDescriptor *, const TargetRegisterClass *, LLT > llvm::SIMachineFunctionInfo::getPreloadedValue ( AMDGPUFunctionArgInfo::PreloadedValue  Value ) const

inline

Definition at line 855 of file SIMachineFunctionInfo.h.

Referenced by llvm::AMDGPULegalizerInfo::legalizeWorkitemIDIntrinsic(), and llvm::AMDGPULegalizerInfo::loadInputValue().

getPrivateSegmentWaveByteOffsetSystemSGPR()

Register llvm::SIMachineFunctionInfo::getPrivateSegmentWaveByteOffsetSystemSGPR ( ) const

inline

Definition at line 886 of file SIMachineFunctionInfo.h.

getPrologEpilogSGPRSaveRestoreInfo()

const PrologEpilogSGPRSaveRestoreInfo & llvm::SIMachineFunctionInfo::getPrologEpilogSGPRSaveRestoreInfo ( Register  Reg ) const

inline

Definition at line 642 of file SIMachineFunctionInfo.h.

References assert(), llvm::DenseMapBase< DerivedT, KeyT, ValueT, KeyInfoT, BucketT >::end(), llvm::DenseMapBase< DerivedT, KeyT, ValueT, KeyInfoT, BucketT >::find(), I, and Reg.

Referenced by llvm::SIFrameLowering::emitPrologue().

getPrologEpilogSGPRSpills()

const PrologEpilogSGPRSpillsMap & llvm::SIMachineFunctionInfo::getPrologEpilogSGPRSpills ( ) const

inline

Definition at line 593 of file SIMachineFunctionInfo.h.

Referenced by llvm::SIFrameLowering::emitCSRSpillRestores(), and llvm::SIFrameLowering::emitCSRSpillStores().

getPSInputAddr()

unsigned llvm::SIMachineFunctionInfo::getPSInputAddr ( ) const

inline

Definition at line 983 of file SIMachineFunctionInfo.h.

getPSInputEnable()

unsigned llvm::SIMachineFunctionInfo::getPSInputEnable ( ) const

inline

Definition at line 987 of file SIMachineFunctionInfo.h.

getQueuePtrUserSGPR()

Register llvm::SIMachineFunctionInfo::getQueuePtrUserSGPR ( ) const

inline

Definition at line 927 of file SIMachineFunctionInfo.h.

getScavengeFI()

int SIMachineFunctionInfo::getScavengeFI	(	MachineFrameInfo &	MFI,
		const SIRegisterInfo &	TRI
	)

Definition at line 518 of file SIMachineFunctionInfo.cpp.

References llvm::MachineFrameInfo::CreateFixedObject(), llvm::MachineFrameInfo::CreateStackObject(), llvm::AMDGPUMachineFunction::isChainFunction(), llvm::AMDGPUMachineFunction::isEntryFunction(), and TRI.

Referenced by llvm::SGPRSpillBuilder::prepare(), and llvm::SIFrameLowering::processFunctionBeforeFrameFinalized().

getScratchRSrcReg()

Register llvm::SIMachineFunctionInfo::getScratchRSrcReg ( ) const

inline

Returns the physical register reserved for use as the resource descriptor for scratch accesses.

Definition at line 892 of file SIMachineFunctionInfo.h.

Referenced by llvm::SIRegisterInfo::buildSpillLoadStore(), llvm::SIRegisterInfo::getReservedRegs(), and llvm::AMDGPUCallLowering::handleImplicitCallArguments().

getScratchSGPRCopyDstReg()

Register llvm::SIMachineFunctionInfo::getScratchSGPRCopyDstReg ( Register  Reg ) const

inline

Definition at line 613 of file SIMachineFunctionInfo.h.

References llvm::COPY_TO_SCRATCH_SGPR, llvm::DenseMapBase< DerivedT, KeyT, ValueT, KeyInfoT, BucketT >::end(), llvm::DenseMapBase< DerivedT, KeyT, ValueT, KeyInfoT, BucketT >::find(), I, and Reg.

Referenced by llvm::SIFrameLowering::assignCalleeSavedSpillSlots(), llvm::SIFrameLowering::emitEpilogue(), and llvm::SIFrameLowering::emitPrologue().

getSGPRForEXECCopy()

Register llvm::SIMachineFunctionInfo::getSGPRForEXECCopy ( ) const

inline

Definition at line 684 of file SIMachineFunctionInfo.h.

Referenced by llvm::SIFrameLowering::determinePrologEpilogSGPRSaves(), llvm::SIRegisterInfo::eliminateFrameIndex(), llvm::SIRegisterInfo::getReservedRegs(), and llvm::yaml::SIMachineFunctionInfo::SIMachineFunctionInfo().

getSGPRSpillToPhysicalVGPRLanes()

ArrayRef< SIRegisterInfo::SpilledReg > llvm::SIMachineFunctionInfo::getSGPRSpillToPhysicalVGPRLanes ( int  FrameIndex ) const

inline

Definition at line 650 of file SIMachineFunctionInfo.h.

References llvm::DenseMapBase< DerivedT, KeyT, ValueT, KeyInfoT, BucketT >::end(), llvm::DenseMapBase< DerivedT, KeyT, ValueT, KeyInfoT, BucketT >::find(), and I.

Referenced by getVGPRSpillLaneOrTempRegister(), llvm::SIRegisterInfo::restoreSGPR(), and llvm::SIRegisterInfo::spillSGPR().

getSGPRSpillToVirtualVGPRLanes()

ArrayRef< SIRegisterInfo::SpilledReg > llvm::SIMachineFunctionInfo::getSGPRSpillToVirtualVGPRLanes ( int  FrameIndex ) const

inline

Definition at line 582 of file SIMachineFunctionInfo.h.

References llvm::DenseMapBase< DerivedT, KeyT, ValueT, KeyInfoT, BucketT >::end(), llvm::DenseMapBase< DerivedT, KeyT, ValueT, KeyInfoT, BucketT >::find(), and I.

Referenced by llvm::SIRegisterInfo::restoreSGPR(), and llvm::SIRegisterInfo::spillSGPR().

getSGPRSpillVGPRs()

ArrayRef< Register > llvm::SIMachineFunctionInfo::getSGPRSpillVGPRs ( ) const

inline

Definition at line 589 of file SIMachineFunctionInfo.h.

getStackPtrOffsetReg()

Register llvm::SIMachineFunctionInfo::getStackPtrOffsetReg ( ) const

inline

Definition at line 921 of file SIMachineFunctionInfo.h.

Referenced by llvm::SIRegisterInfo::buildSpillLoadStore(), llvm::SIFrameLowering::determineCalleeSavesSGPR(), llvm::SIFrameLowering::eliminateCallFramePseudoInstr(), llvm::SIRegisterInfo::eliminateFrameIndex(), llvm::SIFrameLowering::emitEntryFunctionPrologue(), llvm::SIFrameLowering::emitEpilogue(), llvm::SIFrameLowering::emitPrologue(), llvm::SIRegisterInfo::getFrameRegister(), llvm::SIRegisterInfo::getReservedRegs(), llvm::SIInstrInfo::loadRegFromStackSlot(), llvm::SIRegisterInfo::spillSGPR(), and llvm::SIInstrInfo::storeRegToStackSlot().

getUserSGPRInfo() [1/2]

GCNUserSGPRUsageInfo & llvm::SIMachineFunctionInfo::getUserSGPRInfo ( )

inline

Definition at line 597 of file SIMachineFunctionInfo.h.

Referenced by llvm::SIFrameLowering::emitEntryFunctionPrologue(), llvm::AMDGPU::HSAMD::MetadataStreamerMsgPackV5::emitHiddenKernelArgs(), and llvm::GCNSubtarget::getReservedNumSGPRs().

getUserSGPRInfo() [2/2]

const GCNUserSGPRUsageInfo & llvm::SIMachineFunctionInfo::getUserSGPRInfo ( ) const

inline

Definition at line 599 of file SIMachineFunctionInfo.h.

getVGPRForAGPRCopy()

Register llvm::SIMachineFunctionInfo::getVGPRForAGPRCopy ( ) const

inline

Definition at line 553 of file SIMachineFunctionInfo.h.

Referenced by llvm::SIRegisterInfo::buildSpillLoadStore(), llvm::SIRegisterInfo::getReservedRegs(), llvm::SIFrameLowering::processFunctionBeforeFrameIndicesReplaced(), and llvm::yaml::SIMachineFunctionInfo::SIMachineFunctionInfo().

getVGPRSpillAGPRs()

ArrayRef< MCPhysReg > llvm::SIMachineFunctionInfo::getVGPRSpillAGPRs ( ) const

inline

Definition at line 688 of file SIMachineFunctionInfo.h.

Referenced by llvm::SIRegisterInfo::getReservedRegs(), and llvm::SIFrameLowering::processFunctionBeforeFrameFinalized().

getVGPRToAGPRSpill()

MCPhysReg llvm::SIMachineFunctionInfo::getVGPRToAGPRSpill ( int  FrameIndex, unsigned  Lane  ) const

inline

Definition at line 692 of file SIMachineFunctionInfo.h.

References llvm::DenseMapBase< DerivedT, KeyT, ValueT, KeyInfoT, BucketT >::end(), llvm::DenseMapBase< DerivedT, KeyT, ValueT, KeyInfoT, BucketT >::find(), and I.

Referenced by spillVGPRtoAGPR().

getWavesPerEU()

std::pair< unsigned, unsigned > llvm::SIMachineFunctionInfo::getWavesPerEU ( ) const

inline

Returns

A pair of default/requested minimum/maximum number of waves per execution unit.

Definition at line 1029 of file SIMachineFunctionInfo.h.

Referenced by llvm::GCNSubtarget::getMaxNumSGPRs(), and llvm::GCNSubtarget::getMaxNumVGPRs().

getWorkGroupIDSGPR()

Register llvm::SIMachineFunctionInfo::getWorkGroupIDSGPR ( unsigned  Dim ) const

inline

Returns

SGPR used for Dim's work group ID.

Definition at line 1044 of file SIMachineFunctionInfo.h.

References assert(), hasWorkGroupIDX(), hasWorkGroupIDY(), hasWorkGroupIDZ(), and llvm_unreachable.

getWWMReservedRegs()

const ReservedRegSet & llvm::SIMachineFunctionInfo::getWWMReservedRegs ( ) const

inline

Definition at line 591 of file SIMachineFunctionInfo.h.

Referenced by llvm::SIRegisterInfo::getReservedRegs(), llvm::SIFrameLowering::processFunctionBeforeFrameFinalized(), and llvm::yaml::SIMachineFunctionInfo::SIMachineFunctionInfo().

getWWMSpills()

const WWMSpillsMap & llvm::SIMachineFunctionInfo::getWWMSpills ( ) const

inline

Definition at line 590 of file SIMachineFunctionInfo.h.

Referenced by llvm::SIFrameLowering::determineCalleeSaves().

hasImplicitArgPtr()

bool llvm::SIMachineFunctionInfo::hasImplicitArgPtr ( ) const

inline

Definition at line 842 of file SIMachineFunctionInfo.h.

hasLDSKernelId()

bool llvm::SIMachineFunctionInfo::hasLDSKernelId ( ) const

inline

Definition at line 784 of file SIMachineFunctionInfo.h.

hasNonSpillStackObjects()

bool llvm::SIMachineFunctionInfo::hasNonSpillStackObjects ( ) const

inline

Definition at line 951 of file SIMachineFunctionInfo.h.

hasPrivateSegmentWaveByteOffset()

bool llvm::SIMachineFunctionInfo::hasPrivateSegmentWaveByteOffset ( ) const

inline

Definition at line 826 of file SIMachineFunctionInfo.h.

hasPrologEpilogSGPRSpillEntry()

bool llvm::SIMachineFunctionInfo::hasPrologEpilogSGPRSpillEntry ( Register  Reg ) const

inline

Definition at line 608 of file SIMachineFunctionInfo.h.

References llvm::DenseMapBase< DerivedT, KeyT, ValueT, KeyInfoT, BucketT >::contains(), and Reg.

Referenced by llvm::SIFrameLowering::determinePrologEpilogSGPRSaves(), llvm::SIFrameLowering::emitEpilogue(), and llvm::SIFrameLowering::emitPrologue().

hasSpilledSGPRs()

bool llvm::SIMachineFunctionInfo::hasSpilledSGPRs ( ) const

inline

Definition at line 935 of file SIMachineFunctionInfo.h.

Referenced by llvm::SIFrameLowering::determineCalleeSavesSGPR().

hasSpilledVGPRs()

bool llvm::SIMachineFunctionInfo::hasSpilledVGPRs ( ) const

inline

Definition at line 943 of file SIMachineFunctionInfo.h.

Referenced by llvm::SIFrameLowering::processFunctionBeforeFrameFinalized().

hasVRegFlags()

bool llvm::SIMachineFunctionInfo::hasVRegFlags ( )

inline

Definition at line 670 of file SIMachineFunctionInfo.h.

hasWorkGroupIDX()

bool llvm::SIMachineFunctionInfo::hasWorkGroupIDX ( ) const

inline

Definition at line 810 of file SIMachineFunctionInfo.h.

Referenced by getWorkGroupIDSGPR().

hasWorkGroupIDY()

bool llvm::SIMachineFunctionInfo::hasWorkGroupIDY ( ) const

inline

Definition at line 814 of file SIMachineFunctionInfo.h.

Referenced by getWorkGroupIDSGPR().

hasWorkGroupIDZ()

bool llvm::SIMachineFunctionInfo::hasWorkGroupIDZ ( ) const

inline

Definition at line 818 of file SIMachineFunctionInfo.h.

Referenced by addWorkGroupIDY(), and getWorkGroupIDSGPR().

hasWorkGroupInfo()

bool llvm::SIMachineFunctionInfo::hasWorkGroupInfo ( ) const

inline

Definition at line 822 of file SIMachineFunctionInfo.h.

hasWorkItemIDX()

bool llvm::SIMachineFunctionInfo::hasWorkItemIDX ( ) const

inline

Definition at line 830 of file SIMachineFunctionInfo.h.

hasWorkItemIDY()

bool llvm::SIMachineFunctionInfo::hasWorkItemIDY ( ) const

inline

Definition at line 834 of file SIMachineFunctionInfo.h.

hasWorkItemIDZ()

bool llvm::SIMachineFunctionInfo::hasWorkItemIDZ ( ) const

inline

Definition at line 838 of file SIMachineFunctionInfo.h.

increaseOccupancy()

void llvm::SIMachineFunctionInfo::increaseOccupancy ( const MachineFunction &  MF, unsigned  Limit  )

inline

Definition at line 1081 of file SIMachineFunctionInfo.h.

References limitOccupancy().

Referenced by llvm::UnclusteredHighRPStage::initGCNSchedStage().

initializeBaseYamlFields()

bool SIMachineFunctionInfo::initializeBaseYamlFields	(	const yaml::SIMachineFunctionInfo &	YamlMFI,
		const MachineFunction &	MF,
		PerFunctionMIParsingState &	PFS,
		SMDiagnostic &	Error,
		SMRange &	SourceRange
	)

Definition at line 678 of file SIMachineFunctionInfo.cpp.

References llvm::yaml::SIMachineFunctionInfo::BytesInStackArgArea, llvm::SourceMgr::DK_Error, llvm::yaml::SIMachineFunctionInfo::DynLDSAlign, llvm::yaml::SIMachineFunctionInfo::ExplicitKernArgSize, llvm::yaml::SIMachineFunctionInfo::GDSSize, llvm::MemoryBuffer::getBufferIdentifier(), llvm::MachineFunction::getFrameInfo(), llvm::SourceMgr::getMainFileID(), llvm::SourceMgr::getMemoryBuffer(), llvm::yaml::SIMachineFunctionInfo::HasSpilledSGPRs, llvm::yaml::SIMachineFunctionInfo::HasSpilledVGPRs, llvm::yaml::SIMachineFunctionInfo::HighBitsOf32BitAddress, llvm::yaml::SIMachineFunctionInfo::IsEntryFunction, llvm::yaml::SIMachineFunctionInfo::LDSSize, llvm::yaml::SIMachineFunctionInfo::MaxKernArgAlign, llvm::yaml::SIMachineFunctionInfo::MemoryBound, llvm::yaml::SIMachineFunctionInfo::NoSignedZerosFPMath, llvm::yaml::SIMachineFunctionInfo::Occupancy, llvm::yaml::SIMachineFunctionInfo::PSInputAddr, llvm::yaml::SIMachineFunctionInfo::PSInputEnable, llvm::yaml::SIMachineFunctionInfo::ReturnsVoid, llvm::yaml::SIMachineFunctionInfo::ScavengeFI, llvm::PerFunctionMIParsingState::SM, llvm::dwarf::toString(), and llvm::yaml::SIMachineFunctionInfo::WaveLimiter.

Referenced by llvm::GCNTargetMachine::parseMachineFunctionInfo().

isCalleeSavedReg()

bool SIMachineFunctionInfo::isCalleeSavedReg	(	const MCPhysReg *	CSRegs,
		MCPhysReg	Reg
	)		const

Definition at line 305 of file SIMachineFunctionInfo.cpp.

References I.

Referenced by splitWWMSpillRegisters().

isPSInputAllocated()

bool llvm::SIMachineFunctionInfo::isPSInputAllocated ( unsigned  Index ) const

inline

Definition at line 991 of file SIMachineFunctionInfo.h.

isStackRealigned()

bool llvm::SIMachineFunctionInfo::isStackRealigned ( ) const

inline

Definition at line 959 of file SIMachineFunctionInfo.h.

Referenced by llvm::SIFrameLowering::emitEpilogue().

limitOccupancy() [1/2]

void SIMachineFunctionInfo::limitOccupancy

(

const MachineFunction &

MF

)

Definition at line 181 of file SIMachineFunctionInfo.cpp.

References llvm::MachineFunction::getFunction(), llvm::AMDGPUMachineFunction::getLDSSize(), getMaxWavesPerEU(), llvm::MachineFunction::getSubtarget(), and limitOccupancy().

Referenced by llvm::GCNSchedStage::checkScheduling(), increaseOccupancy(), and limitOccupancy().

limitOccupancy() [2/2]

void llvm::SIMachineFunctionInfo::limitOccupancy ( unsigned  Limit )

inline

Definition at line 1076 of file SIMachineFunctionInfo.h.

markPSInputAllocated()

void llvm::SIMachineFunctionInfo::markPSInputAllocated ( unsigned  Index )

inline

Definition at line 995 of file SIMachineFunctionInfo.h.

markPSInputEnabled()

void llvm::SIMachineFunctionInfo::markPSInputEnabled ( unsigned  Index )

inline

Definition at line 999 of file SIMachineFunctionInfo.h.

mayNeedAGPRs()

bool llvm::SIMachineFunctionInfo::mayNeedAGPRs ( ) const

inline

Definition at line 1087 of file SIMachineFunctionInfo.h.

mayUseAGPRs()

bool SIMachineFunctionInfo::mayUseAGPRs

(

const Function &

F

)

const

Definition at line 719 of file SIMachineFunctionInfo.cpp.

References F, I, and llvm::Intrinsic::not_intrinsic.

Referenced by SIMachineFunctionInfo().

removeDeadFrameIndices()

bool SIMachineFunctionInfo::removeDeadFrameIndices	(	MachineFrameInfo &	MFI,
		bool	ResetSGPRSpillStackIDs
	)

If ResetSGPRSpillStackIDs is true, reset the stack ID from sgpr-spill to the default stack.

Definition at line 473 of file SIMachineFunctionInfo.cpp.

References checkIndexInPrologEpilogSGPRSpills(), llvm::TargetStackID::Default, E, llvm::MachineFrameInfo::getObjectIndexBegin(), llvm::MachineFrameInfo::getObjectIndexEnd(), llvm::MachineFrameInfo::getStackID(), I, llvm::make_early_inc_range(), llvm::MachineFrameInfo::RemoveStackObject(), llvm::MachineFrameInfo::setStackID(), and llvm::TargetStackID::SGPRSpill.

Referenced by llvm::SIFrameLowering::processFunctionBeforeFrameFinalized().

reserveWWMRegister()

void llvm::SIMachineFunctionInfo::reserveWWMRegister ( Register  Reg )

inline

Definition at line 577 of file SIMachineFunctionInfo.h.

References llvm::SetVector< T, Vector, Set, N >::insert(), and Reg.

Referenced by llvm::GCNTargetMachine::parseMachineFunctionInfo().

returnsVoid()

bool llvm::SIMachineFunctionInfo::returnsVoid ( ) const

inline

Definition at line 1003 of file SIMachineFunctionInfo.h.

Referenced by llvm::AMDGPUCallLowering::lowerReturn().

setBytesInStackArgArea()

void llvm::SIMachineFunctionInfo::setBytesInStackArgArea ( unsigned  Bytes )

inline

Definition at line 720 of file SIMachineFunctionInfo.h.

setFlag()

void llvm::SIMachineFunctionInfo::setFlag ( Register  Reg, uint8_t  Flag  )

inline

Definition at line 657 of file SIMachineFunctionInfo.h.

References assert(), and Reg.

setFrameOffsetReg()

void llvm::SIMachineFunctionInfo::setFrameOffsetReg ( Register  Reg )

inline

Definition at line 905 of file SIMachineFunctionInfo.h.

References assert(), and Reg.

setHasNonSpillStackObjects()

void llvm::SIMachineFunctionInfo::setHasNonSpillStackObjects ( bool  StackObject = true )

inline

Definition at line 955 of file SIMachineFunctionInfo.h.

setHasSpilledSGPRs()

void llvm::SIMachineFunctionInfo::setHasSpilledSGPRs ( bool  Spill = true )

inline

Definition at line 939 of file SIMachineFunctionInfo.h.

Referenced by llvm::SIInstrInfo::loadRegFromStackSlot(), and llvm::SIInstrInfo::storeRegToStackSlot().

setHasSpilledVGPRs()

void llvm::SIMachineFunctionInfo::setHasSpilledVGPRs ( bool  Spill = true )

inline

Definition at line 947 of file SIMachineFunctionInfo.h.

Referenced by llvm::SIInstrInfo::storeRegToStackSlot().

setIfReturnsVoid()

void llvm::SIMachineFunctionInfo::setIfReturnsVoid ( bool  Value )

inline

Definition at line 1007 of file SIMachineFunctionInfo.h.

Referenced by llvm::AMDGPUCallLowering::lowerReturn().

setIsStackRealigned()

void llvm::SIMachineFunctionInfo::setIsStackRealigned ( bool  Realigned = true )

inline

Definition at line 963 of file SIMachineFunctionInfo.h.

Referenced by llvm::SIFrameLowering::emitPrologue().

setLongBranchReservedReg()

void llvm::SIMachineFunctionInfo::setLongBranchReservedReg ( Register  Reg )

inline

Definition at line 915 of file SIMachineFunctionInfo.h.

References Reg.

Referenced by llvm::SIFrameLowering::processFunctionBeforeFrameIndicesReplaced().

setPrivateSegmentWaveByteOffset()

void llvm::SIMachineFunctionInfo::setPrivateSegmentWaveByteOffset ( Register  Reg )

inline

Definition at line 806 of file SIMachineFunctionInfo.h.

References llvm::ArgDescriptor::createRegister(), and Reg.

setScratchRSrcReg()

void llvm::SIMachineFunctionInfo::setScratchRSrcReg ( Register  Reg )

inline

Definition at line 896 of file SIMachineFunctionInfo.h.

References assert(), and Reg.

setSGPRForEXECCopy()

void llvm::SIMachineFunctionInfo::setSGPRForEXECCopy ( Register  Reg )

inline

Definition at line 686 of file SIMachineFunctionInfo.h.

References Reg.

Referenced by llvm::SIFrameLowering::determinePrologEpilogSGPRSaves().

setStackPtrOffsetReg()

void llvm::SIMachineFunctionInfo::setStackPtrOffsetReg ( Register  Reg )

inline

Definition at line 910 of file SIMachineFunctionInfo.h.

References assert(), and Reg.

setVGPRForAGPRCopy()

void llvm::SIMachineFunctionInfo::setVGPRForAGPRCopy ( Register  NewVGPRForAGPRCopy )

inline

Definition at line 557 of file SIMachineFunctionInfo.h.

Referenced by llvm::SIFrameLowering::processFunctionBeforeFrameIndicesReplaced().

setVGPRToAGPRSpillDead()

void llvm::SIMachineFunctionInfo::setVGPRToAGPRSpillDead ( int  FrameIndex )

inline

Definition at line 698 of file SIMachineFunctionInfo.h.

References llvm::DenseMapBase< DerivedT, KeyT, ValueT, KeyInfoT, BucketT >::end(), llvm::DenseMapBase< DerivedT, KeyT, ValueT, KeyInfoT, BucketT >::find(), and I.

Referenced by llvm::SIFrameLowering::processFunctionBeforeFrameFinalized().

setWorkItemIDX()

void llvm::SIMachineFunctionInfo::setWorkItemIDX ( ArgDescriptor  Arg )

inline

Definition at line 787 of file SIMachineFunctionInfo.h.

setWorkItemIDY()

void llvm::SIMachineFunctionInfo::setWorkItemIDY ( ArgDescriptor  Arg )

inline

Definition at line 791 of file SIMachineFunctionInfo.h.

setWorkItemIDZ()

void llvm::SIMachineFunctionInfo::setWorkItemIDZ ( ArgDescriptor  Arg )

inline

Definition at line 795 of file SIMachineFunctionInfo.h.

splitWWMSpillRegisters()

void SIMachineFunctionInfo::splitWWMSpillRegisters	(	MachineFunction &	MF,
		SmallVectorImpl< std::pair< Register, int > > &	CalleeSavedRegs,
		SmallVectorImpl< std::pair< Register, int > > &	ScratchRegs
	)		const

Definition at line 292 of file SIMachineFunctionInfo.cpp.

References llvm::MachineRegisterInfo::getCalleeSavedRegs(), llvm::MachineFunction::getRegInfo(), and isCalleeSavedReg().

Referenced by llvm::SIFrameLowering::emitCSRSpillRestores(), and llvm::SIFrameLowering::emitCSRSpillStores().

usesAGPRs()

bool SIMachineFunctionInfo::usesAGPRs

(

const MachineFunction &

MF

)

const

Definition at line 751 of file SIMachineFunctionInfo.cpp.

References E, llvm::Function::getCallingConv(), llvm::MachineFunction::getFrameInfo(), llvm::MachineFunction::getFunction(), llvm::MachineFunction::getRegInfo(), llvm::MachineFrameInfo::hasCalls(), I, llvm::Register::index2VirtReg(), llvm::SIRegisterInfo::isAGPRClass(), llvm::AMDGPU::isEntryFunctionCC(), and MRI.

Referenced by llvm::SIRegisterInfo::getReservedRegs().

Friends And Related Function Documentation

GCNTargetMachine

friend class GCNTargetMachine

friend

Definition at line 377 of file SIMachineFunctionInfo.h.

---

The documentation for this class was generated from the following files:

• lib/Target/AMDGPU/SIMachineFunctionInfo.h
• lib/Target/AMDGPU/SIMachineFunctionInfo.cpp