20 std::optional<unsigned int> OpIdx, int64_t Imm)
const {
22 switch (
MI.getOpcode()) {
23 case AMDGPU::S_DELAY_ALU:
25 printSDelayAluImm(Imm,
OS);
42 case AMDGPU::S_DELAY_ALU:
43 return parseSDelayAluImmMnemonic(OpIdx, Imm, Src, ErrorCallback);
50void AMDGPUMIRFormatter::printSDelayAluImm(int64_t Imm,
55 constexpr int64_t
None = 0;
56 constexpr int64_t
Same = 0;
65 OS <<
"VALU_DEP_" << Id;
67 OS <<
"TRANS32_DEP_" << Id - 4;
69 OS <<
"SALU_CYCLE_" << Id - 8;
87 OS <<
"SKIP_" << Skip - 1;
93bool AMDGPUMIRFormatter::parseSDelayAluImmMnemonic(
100 bool Expected = Src.consume_front(
".id0_");
102 return ErrorCallback(Src.begin(),
"Expected .id0_");
106 if (!Src.consumeInteger(10, Dep))
112 auto DecodeDelay = [&](
StringRef &Src) -> int64_t {
113 if (Src.consume_front(
"NONE"))
115 if (Src.consume_front(
"VALU_DEP_"))
116 return ExpectInt(Src, 0);
117 if (Src.consume_front(
"TRANS32_DEP_"))
118 return ExpectInt(Src, 4);
119 if (Src.consume_front(
"SALU_CYCLE_"))
120 return ExpectInt(Src, 8);
125 int64_t Delay0 = DecodeDelay(Src);
129 return ErrorCallback(Src.begin(),
"Could not decode delay0");
137 if (Src.begin() == Src.end())
140 Expected = Src.consume_front(
"_skip_");
142 return ErrorCallback(Src.begin(),
"Expected _skip_");
145 if (Src.consume_front(
"SAME")) {
147 }
else if (Src.consume_front(
"NEXT")) {
149 }
else if (Src.consume_front(
"SKIP_")) {
150 if (Src.consumeInteger(10, Skip)) {
151 return ErrorCallback(Src.begin(),
"Expected integer Skip value");
155 ErrorCallback(Src.begin(),
"Unexpected Skip Value");
158 Expected = Src.consume_front(
"_id1_");
160 return ErrorCallback(Src.begin(),
"Expected _id1_");
162 Delay1 = DecodeDelay(Src);
164 return ErrorCallback(Src.begin(),
"Could not decode delay1");
176 if (Src ==
"GWSResource") {
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
Tagged union holding either a T or a Error.
Ty * getInfo()
getInfo - Keep track of various per-function pieces of information for backends that would like to do...
const TargetMachine & getTarget() const
getTarget - Return the target machine this machine code is compiled with
Representation of each machine instruction.
Special value supplied for machine level alias analysis.
This class keeps track of the SPI_SP_INPUT_ADDR config register, which tells the hardware which inter...
const AMDGPUGWSResourcePseudoSourceValue * getGWSPSV(const AMDGPUTargetMachine &TM)
StringRef - Represent a constant reference to a string, i.e.
An efficient, type-erasing, non-owning reference to a callable.
This class implements an extremely fast bulk output stream that can only output to a stream.
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
This is an optimization pass for GlobalISel generic memory operations.