9#ifndef LLVM_LIB_TARGET_RISCV_MCTARGETDESC_MATINT_H
10#define LLVM_LIB_TARGET_RISCV_MCTARGETDESC_MATINT_H
19namespace RISCVMatInt {
57 unsigned &ShiftAmt,
unsigned &AddOpc);
70 bool CompressionCost =
false);
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
This file defines the SmallVector class.
Class for arbitrary precision integers.
Generic base class for all target subtargets.
Inst(unsigned Opc, int64_t I)
unsigned getOpcode() const
OpndKind getOpndKind() const
This is a 'vector' (really, a variable-sized array), optimized for the case when the array is small.
InstSeq generateInstSeq(int64_t Val, const MCSubtargetInfo &STI)
int getIntMatCost(const APInt &Val, unsigned Size, const MCSubtargetInfo &STI, bool CompressionCost)
InstSeq generateTwoRegInstSeq(int64_t Val, const MCSubtargetInfo &STI, unsigned &ShiftAmt, unsigned &AddOpc)
This is an optimization pass for GlobalISel generic memory operations.