LLVM  16.0.0git
RISCVMatInt.h
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1 //===- RISCVMatInt.h - Immediate materialisation ---------------*- C++ -*--===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 
9 #ifndef LLVM_LIB_TARGET_RISCV_MCTARGETDESC_MATINT_H
10 #define LLVM_LIB_TARGET_RISCV_MCTARGETDESC_MATINT_H
11 
12 #include "llvm/ADT/SmallVector.h"
14 #include <cstdint>
15 
16 namespace llvm {
17 class APInt;
18 
19 namespace RISCVMatInt {
20 
21 enum OpndKind {
22  RegImm, // ADDI/ADDIW/SLLI/SRLI/BSETI/BCLRI
23  Imm, // LUI
24  RegReg, // SH1ADD/SH2ADD/SH3ADD
25  RegX0, // ADD_UW
26 };
27 
28 struct Inst {
29  unsigned Opc;
30  int64_t Imm;
31 
32  Inst(unsigned Opc, int64_t Imm) : Opc(Opc), Imm(Imm) {}
33 
34  OpndKind getOpndKind() const;
35 };
37 
38 // Helper to generate an instruction sequence that will materialise the given
39 // immediate value into a register. A sequence of instructions represented by a
40 // simple struct is produced rather than directly emitting the instructions in
41 // order to allow this helper to be used from both the MC layer and during
42 // instruction selection.
43 InstSeq generateInstSeq(int64_t Val, const FeatureBitset &ActiveFeatures);
44 
45 // Helper to estimate the number of instructions required to materialise the
46 // given immediate value into a register. This estimate does not account for
47 // `Val` possibly fitting into an immediate, and so may over-estimate.
48 //
49 // This will attempt to produce instructions to materialise `Val` as an
50 // `Size`-bit immediate.
51 //
52 // If CompressionCost is true it will use a different cost calculation if RVC is
53 // enabled. This should be used to compare two different sequences to determine
54 // which is more compressible.
55 int getIntMatCost(const APInt &Val, unsigned Size,
56  const FeatureBitset &ActiveFeatures,
57  bool CompressionCost = false);
58 } // namespace RISCVMatInt
59 } // namespace llvm
60 #endif
llvm::RISCVMatInt::Inst
Definition: RISCVMatInt.h:28
llvm::RISCVMatInt::getIntMatCost
int getIntMatCost(const APInt &Val, unsigned Size, const FeatureBitset &ActiveFeatures, bool CompressionCost)
Definition: RISCVMatInt.cpp:380
llvm
This is an optimization pass for GlobalISel generic memory operations.
Definition: AddressRanges.h:18
llvm::RISCVMatInt::Inst::Opc
unsigned Opc
Definition: RISCVMatInt.h:29
llvm::SmallVector
This is a 'vector' (really, a variable-sized array), optimized for the case when the array is small.
Definition: SmallVector.h:1181
llvm::RISCVMatInt::generateInstSeq
InstSeq generateInstSeq(int64_t Val, const FeatureBitset &ActiveFeatures)
Definition: RISCVMatInt.cpp:176
llvm::FeatureBitset
Container class for subtarget features.
Definition: SubtargetFeature.h:40
SubtargetFeature.h
llvm::RISCVMatInt::Inst::Imm
int64_t Imm
Definition: RISCVMatInt.h:30
llvm::RISCVMatInt::Inst::getOpndKind
OpndKind getOpndKind() const
Definition: RISCVMatInt.cpp:397
llvm::RISCVMatInt::RegX0
@ RegX0
Definition: RISCVMatInt.h:25
llvm::APInt
Class for arbitrary precision integers.
Definition: APInt.h:75
llvm::RISCVMatInt::Inst::Inst
Inst(unsigned Opc, int64_t Imm)
Definition: RISCVMatInt.h:32
llvm::RISCVMatInt::RegReg
@ RegReg
Definition: RISCVMatInt.h:24
llvm::RISCVMatInt::Imm
@ Imm
Definition: RISCVMatInt.h:23
llvm::RISCVMatInt::OpndKind
OpndKind
Definition: RISCVMatInt.h:21
SmallVector.h
llvm::RISCVMatInt::RegImm
@ RegImm
Definition: RISCVMatInt.h:22