LLVM 24.0.0git
Classes | Macros | Functions | Variables
XtensaDisassembler.cpp File Reference
#include "MCTargetDesc/XtensaMCTargetDesc.h"
#include "TargetInfo/XtensaTargetInfo.h"
#include "llvm/MC/MCContext.h"
#include "llvm/MC/MCDecoder.h"
#include "llvm/MC/MCDecoderOps.h"
#include "llvm/MC/MCDisassembler/MCDisassembler.h"
#include "llvm/MC/MCInst.h"
#include "llvm/MC/MCRegisterInfo.h"
#include "llvm/MC/MCSubtargetInfo.h"
#include "llvm/MC/TargetRegistry.h"
#include "llvm/Support/Endian.h"
#include "XtensaGenDisassemblerTables.inc"

Go to the source code of this file.

Classes

struct  DecodeRegister

Macros

#define DEBUG_TYPE   "Xtensa-disassembler"

Functions

static MCDisassembler * createXtensaDisassembler (const Target &T, const MCSubtargetInfo &STI, MCContext &Ctx)
LLVM_EXTERNAL_VISIBILITY void LLVMInitializeXtensaDisassembler ()
static DecodeStatus DecodeARRegisterClass (MCInst &Inst, uint64_t RegNo, uint64_t Address, const void *Decoder)
static DecodeStatus DecodeMRRegisterClass (MCInst &Inst, uint64_t RegNo, uint64_t Address, const void *Decoder)
static DecodeStatus DecodeMR01RegisterClass (MCInst &Inst, uint64_t RegNo, uint64_t Address, const void *Decoder)
static DecodeStatus DecodeMR23RegisterClass (MCInst &Inst, uint64_t RegNo, uint64_t Address, const void *Decoder)
static DecodeStatus DecodeFPRRegisterClass (MCInst &Inst, uint64_t RegNo, uint64_t Address, const void *Decoder)
static DecodeStatus DecodeURRegisterClass (MCInst &Inst, uint64_t RegNo, uint64_t Address, const MCDisassembler *Decoder)
static DecodeStatus DecodeSRRegisterClass (MCInst &Inst, uint64_t RegNo, uint64_t Address, const MCDisassembler *Decoder)
static DecodeStatus DecodeBRRegisterClass (MCInst &Inst, uint64_t RegNo, uint64_t Address, const void *Decoder)
static bool tryAddingSymbolicOperand (int64_t Value, bool isBranch, uint64_t Address, uint64_t Offset, uint64_t InstSize, MCInst &MI, const void *Decoder)
static DecodeStatus decodeCallOperand (MCInst &Inst, uint64_t Imm, int64_t Address, const void *Decoder)
static DecodeStatus decodeJumpOperand (MCInst &Inst, uint64_t Imm, int64_t Address, const void *Decoder)
static DecodeStatus decodeBranchOperand (MCInst &Inst, uint64_t Imm, int64_t Address, const void *Decoder)
static DecodeStatus decodeLoopOperand (MCInst &Inst, uint64_t Imm, int64_t Address, const void *Decoder)
static DecodeStatus decodeL32ROperand (MCInst &Inst, uint64_t Imm, int64_t Address, const void *Decoder)
static DecodeStatus decodeImm8Operand (MCInst &Inst, uint64_t Imm, int64_t Address, const void *Decoder)
static DecodeStatus decodeImm8_sh8Operand (MCInst &Inst, uint64_t Imm, int64_t Address, const void *Decoder)
static DecodeStatus decodeImm12Operand (MCInst &Inst, uint64_t Imm, int64_t Address, const void *Decoder)
static DecodeStatus decodeUimm4Operand (MCInst &Inst, uint64_t Imm, int64_t Address, const void *Decoder)
static DecodeStatus decodeUimm5Operand (MCInst &Inst, uint64_t Imm, int64_t Address, const void *Decoder)
static DecodeStatus decodeImm1_16Operand (MCInst &Inst, uint64_t Imm, int64_t Address, const void *Decoder)
static DecodeStatus decodeImm1n_15Operand (MCInst &Inst, uint64_t Imm, int64_t Address, const void *Decoder)
static DecodeStatus decodeImm32n_95Operand (MCInst &Inst, uint64_t Imm, int64_t Address, const void *Decoder)
static DecodeStatus decodeImm8n_7Operand (MCInst &Inst, uint64_t Imm, int64_t Address, const void *Decoder)
static DecodeStatus decodeImm64n_4nOperand (MCInst &Inst, uint64_t Imm, int64_t Address, const void *Decoder)
static DecodeStatus decodeEntry_Imm12OpValue (MCInst &Inst, uint64_t Imm, int64_t Address, const void *Decoder)
static DecodeStatus decodeShimm1_31Operand (MCInst &Inst, uint64_t Imm, int64_t Address, const void *Decoder)
static DecodeStatus decodeB4constOperand (MCInst &Inst, uint64_t Imm, int64_t Address, const void *Decoder)
static DecodeStatus decodeB4constuOperand (MCInst &Inst, uint64_t Imm, int64_t Address, const void *Decoder)
static DecodeStatus decodeImm7_22Operand (MCInst &Inst, uint64_t Imm, int64_t Address, const void *Decoder)
static DecodeStatus decodeSelect_256Operand (MCInst &Inst, uint64_t Imm, int64_t Address, const void *Decoder)
static DecodeStatus decodeMem8Operand (MCInst &Inst, uint64_t Imm, int64_t Address, const void *Decoder)
static DecodeStatus decodeMem16Operand (MCInst &Inst, uint64_t Imm, int64_t Address, const void *Decoder)
static DecodeStatus decodeMem32Operand (MCInst &Inst, uint64_t Imm, int64_t Address, const void *Decoder)
static DecodeStatus decodeMem32nOperand (MCInst &Inst, uint64_t Imm, int64_t Address, const void *Decoder)
static DecodeStatus readInstruction16 (ArrayRef< uint8_t > Bytes, uint64_t Address, uint64_t &Size, uint64_t &Insn, bool IsLittleEndian)
 Read two bytes from the ArrayRef and return 16 bit data sorted according to the given endianness.
static DecodeStatus readInstruction24 (ArrayRef< uint8_t > Bytes, uint64_t Address, uint64_t &Size, uint64_t &Insn, bool IsLittleEndian)
 Read three bytes from the ArrayRef and return 24 bit data.

Variables

const MCPhysReg ARDecoderTable []
const DecodeRegister SRDecoderTable []
static int64_t TableB4const [16]
static int64_t TableB4constu [16]

Macro Definition Documentation

◆ DEBUG_TYPE

#define DEBUG_TYPE   "Xtensa-disassembler"

Definition at line 30 of file XtensaDisassembler.cpp.

Function Documentation

◆ createXtensaDisassembler()

MCDisassembler * createXtensaDisassembler ( const Target & T,
const MCSubtargetInfo & STI,
MCContext & Ctx )
static

Definition at line 51 of file XtensaDisassembler.cpp.

References T.

Referenced by LLVMInitializeXtensaDisassembler().

◆ DecodeARRegisterClass()

DecodeStatus DecodeARRegisterClass ( MCInst & Inst,
uint64_t RegNo,
uint64_t Address,
const void * Decoder )
static

Definition at line 67 of file XtensaDisassembler.cpp.

References llvm::MCInst::addOperand(), ARDecoderTable, llvm::MCOperand::createReg(), Decoder, llvm::MCDisassembler::Fail, Reg, llvm::MCDisassembler::Success, and uint64_t.

Referenced by decodeMem16Operand(), decodeMem32nOperand(), decodeMem32Operand(), and decodeMem8Operand().

◆ decodeB4constOperand()

DecodeStatus decodeB4constOperand ( MCInst & Inst,
uint64_t Imm,
int64_t Address,
const void * Decoder )
static

Definition at line 392 of file XtensaDisassembler.cpp.

References llvm::MCInst::addOperand(), assert(), llvm::MCOperand::createImm(), Decoder, Imm, llvm::isUInt(), llvm::MCDisassembler::Success, TableB4const, and uint64_t.

◆ decodeB4constuOperand()

DecodeStatus decodeB4constuOperand ( MCInst & Inst,
uint64_t Imm,
int64_t Address,
const void * Decoder )
static

Definition at line 402 of file XtensaDisassembler.cpp.

References llvm::MCInst::addOperand(), assert(), llvm::MCOperand::createImm(), Decoder, Imm, llvm::isUInt(), llvm::MCDisassembler::Success, TableB4constu, and uint64_t.

◆ decodeBranchOperand()

DecodeStatus decodeBranchOperand ( MCInst & Inst,
uint64_t Imm,
int64_t Address,
const void * Decoder )
static

Definition at line 254 of file XtensaDisassembler.cpp.

References llvm::MCInst::addOperand(), assert(), llvm::MCOperand::createImm(), Decoder, llvm::MCInst::getOpcode(), Imm, llvm::isUInt(), llvm::SignExtend64(), llvm::MCDisassembler::Success, tryAddingSymbolicOperand(), and uint64_t.

◆ DecodeBRRegisterClass()

DecodeStatus DecodeBRRegisterClass ( MCInst & Inst,
uint64_t RegNo,
uint64_t Address,
const void * Decoder )
static

Definition at line 219 of file XtensaDisassembler.cpp.

References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), Decoder, llvm::MCDisassembler::Fail, Reg, llvm::MCDisassembler::Success, and uint64_t.

◆ decodeCallOperand()

DecodeStatus decodeCallOperand ( MCInst & Inst,
uint64_t Imm,
int64_t Address,
const void * Decoder )
static

Definition at line 239 of file XtensaDisassembler.cpp.

References llvm::MCInst::addOperand(), assert(), llvm::MCOperand::createImm(), Decoder, Imm, llvm::isUInt(), llvm::SignExtend64(), llvm::MCDisassembler::Success, and uint64_t.

◆ decodeEntry_Imm12OpValue()

DecodeStatus decodeEntry_Imm12OpValue ( MCInst & Inst,
uint64_t Imm,
int64_t Address,
const void * Decoder )
static

Definition at line 374 of file XtensaDisassembler.cpp.

References llvm::MCInst::addOperand(), assert(), llvm::MCOperand::createImm(), Decoder, Imm, llvm::isUInt(), llvm::MCDisassembler::Success, and uint64_t.

◆ DecodeFPRRegisterClass()

DecodeStatus DecodeFPRRegisterClass ( MCInst & Inst,
uint64_t RegNo,
uint64_t Address,
const void * Decoder )
static

Definition at line 111 of file XtensaDisassembler.cpp.

References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), Decoder, llvm::MCDisassembler::Fail, Reg, llvm::MCDisassembler::Success, and uint64_t.

◆ decodeImm12Operand()

DecodeStatus decodeImm12Operand ( MCInst & Inst,
uint64_t Imm,
int64_t Address,
const void * Decoder )
static

Definition at line 309 of file XtensaDisassembler.cpp.

References llvm::MCInst::addOperand(), assert(), llvm::MCOperand::createImm(), Decoder, Imm, llvm::isUInt(), llvm::SignExtend64(), llvm::MCDisassembler::Success, and uint64_t.

◆ decodeImm1_16Operand()

DecodeStatus decodeImm1_16Operand ( MCInst & Inst,
uint64_t Imm,
int64_t Address,
const void * Decoder )
static

Definition at line 330 of file XtensaDisassembler.cpp.

References llvm::MCInst::addOperand(), assert(), llvm::MCOperand::createImm(), Decoder, Imm, llvm::isUInt(), llvm::MCDisassembler::Success, and uint64_t.

◆ decodeImm1n_15Operand()

DecodeStatus decodeImm1n_15Operand ( MCInst & Inst,
uint64_t Imm,
int64_t Address,
const void * Decoder )
static

Definition at line 337 of file XtensaDisassembler.cpp.

References llvm::MCInst::addOperand(), assert(), llvm::MCOperand::createImm(), Decoder, Imm, llvm::isUInt(), llvm::MCDisassembler::Success, and uint64_t.

◆ decodeImm32n_95Operand()

DecodeStatus decodeImm32n_95Operand ( MCInst & Inst,
uint64_t Imm,
int64_t Address,
const void * Decoder )
static

Definition at line 348 of file XtensaDisassembler.cpp.

References llvm::MCInst::addOperand(), assert(), llvm::MCOperand::createImm(), Decoder, Imm, llvm::isUInt(), llvm::MCDisassembler::Success, and uint64_t.

◆ decodeImm64n_4nOperand()

DecodeStatus decodeImm64n_4nOperand ( MCInst & Inst,
uint64_t Imm,
int64_t Address,
const void * Decoder )
static

Definition at line 366 of file XtensaDisassembler.cpp.

References llvm::MCInst::addOperand(), assert(), llvm::MCOperand::createImm(), Decoder, Imm, llvm::isUInt(), llvm::MCDisassembler::Success, and uint64_t.

◆ decodeImm7_22Operand()

DecodeStatus decodeImm7_22Operand ( MCInst & Inst,
uint64_t Imm,
int64_t Address,
const void * Decoder )
static

Definition at line 411 of file XtensaDisassembler.cpp.

References llvm::MCInst::addOperand(), assert(), llvm::MCOperand::createImm(), Decoder, Imm, llvm::isUInt(), llvm::MCDisassembler::Success, and uint64_t.

◆ decodeImm8_sh8Operand()

DecodeStatus decodeImm8_sh8Operand ( MCInst & Inst,
uint64_t Imm,
int64_t Address,
const void * Decoder )
static

Definition at line 301 of file XtensaDisassembler.cpp.

References llvm::MCInst::addOperand(), assert(), llvm::MCOperand::createImm(), Decoder, Imm, llvm::isUInt(), llvm::SignExtend64(), llvm::MCDisassembler::Success, and uint64_t.

◆ decodeImm8n_7Operand()

DecodeStatus decodeImm8n_7Operand ( MCInst & Inst,
uint64_t Imm,
int64_t Address,
const void * Decoder )
static

Definition at line 359 of file XtensaDisassembler.cpp.

References llvm::MCInst::addOperand(), assert(), llvm::MCOperand::createImm(), Decoder, Imm, llvm::isUInt(), llvm::MCDisassembler::Success, and uint64_t.

◆ decodeImm8Operand()

DecodeStatus decodeImm8Operand ( MCInst & Inst,
uint64_t Imm,
int64_t Address,
const void * Decoder )
static

Definition at line 294 of file XtensaDisassembler.cpp.

References llvm::MCInst::addOperand(), assert(), llvm::MCOperand::createImm(), Decoder, Imm, llvm::isUInt(), llvm::SignExtend64(), llvm::MCDisassembler::Success, and uint64_t.

◆ decodeJumpOperand()

DecodeStatus decodeJumpOperand ( MCInst & Inst,
uint64_t Imm,
int64_t Address,
const void * Decoder )
static

Definition at line 247 of file XtensaDisassembler.cpp.

References llvm::MCInst::addOperand(), assert(), llvm::MCOperand::createImm(), Decoder, Imm, llvm::isUInt(), llvm::SignExtend64(), llvm::MCDisassembler::Success, and uint64_t.

◆ decodeL32ROperand()

DecodeStatus decodeL32ROperand ( MCInst & Inst,
uint64_t Imm,
int64_t Address,
const void * Decoder )
static

Definition at line 285 of file XtensaDisassembler.cpp.

References llvm::MCInst::addOperand(), assert(), llvm::MCOperand::createImm(), Decoder, Imm, llvm::isUInt(), llvm::SignExtend64(), llvm::MCDisassembler::Success, and uint64_t.

◆ decodeLoopOperand()

DecodeStatus decodeLoopOperand ( MCInst & Inst,
uint64_t Imm,
int64_t Address,
const void * Decoder )
static

Definition at line 275 of file XtensaDisassembler.cpp.

References llvm::MCInst::addOperand(), assert(), llvm::MCOperand::createImm(), Decoder, Imm, llvm::isUInt(), llvm::MCDisassembler::Success, tryAddingSymbolicOperand(), and uint64_t.

◆ decodeMem16Operand()

DecodeStatus decodeMem16Operand ( MCInst & Inst,
uint64_t Imm,
int64_t Address,
const void * Decoder )
static

Definition at line 434 of file XtensaDisassembler.cpp.

References llvm::MCInst::addOperand(), assert(), llvm::MCOperand::createImm(), DecodeARRegisterClass(), Decoder, Imm, llvm::isUInt(), llvm::MCDisassembler::Success, and uint64_t.

◆ decodeMem32nOperand()

DecodeStatus decodeMem32nOperand ( MCInst & Inst,
uint64_t Imm,
int64_t Address,
const void * Decoder )
static

Definition at line 450 of file XtensaDisassembler.cpp.

References llvm::MCInst::addOperand(), assert(), llvm::MCOperand::createImm(), DecodeARRegisterClass(), Decoder, Imm, llvm::isUInt(), llvm::MCDisassembler::Success, and uint64_t.

◆ decodeMem32Operand()

DecodeStatus decodeMem32Operand ( MCInst & Inst,
uint64_t Imm,
int64_t Address,
const void * Decoder )
static

Definition at line 442 of file XtensaDisassembler.cpp.

References llvm::MCInst::addOperand(), assert(), llvm::MCOperand::createImm(), DecodeARRegisterClass(), Decoder, Imm, llvm::isUInt(), llvm::MCDisassembler::Success, and uint64_t.

◆ decodeMem8Operand()

DecodeStatus decodeMem8Operand ( MCInst & Inst,
uint64_t Imm,
int64_t Address,
const void * Decoder )
static

Definition at line 426 of file XtensaDisassembler.cpp.

References llvm::MCInst::addOperand(), assert(), llvm::MCOperand::createImm(), DecodeARRegisterClass(), Decoder, Imm, llvm::isUInt(), llvm::MCDisassembler::Success, and uint64_t.

◆ DecodeMR01RegisterClass()

DecodeStatus DecodeMR01RegisterClass ( MCInst & Inst,
uint64_t RegNo,
uint64_t Address,
const void * Decoder )
static

Definition at line 89 of file XtensaDisassembler.cpp.

References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), Decoder, llvm::MCDisassembler::Fail, Reg, llvm::MCDisassembler::Success, and uint64_t.

◆ DecodeMR23RegisterClass()

DecodeStatus DecodeMR23RegisterClass ( MCInst & Inst,
uint64_t RegNo,
uint64_t Address,
const void * Decoder )
static

Definition at line 100 of file XtensaDisassembler.cpp.

References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), Decoder, llvm::MCDisassembler::Fail, Reg, llvm::MCDisassembler::Success, and uint64_t.

◆ DecodeMRRegisterClass()

DecodeStatus DecodeMRRegisterClass ( MCInst & Inst,
uint64_t RegNo,
uint64_t Address,
const void * Decoder )
static

Definition at line 78 of file XtensaDisassembler.cpp.

References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), Decoder, llvm::MCDisassembler::Fail, Reg, llvm::MCDisassembler::Success, and uint64_t.

◆ decodeSelect_256Operand()

DecodeStatus decodeSelect_256Operand ( MCInst & Inst,
uint64_t Imm,
int64_t Address,
const void * Decoder )
static

Definition at line 418 of file XtensaDisassembler.cpp.

References llvm::MCInst::addOperand(), assert(), llvm::MCOperand::createImm(), Decoder, Imm, llvm::isUInt(), llvm::MCDisassembler::Success, and uint64_t.

◆ decodeShimm1_31Operand()

DecodeStatus decodeShimm1_31Operand ( MCInst & Inst,
uint64_t Imm,
int64_t Address,
const void * Decoder )
static

Definition at line 382 of file XtensaDisassembler.cpp.

References llvm::MCInst::addOperand(), assert(), llvm::MCOperand::createImm(), Decoder, Imm, llvm::isUInt(), llvm::MCDisassembler::Success, and uint64_t.

◆ DecodeSRRegisterClass()

DecodeStatus DecodeSRRegisterClass ( MCInst & Inst,
uint64_t RegNo,
uint64_t Address,
const MCDisassembler * Decoder )
static

Definition at line 185 of file XtensaDisassembler.cpp.

References llvm::MCInst::addOperand(), llvm::Xtensa::checkRegister(), llvm::MCOperand::createReg(), Decoder, llvm::MCDisassembler::Fail, llvm::MCInst::getOpcode(), Reg, llvm::Xtensa::REGISTER_EXCHANGE, llvm::Xtensa::REGISTER_READ, llvm::Xtensa::REGISTER_WRITE, SRDecoderTable, llvm::MCDisassembler::Success, and uint64_t.

◆ decodeUimm4Operand()

DecodeStatus decodeUimm4Operand ( MCInst & Inst,
uint64_t Imm,
int64_t Address,
const void * Decoder )
static

Definition at line 316 of file XtensaDisassembler.cpp.

References llvm::MCInst::addOperand(), assert(), llvm::MCOperand::createImm(), Decoder, Imm, llvm::isUInt(), llvm::MCDisassembler::Success, and uint64_t.

◆ decodeUimm5Operand()

DecodeStatus decodeUimm5Operand ( MCInst & Inst,
uint64_t Imm,
int64_t Address,
const void * Decoder )
static

Definition at line 323 of file XtensaDisassembler.cpp.

References llvm::MCInst::addOperand(), assert(), llvm::MCOperand::createImm(), Decoder, Imm, llvm::isUInt(), llvm::MCDisassembler::Success, and uint64_t.

◆ DecodeURRegisterClass()

DecodeStatus DecodeURRegisterClass ( MCInst & Inst,
uint64_t RegNo,
uint64_t Address,
const MCDisassembler * Decoder )
static

Definition at line 122 of file XtensaDisassembler.cpp.

References llvm::MCInst::addOperand(), llvm::Xtensa::checkRegister(), llvm::MCOperand::createReg(), Decoder, llvm::MCDisassembler::Fail, llvm::MCInst::getOpcode(), llvm::Xtensa::getUserRegister(), Reg, llvm::Xtensa::REGISTER_READ, llvm::Xtensa::REGISTER_WRITE, llvm::MCDisassembler::Success, and uint64_t.

◆ LLVMInitializeXtensaDisassembler()

LLVM_EXTERNAL_VISIBILITY void LLVMInitializeXtensaDisassembler ( )

Definition at line 57 of file XtensaDisassembler.cpp.

References createXtensaDisassembler(), llvm::getTheXtensaTarget(), LLVM_EXTERNAL_VISIBILITY, and llvm::TargetRegistry::RegisterMCDisassembler().

◆ readInstruction16()

DecodeStatus readInstruction16 ( ArrayRef< uint8_t > Bytes,
uint64_t Address,
uint64_t & Size,
uint64_t & Insn,
bool IsLittleEndian )
static

Read two bytes from the ArrayRef and return 16 bit data sorted according to the given endianness.

Definition at line 460 of file XtensaDisassembler.cpp.

References llvm::MCDisassembler::Fail, llvm::report_fatal_error(), Size, llvm::ArrayRef< T >::size(), llvm::MCDisassembler::Success, and uint64_t.

◆ readInstruction24()

DecodeStatus readInstruction24 ( ArrayRef< uint8_t > Bytes,
uint64_t Address,
uint64_t & Size,
uint64_t & Insn,
bool IsLittleEndian )
static

Read three bytes from the ArrayRef and return 24 bit data.

Definition at line 479 of file XtensaDisassembler.cpp.

References llvm::MCDisassembler::Fail, llvm::report_fatal_error(), Size, llvm::ArrayRef< T >::size(), llvm::MCDisassembler::Success, and uint64_t.

◆ tryAddingSymbolicOperand()

bool tryAddingSymbolicOperand ( int64_t Value,
bool isBranch,
uint64_t Address,
uint64_t Offset,
uint64_t InstSize,
MCInst & MI,
const void * Decoder )
static

Definition at line 230 of file XtensaDisassembler.cpp.

References Decoder, isBranch(), MI, llvm::Offset, llvm::MCDisassembler::tryAddingSymbolicOperand(), and uint64_t.

Referenced by decodeBranchOperand(), and decodeLoopOperand().

Variable Documentation

◆ ARDecoderTable

const MCPhysReg ARDecoderTable[]
Initial value:
= {
Xtensa::A0, Xtensa::SP, Xtensa::A2, Xtensa::A3, Xtensa::A4, Xtensa::A5,
Xtensa::A6, Xtensa::A7, Xtensa::A8, Xtensa::A9, Xtensa::A10, Xtensa::A11,
Xtensa::A12, Xtensa::A13, Xtensa::A14, Xtensa::A15}

Definition at line 62 of file XtensaDisassembler.cpp.

Referenced by DecodeARRegisterClass().

◆ SRDecoderTable

const DecodeRegister SRDecoderTable[]

Definition at line 149 of file XtensaDisassembler.cpp.

Referenced by DecodeSRRegisterClass().

◆ TableB4const

int64_t TableB4const[16]
static
Initial value:
= {-1, 1, 2, 3, 4, 5, 6, 7,
8, 10, 12, 16, 32, 64, 128, 256}

Definition at line 390 of file XtensaDisassembler.cpp.

Referenced by decodeB4constOperand().

◆ TableB4constu

int64_t TableB4constu[16]
static
Initial value:
= {32768, 65536, 2, 3, 4, 5, 6, 7,
8, 10, 12, 16, 32, 64, 128, 256}

Definition at line 400 of file XtensaDisassembler.cpp.

Referenced by decodeB4constuOperand().

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