34#include "llvm/Config/llvm-config.h"
40#define DEBUG_TYPE "machine-stable-hash"
45 "Number of encountered unsupported MachineOperands that were "
46 "MachineBasicBlocks while computing stable hashes");
48 "Number of encountered unsupported MachineOperands that were "
49 "ConstantPoolIndex while computing stable hashes");
51 "Number of encountered unsupported MachineOperands that were "
52 "TargetIndex with no name");
54 "Number of encountered unsupported MachineOperands that were "
55 "GlobalAddress while computing stable hashes");
57 "Number of encountered unsupported MachineOperands that were "
58 "BlockAddress while computing stable hashes");
60 "Number of encountered unsupported MachineOperands that were "
61 "Metadata of an unsupported kind while computing stable hashes");
69 for (
auto &Def :
MRI.def_instructions(MO.
getReg()))
89 StableHashBailingMachineBasicBlock++;
92 StableHashBailingConstantPoolIndex++;
95 StableHashBailingBlockAddress++;
98 StableHashBailingMetadataUnsupported++;
101 StableHashBailingGlobalAddress++;
108 StableHashBailingTargetIndexNoName++;
127 unsigned RegMaskSize =
130 std::vector<llvm::stable_hash> RegMaskHashes(RegMask,
131 RegMask + RegMaskSize);
134 RegMaskHashes.size()));
139 assert(0 &&
"MachineOperand not associated with any MachineFunction");
144 std::vector<llvm::stable_hash> ShuffleMaskHashes;
152 ShuffleMaskHashes.size()));
180 bool HashConstantPoolIndices,
181 bool HashMemOperands) {
184 HashComponents.
reserve(
MI.getNumOperands() +
MI.getNumMemOperands() + 2);
188 if (!HashVRegs && MO.isReg() && MO.isDef() && MO.getReg().isVirtual())
193 MO.getType(), MO.getTargetFlags(), MO.getIndex()));
203 for (
const auto *Op :
MI.memoperands()) {
204 if (!HashMemOperands)
206 HashComponents.
push_back(
static_cast<unsigned>(Op->getSize()));
207 HashComponents.
push_back(
static_cast<unsigned>(Op->getFlags()));
208 HashComponents.
push_back(
static_cast<unsigned>(Op->getOffset()));
209 HashComponents.
push_back(
static_cast<unsigned>(Op->getSuccessOrdering()));
210 HashComponents.
push_back(
static_cast<unsigned>(Op->getAddrSpace()));
211 HashComponents.
push_back(
static_cast<unsigned>(Op->getSyncScopeID()));
212 HashComponents.
push_back(
static_cast<unsigned>(Op->getBaseAlign().value()));
213 HashComponents.
push_back(
static_cast<unsigned>(Op->getFailureOrdering()));
217 HashComponents.
end());
223 for (
const auto &
MI :
MBB)
226 HashComponents.
end());
232 for (
const auto &
MBB : MF)
235 HashComponents.
end());
unsigned const MachineRegisterInfo * MRI
This file declares a class to represent arbitrary precision floating point values and provide a varie...
This file implements a class to represent arbitrary precision integral constant values and operations...
This file contains the declarations for the subclasses of Constant, which represent the different fla...
This file defines DenseMapInfo traits for DenseMap.
unsigned const TargetRegisterInfo * TRI
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
This file defines the SmallVector class.
This file defines the 'Statistic' class, which is designed to be an easy way to expose various metric...
#define STATISTIC(VARNAME, DESC)
APInt bitcastToAPInt() const
const APFloat & getValueAPF() const
const APInt & getValue() const
Return the constant as an APInt value reference.
StringRef getName() const
getName - Get the symbol name.
const MachineFunction * getParent() const
Return the MachineFunction containing this basic block.
MachineRegisterInfo & getRegInfo()
getRegInfo - Return information about the registers currently in use.
Representation of each machine instruction.
const MachineFunction * getMF() const
Return the function that contains the basic block that this instruction belongs to.
MachineOperand class - Representation of each machine instruction operand.
unsigned getSubReg() const
unsigned getInstrRefOpIndex() const
const ConstantInt * getCImm() const
const char * getTargetIndexName() const
getTargetIndexName - If this MachineOperand is a TargetIndex that has a name, attempt to get the name...
bool isCImm() const
isCImm - Test if this is a MO_CImmediate operand.
unsigned getInstrRefInstrIndex() const
ArrayRef< int > getShuffleMask() const
unsigned getCFIIndex() const
MachineInstr * getParent()
getParent - Return the instruction that this operand belongs to.
static unsigned getRegMaskSize(unsigned NumRegs)
Returns number of elements needed for a regmask array.
unsigned getTargetFlags() const
MachineOperandType getType() const
getType - Returns the MachineOperandType for this operand.
const char * getSymbolName() const
Register getReg() const
getReg - Returns the register number.
Intrinsic::ID getIntrinsicID() const
const uint32_t * getRegMask() const
getRegMask - Returns a bit mask of registers preserved by this RegMask operand.
const ConstantFP * getFPImm() const
unsigned getPredicate() const
MCSymbol * getMCSymbol() const
@ MO_CFIIndex
MCCFIInstruction index.
@ MO_Immediate
Immediate operand.
@ MO_ConstantPoolIndex
Address of indexed Constant in Constant Pool.
@ MO_MCSymbol
MCSymbol reference (for debug/eh info)
@ MO_Predicate
Generic predicate for ISel.
@ MO_GlobalAddress
Address of a global value.
@ MO_RegisterMask
Mask of preserved registers.
@ MO_ShuffleMask
Other IR Constant for ISel (shuffle masks)
@ MO_CImmediate
Immediate >64bit operand.
@ MO_BlockAddress
Address of a basic block.
@ MO_DbgInstrRef
Integer indices referring to an instruction+operand.
@ MO_MachineBasicBlock
MachineBasicBlock reference.
@ MO_FrameIndex
Abstract Stack Frame Index.
@ MO_Register
Register operand.
@ MO_ExternalSymbol
Name of external global symbol.
@ MO_IntrinsicID
Intrinsic ID for ISel.
@ MO_JumpTableIndex
Address of indexed Jump Table for switch.
@ MO_TargetIndex
Target-dependent index+offset operand.
@ MO_Metadata
Metadata reference (for debug info)
@ MO_FPImmediate
Floating-point immediate operand.
@ MO_RegisterLiveOut
Mask of live-out registers.
int64_t getOffset() const
Return the offset from the symbol in this operand.
MachineRegisterInfo - Keep track of information for virtual and physical registers,...
constexpr bool isVirtual() const
Return true if the specified register number is in the virtual register namespace.
void reserve(size_type N)
void push_back(const T &Elt)
This is a 'vector' (really, a variable-sized array), optimized for the case when the array is small.
TargetRegisterInfo base class - We assume that the target defines a static array of TargetRegisterDes...
This provides a very simple, boring adaptor for a begin and end iterator into a range type.
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
This is an optimization pass for GlobalISel generic memory operations.
stable_hash stable_hash_combine_range(InputIteratorT First, InputIteratorT Last)
Compute a stable_hash for a sequence of values.
OutputIt transform(R &&Range, OutputIt d_first, UnaryFunction F)
Wrapper function around std::transform to apply a function to a range and store the result elsewhere.
stable_hash stable_hash_combine_array(const stable_hash *P, size_t C)
stable_hash stableHashValue(const MachineOperand &MO)
stable_hash stable_hash_combine(stable_hash A, stable_hash B)
stable_hash stable_hash_combine_string(const StringRef &S)
hash_code hash_combine(const Ts &...args)
Combine values into a single hash_code.
hash_code hash_combine_range(InputIteratorT first, InputIteratorT last)
Compute a hash_code for a sequence of values.