LLVM  14.0.0git
SystemZFrameLowering.cpp
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1 //===-- SystemZFrameLowering.cpp - Frame lowering for SystemZ -------------===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 
9 #include "SystemZFrameLowering.h"
10 #include "SystemZCallingConv.h"
11 #include "SystemZInstrBuilder.h"
12 #include "SystemZInstrInfo.h"
14 #include "SystemZRegisterInfo.h"
15 #include "SystemZSubtarget.h"
19 #include "llvm/IR/Function.h"
21 
22 using namespace llvm;
23 
24 namespace {
25 // The ABI-defined register save slots, relative to the CFA (i.e.
26 // incoming stack pointer + SystemZMC::ELFCallFrameSize).
27 static const TargetFrameLowering::SpillSlot SpillOffsetTable[] = {
28  { SystemZ::R2D, 0x10 },
29  { SystemZ::R3D, 0x18 },
30  { SystemZ::R4D, 0x20 },
31  { SystemZ::R5D, 0x28 },
32  { SystemZ::R6D, 0x30 },
33  { SystemZ::R7D, 0x38 },
34  { SystemZ::R8D, 0x40 },
35  { SystemZ::R9D, 0x48 },
36  { SystemZ::R10D, 0x50 },
37  { SystemZ::R11D, 0x58 },
38  { SystemZ::R12D, 0x60 },
39  { SystemZ::R13D, 0x68 },
40  { SystemZ::R14D, 0x70 },
41  { SystemZ::R15D, 0x78 },
42  { SystemZ::F0D, 0x80 },
43  { SystemZ::F2D, 0x88 },
44  { SystemZ::F4D, 0x90 },
45  { SystemZ::F6D, 0x98 }
46 };
47 } // end anonymous namespace
48 
50  int LAO, Align TransAl,
51  bool StackReal)
52  : TargetFrameLowering(D, StackAl, LAO, TransAl, StackReal) {}
53 
54 std::unique_ptr<SystemZFrameLowering>
56  if (STI.isTargetXPLINK64())
57  return std::make_unique<SystemZXPLINKFrameLowering>();
58  return std::make_unique<SystemZELFFrameLowering>();
59 }
60 
64  switch (MI->getOpcode()) {
65  case SystemZ::ADJCALLSTACKDOWN:
66  case SystemZ::ADJCALLSTACKUP:
68  "ADJSTACKDOWN and ADJSTACKUP should be no-ops");
69  return MBB.erase(MI);
70  break;
71 
72  default:
73  llvm_unreachable("Unexpected call frame instruction");
74  }
75 }
76 
78  const MachineFunction &MF) const {
79  // The ELF ABI requires us to allocate 160 bytes of stack space for the
80  // callee, with any outgoing stack arguments being placed above that. It
81  // seems better to make that area a permanent feature of the frame even if
82  // we're using a frame pointer. Similarly, 64-bit XPLINK requires 96 bytes
83  // of stack space for the register save area.
84  return true;
85 }
86 
89  std::vector<CalleeSavedInfo> &CSI) const {
91  MachineFrameInfo &MFFrame = MF.getFrameInfo();
92  bool IsVarArg = MF.getFunction().isVarArg();
93  if (CSI.empty())
94  return true; // Early exit if no callee saved registers are modified!
95 
96  unsigned LowGPR = 0;
97  unsigned HighGPR = SystemZ::R15D;
98  int StartSPOffset = SystemZMC::ELFCallFrameSize;
99  for (auto &CS : CSI) {
100  unsigned Reg = CS.getReg();
101  int Offset = getRegSpillOffset(MF, Reg);
102  if (Offset) {
103  if (SystemZ::GR64BitRegClass.contains(Reg) && StartSPOffset > Offset) {
104  LowGPR = Reg;
105  StartSPOffset = Offset;
106  }
108  int FrameIdx = MFFrame.CreateFixedSpillStackObject(8, Offset);
109  CS.setFrameIdx(FrameIdx);
110  } else
111  CS.setFrameIdx(INT32_MAX);
112  }
113 
114  // Save the range of call-saved registers, for use by the
115  // prologue/epilogue inserters.
116  ZFI->setRestoreGPRRegs(LowGPR, HighGPR, StartSPOffset);
117  if (IsVarArg) {
118  // Also save the GPR varargs, if any. R6D is call-saved, so would
119  // already be included, but we also need to handle the call-clobbered
120  // argument registers.
121  unsigned FirstGPR = ZFI->getVarArgsFirstGPR();
122  if (FirstGPR < SystemZ::ELFNumArgGPRs) {
123  unsigned Reg = SystemZ::ELFArgGPRs[FirstGPR];
124  int Offset = getRegSpillOffset(MF, Reg);
125  if (StartSPOffset > Offset) {
126  LowGPR = Reg; StartSPOffset = Offset;
127  }
128  }
129  }
130  ZFI->setSpillGPRRegs(LowGPR, HighGPR, StartSPOffset);
131 
132  // Create fixed stack objects for the remaining registers.
133  int CurrOffset = -SystemZMC::ELFCallFrameSize;
134  if (usePackedStack(MF))
135  CurrOffset += StartSPOffset;
136 
137  for (auto &CS : CSI) {
138  if (CS.getFrameIdx() != INT32_MAX)
139  continue;
140  unsigned Reg = CS.getReg();
142  unsigned Size = TRI->getSpillSize(*RC);
143  CurrOffset -= Size;
144  assert(CurrOffset % 8 == 0 &&
145  "8-byte alignment required for for all register save slots");
146  int FrameIdx = MFFrame.CreateFixedSpillStackObject(Size, CurrOffset);
147  CS.setFrameIdx(FrameIdx);
148  }
149 
150  return true;
151 }
152 
154  BitVector &SavedRegs,
155  RegScavenger *RS) const {
157 
158  MachineFrameInfo &MFFrame = MF.getFrameInfo();
160  bool HasFP = hasFP(MF);
162  bool IsVarArg = MF.getFunction().isVarArg();
163 
164  // va_start stores incoming FPR varargs in the normal way, but delegates
165  // the saving of incoming GPR varargs to spillCalleeSavedRegisters().
166  // Record these pending uses, which typically include the call-saved
167  // argument register R6D.
168  if (IsVarArg)
169  for (unsigned I = MFI->getVarArgsFirstGPR(); I < SystemZ::ELFNumArgGPRs; ++I)
170  SavedRegs.set(SystemZ::ELFArgGPRs[I]);
171 
172  // If there are any landing pads, entering them will modify r6/r7.
173  if (!MF.getLandingPads().empty()) {
174  SavedRegs.set(SystemZ::R6D);
175  SavedRegs.set(SystemZ::R7D);
176  }
177 
178  // If the function requires a frame pointer, record that the hard
179  // frame pointer will be clobbered.
180  if (HasFP)
181  SavedRegs.set(SystemZ::R11D);
182 
183  // If the function calls other functions, record that the return
184  // address register will be clobbered.
185  if (MFFrame.hasCalls())
186  SavedRegs.set(SystemZ::R14D);
187 
188  // If we are saving GPRs other than the stack pointer, we might as well
189  // save and restore the stack pointer at the same time, via STMG and LMG.
190  // This allows the deallocation to be done by the LMG, rather than needing
191  // a separate %r15 addition.
192  const MCPhysReg *CSRegs = TRI->getCalleeSavedRegs(&MF);
193  for (unsigned I = 0; CSRegs[I]; ++I) {
194  unsigned Reg = CSRegs[I];
195  if (SystemZ::GR64BitRegClass.contains(Reg) && SavedRegs.test(Reg)) {
196  SavedRegs.set(SystemZ::R15D);
197  break;
198  }
199  }
200 }
201 
203  : SystemZFrameLowering(TargetFrameLowering::StackGrowsDown, Align(8), 0,
204  Align(8), false /* StackRealignable */),
205  RegSpillOffsets(0) {
206  // Due to the SystemZ ABI, the DWARF CFA (Canonical Frame Address) is not
207  // equal to the incoming stack pointer, but to incoming stack pointer plus
208  // 160. Instead of using a Local Area Offset, the Register save area will
209  // be occupied by fixed frame objects, and all offsets are actually
210  // relative to CFA.
211 
212  // Create a mapping from register number to save slot offset.
213  // These offsets are relative to the start of the register save area.
214  RegSpillOffsets.grow(SystemZ::NUM_TARGET_REGS);
215  for (unsigned I = 0, E = array_lengthof(SpillOffsetTable); I != E; ++I)
216  RegSpillOffsets[SpillOffsetTable[I].Reg] = SpillOffsetTable[I].Offset;
217 }
218 
219 // Add GPR64 to the save instruction being built by MIB, which is in basic
220 // block MBB. IsImplicit says whether this is an explicit operand to the
221 // instruction, or an implicit one that comes between the explicit start
222 // and end registers.
224  unsigned GPR64, bool IsImplicit) {
225  const TargetRegisterInfo *RI =
227  Register GPR32 = RI->getSubReg(GPR64, SystemZ::subreg_l32);
228  bool IsLive = MBB.isLiveIn(GPR64) || MBB.isLiveIn(GPR32);
229  if (!IsLive || !IsImplicit) {
230  MIB.addReg(GPR64, getImplRegState(IsImplicit) | getKillRegState(!IsLive));
231  if (!IsLive)
232  MBB.addLiveIn(GPR64);
233  }
234 }
235 
239  if (CSI.empty())
240  return false;
241 
242  MachineFunction &MF = *MBB.getParent();
245  bool IsVarArg = MF.getFunction().isVarArg();
246  DebugLoc DL;
247 
248  // Save GPRs
249  SystemZ::GPRRegs SpillGPRs = ZFI->getSpillGPRRegs();
250  if (SpillGPRs.LowGPR) {
251  assert(SpillGPRs.LowGPR != SpillGPRs.HighGPR &&
252  "Should be saving %r15 and something else");
253 
254  // Build an STMG instruction.
255  MachineInstrBuilder MIB = BuildMI(MBB, MBBI, DL, TII->get(SystemZ::STMG));
256 
257  // Add the explicit register operands.
258  addSavedGPR(MBB, MIB, SpillGPRs.LowGPR, false);
259  addSavedGPR(MBB, MIB, SpillGPRs.HighGPR, false);
260 
261  // Add the address.
262  MIB.addReg(SystemZ::R15D).addImm(SpillGPRs.GPROffset);
263 
264  // Make sure all call-saved GPRs are included as operands and are
265  // marked as live on entry.
266  for (unsigned I = 0, E = CSI.size(); I != E; ++I) {
267  unsigned Reg = CSI[I].getReg();
268  if (SystemZ::GR64BitRegClass.contains(Reg))
269  addSavedGPR(MBB, MIB, Reg, true);
270  }
271 
272  // ...likewise GPR varargs.
273  if (IsVarArg)
274  for (unsigned I = ZFI->getVarArgsFirstGPR(); I < SystemZ::ELFNumArgGPRs; ++I)
275  addSavedGPR(MBB, MIB, SystemZ::ELFArgGPRs[I], true);
276  }
277 
278  // Save FPRs/VRs in the normal TargetInstrInfo way.
279  for (unsigned I = 0, E = CSI.size(); I != E; ++I) {
280  unsigned Reg = CSI[I].getReg();
281  if (SystemZ::FP64BitRegClass.contains(Reg)) {
282  MBB.addLiveIn(Reg);
283  TII->storeRegToStackSlot(MBB, MBBI, Reg, true, CSI[I].getFrameIdx(),
284  &SystemZ::FP64BitRegClass, TRI);
285  }
286  if (SystemZ::VR128BitRegClass.contains(Reg)) {
287  MBB.addLiveIn(Reg);
288  TII->storeRegToStackSlot(MBB, MBBI, Reg, true, CSI[I].getFrameIdx(),
289  &SystemZ::VR128BitRegClass, TRI);
290  }
291  }
292 
293  return true;
294 }
295 
299  if (CSI.empty())
300  return false;
301 
302  MachineFunction &MF = *MBB.getParent();
305  bool HasFP = hasFP(MF);
306  DebugLoc DL = MBBI != MBB.end() ? MBBI->getDebugLoc() : DebugLoc();
307 
308  // Restore FPRs/VRs in the normal TargetInstrInfo way.
309  for (unsigned I = 0, E = CSI.size(); I != E; ++I) {
310  unsigned Reg = CSI[I].getReg();
311  if (SystemZ::FP64BitRegClass.contains(Reg))
312  TII->loadRegFromStackSlot(MBB, MBBI, Reg, CSI[I].getFrameIdx(),
313  &SystemZ::FP64BitRegClass, TRI);
314  if (SystemZ::VR128BitRegClass.contains(Reg))
315  TII->loadRegFromStackSlot(MBB, MBBI, Reg, CSI[I].getFrameIdx(),
316  &SystemZ::VR128BitRegClass, TRI);
317  }
318 
319  // Restore call-saved GPRs (but not call-clobbered varargs, which at
320  // this point might hold return values).
321  SystemZ::GPRRegs RestoreGPRs = ZFI->getRestoreGPRRegs();
322  if (RestoreGPRs.LowGPR) {
323  // If we saved any of %r2-%r5 as varargs, we should also be saving
324  // and restoring %r6. If we're saving %r6 or above, we should be
325  // restoring it too.
326  assert(RestoreGPRs.LowGPR != RestoreGPRs.HighGPR &&
327  "Should be loading %r15 and something else");
328 
329  // Build an LMG instruction.
330  MachineInstrBuilder MIB = BuildMI(MBB, MBBI, DL, TII->get(SystemZ::LMG));
331 
332  // Add the explicit register operands.
333  MIB.addReg(RestoreGPRs.LowGPR, RegState::Define);
334  MIB.addReg(RestoreGPRs.HighGPR, RegState::Define);
335 
336  // Add the address.
337  MIB.addReg(HasFP ? SystemZ::R11D : SystemZ::R15D);
338  MIB.addImm(RestoreGPRs.GPROffset);
339 
340  // Do a second scan adding regs as being defined by instruction
341  for (unsigned I = 0, E = CSI.size(); I != E; ++I) {
342  unsigned Reg = CSI[I].getReg();
343  if (Reg != RestoreGPRs.LowGPR && Reg != RestoreGPRs.HighGPR &&
344  SystemZ::GR64BitRegClass.contains(Reg))
346  }
347  }
348 
349  return true;
350 }
351 
353  MachineFunction &MF, RegScavenger *RS) const {
354  MachineFrameInfo &MFFrame = MF.getFrameInfo();
357  bool BackChain = MF.getFunction().hasFnAttribute("backchain");
358 
359  if (!usePackedStack(MF) || BackChain)
360  // Create the incoming register save area.
362 
363  // Get the size of our stack frame to be allocated ...
364  uint64_t StackSize = (MFFrame.estimateStackSize(MF) +
366  // ... and the maximum offset we may need to reach into the
367  // caller's frame to access the save area or stack arguments.
368  int64_t MaxArgOffset = 0;
369  for (int I = MFFrame.getObjectIndexBegin(); I != 0; ++I)
370  if (MFFrame.getObjectOffset(I) >= 0) {
371  int64_t ArgOffset = MFFrame.getObjectOffset(I) +
372  MFFrame.getObjectSize(I);
373  MaxArgOffset = std::max(MaxArgOffset, ArgOffset);
374  }
375 
376  uint64_t MaxReach = StackSize + MaxArgOffset;
377  if (!isUInt<12>(MaxReach)) {
378  // We may need register scavenging slots if some parts of the frame
379  // are outside the reach of an unsigned 12-bit displacement.
380  // Create 2 for the case where both addresses in an MVC are
381  // out of range.
382  RS->addScavengingFrameIndex(MFFrame.CreateStackObject(8, Align(8), false));
383  RS->addScavengingFrameIndex(MFFrame.CreateStackObject(8, Align(8), false));
384  }
385 
386  // If R6 is used as an argument register it is still callee saved. If it in
387  // this case is not clobbered (and restored) it should never be marked as
388  // killed.
389  if (MF.front().isLiveIn(SystemZ::R6D) &&
390  ZFI->getRestoreGPRRegs().LowGPR != SystemZ::R6D)
391  for (auto &MO : MRI->use_nodbg_operands(SystemZ::R6D))
392  MO.setIsKill(false);
393 }
394 
395 // Emit instructions before MBBI (in MBB) to add NumBytes to Reg.
398  Register Reg, int64_t NumBytes,
399  const TargetInstrInfo *TII) {
400  while (NumBytes) {
401  unsigned Opcode;
402  int64_t ThisVal = NumBytes;
403  if (isInt<16>(NumBytes))
404  Opcode = SystemZ::AGHI;
405  else {
406  Opcode = SystemZ::AGFI;
407  // Make sure we maintain 8-byte stack alignment.
408  int64_t MinVal = -uint64_t(1) << 31;
409  int64_t MaxVal = (int64_t(1) << 31) - 8;
410  if (ThisVal < MinVal)
411  ThisVal = MinVal;
412  else if (ThisVal > MaxVal)
413  ThisVal = MaxVal;
414  }
415  MachineInstr *MI = BuildMI(MBB, MBBI, DL, TII->get(Opcode), Reg)
416  .addReg(Reg).addImm(ThisVal);
417  // The CC implicit def is dead.
418  MI->getOperand(3).setIsDead();
419  NumBytes -= ThisVal;
420  }
421 }
422 
423 // Add CFI for the new CFA offset.
426  const DebugLoc &DL, int Offset,
427  const SystemZInstrInfo *ZII) {
428  unsigned CFIIndex = MBB.getParent()->addFrameInst(
430  BuildMI(MBB, MBBI, DL, ZII->get(TargetOpcode::CFI_INSTRUCTION))
431  .addCFIIndex(CFIIndex);
432 }
433 
434 // Add CFI for the new frame location.
437  const DebugLoc &DL, unsigned Reg,
438  const SystemZInstrInfo *ZII) {
439  MachineFunction &MF = *MBB.getParent();
440  MachineModuleInfo &MMI = MF.getMMI();
441  const MCRegisterInfo *MRI = MMI.getContext().getRegisterInfo();
442  unsigned RegNum = MRI->getDwarfRegNum(Reg, true);
443  unsigned CFIIndex = MF.addFrameInst(
444  MCCFIInstruction::createDefCfaRegister(nullptr, RegNum));
445  BuildMI(MBB, MBBI, DL, ZII->get(TargetOpcode::CFI_INSTRUCTION))
446  .addCFIIndex(CFIIndex);
447 }
448 
450  MachineBasicBlock &MBB) const {
451  assert(&MF.front() == &MBB && "Shrink-wrapping not yet supported");
453  const SystemZTargetLowering &TLI = *STI.getTargetLowering();
454  MachineFrameInfo &MFFrame = MF.getFrameInfo();
455  auto *ZII = static_cast<const SystemZInstrInfo *>(STI.getInstrInfo());
458  MachineModuleInfo &MMI = MF.getMMI();
459  const MCRegisterInfo *MRI = MMI.getContext().getRegisterInfo();
460  const std::vector<CalleeSavedInfo> &CSI = MFFrame.getCalleeSavedInfo();
461  bool HasFP = hasFP(MF);
462 
463  // In GHC calling convention C stack space, including the ABI-defined
464  // 160-byte base area, is (de)allocated by GHC itself. This stack space may
465  // be used by LLVM as spill slots for the tail recursive GHC functions. Thus
466  // do not allocate stack space here, too.
468  if (MFFrame.getStackSize() > 2048 * sizeof(long)) {
470  "Pre allocated stack space for GHC function is too small");
471  }
472  if (HasFP) {
474  "In GHC calling convention a frame pointer is not supported");
475  }
477  return;
478  }
479 
480  // Debug location must be unknown since the first debug location is used
481  // to determine the end of the prologue.
482  DebugLoc DL;
483 
484  // The current offset of the stack pointer from the CFA.
485  int64_t SPOffsetFromCFA = -SystemZMC::ELFCFAOffsetFromInitialSP;
486 
487  if (ZFI->getSpillGPRRegs().LowGPR) {
488  // Skip over the GPR saves.
489  if (MBBI != MBB.end() && MBBI->getOpcode() == SystemZ::STMG)
490  ++MBBI;
491  else
492  llvm_unreachable("Couldn't skip over GPR saves");
493 
494  // Add CFI for the GPR saves.
495  for (auto &Save : CSI) {
496  unsigned Reg = Save.getReg();
497  if (SystemZ::GR64BitRegClass.contains(Reg)) {
498  int FI = Save.getFrameIdx();
499  int64_t Offset = MFFrame.getObjectOffset(FI);
500  unsigned CFIIndex = MF.addFrameInst(MCCFIInstruction::createOffset(
501  nullptr, MRI->getDwarfRegNum(Reg, true), Offset));
502  BuildMI(MBB, MBBI, DL, ZII->get(TargetOpcode::CFI_INSTRUCTION))
503  .addCFIIndex(CFIIndex);
504  }
505  }
506  }
507 
508  uint64_t StackSize = MFFrame.getStackSize();
509  // We need to allocate the ABI-defined 160-byte base area whenever
510  // we allocate stack space for our own use and whenever we call another
511  // function.
512  bool HasStackObject = false;
513  for (unsigned i = 0, e = MFFrame.getObjectIndexEnd(); i != e; ++i)
514  if (!MFFrame.isDeadObjectIndex(i)) {
515  HasStackObject = true;
516  break;
517  }
518  if (HasStackObject || MFFrame.hasCalls())
519  StackSize += SystemZMC::ELFCallFrameSize;
520  // Don't allocate the incoming reg save area.
521  StackSize = StackSize > SystemZMC::ELFCallFrameSize
522  ? StackSize - SystemZMC::ELFCallFrameSize
523  : 0;
524  MFFrame.setStackSize(StackSize);
525 
526  if (StackSize) {
527  // Allocate StackSize bytes.
528  int64_t Delta = -int64_t(StackSize);
529  const unsigned ProbeSize = TLI.getStackProbeSize(MF);
530  bool FreeProbe = (ZFI->getSpillGPRRegs().GPROffset &&
531  (ZFI->getSpillGPRRegs().GPROffset + StackSize) < ProbeSize);
532  if (!FreeProbe &&
534  // Stack probing may involve looping, but splitting the prologue block
535  // is not possible at this point since it would invalidate the
536  // SaveBlocks / RestoreBlocks sets of PEI in the single block function
537  // case. Build a pseudo to be handled later by inlineStackProbe().
538  BuildMI(MBB, MBBI, DL, ZII->get(SystemZ::PROBED_STACKALLOC))
539  .addImm(StackSize);
540  }
541  else {
542  bool StoreBackchain = MF.getFunction().hasFnAttribute("backchain");
543  // If we need backchain, save current stack pointer. R1 is free at
544  // this point.
545  if (StoreBackchain)
546  BuildMI(MBB, MBBI, DL, ZII->get(SystemZ::LGR))
547  .addReg(SystemZ::R1D, RegState::Define).addReg(SystemZ::R15D);
548  emitIncrement(MBB, MBBI, DL, SystemZ::R15D, Delta, ZII);
549  buildCFAOffs(MBB, MBBI, DL, SPOffsetFromCFA + Delta, ZII);
550  if (StoreBackchain)
551  BuildMI(MBB, MBBI, DL, ZII->get(SystemZ::STG))
552  .addReg(SystemZ::R1D, RegState::Kill).addReg(SystemZ::R15D)
554  }
555  SPOffsetFromCFA += Delta;
556  }
557 
558  if (HasFP) {
559  // Copy the base of the frame to R11.
560  BuildMI(MBB, MBBI, DL, ZII->get(SystemZ::LGR), SystemZ::R11D)
561  .addReg(SystemZ::R15D);
562 
563  // Add CFI for the new frame location.
564  buildDefCFAReg(MBB, MBBI, DL, SystemZ::R11D, ZII);
565 
566  // Mark the FramePtr as live at the beginning of every block except
567  // the entry block. (We'll have marked R11 as live on entry when
568  // saving the GPRs.)
569  for (MachineBasicBlock &MBBJ : llvm::drop_begin(MF))
570  MBBJ.addLiveIn(SystemZ::R11D);
571  }
572 
573  // Skip over the FPR/VR saves.
574  SmallVector<unsigned, 8> CFIIndexes;
575  for (auto &Save : CSI) {
576  unsigned Reg = Save.getReg();
577  if (SystemZ::FP64BitRegClass.contains(Reg)) {
578  if (MBBI != MBB.end() &&
579  (MBBI->getOpcode() == SystemZ::STD ||
580  MBBI->getOpcode() == SystemZ::STDY))
581  ++MBBI;
582  else
583  llvm_unreachable("Couldn't skip over FPR save");
584  } else if (SystemZ::VR128BitRegClass.contains(Reg)) {
585  if (MBBI != MBB.end() &&
586  MBBI->getOpcode() == SystemZ::VST)
587  ++MBBI;
588  else
589  llvm_unreachable("Couldn't skip over VR save");
590  } else
591  continue;
592 
593  // Add CFI for the this save.
594  unsigned DwarfReg = MRI->getDwarfRegNum(Reg, true);
595  Register IgnoredFrameReg;
596  int64_t Offset =
597  getFrameIndexReference(MF, Save.getFrameIdx(), IgnoredFrameReg)
598  .getFixed();
599 
600  unsigned CFIIndex = MF.addFrameInst(MCCFIInstruction::createOffset(
601  nullptr, DwarfReg, SPOffsetFromCFA + Offset));
602  CFIIndexes.push_back(CFIIndex);
603  }
604  // Complete the CFI for the FPR/VR saves, modelling them as taking effect
605  // after the last save.
606  for (auto CFIIndex : CFIIndexes) {
607  BuildMI(MBB, MBBI, DL, ZII->get(TargetOpcode::CFI_INSTRUCTION))
608  .addCFIIndex(CFIIndex);
609  }
610 }
611 
613  MachineBasicBlock &MBB) const {
615  auto *ZII =
616  static_cast<const SystemZInstrInfo *>(MF.getSubtarget().getInstrInfo());
618  MachineFrameInfo &MFFrame = MF.getFrameInfo();
619 
620  // See SystemZELFFrameLowering::emitPrologue
622  return;
623 
624  // Skip the return instruction.
625  assert(MBBI->isReturn() && "Can only insert epilogue into returning blocks");
626 
627  uint64_t StackSize = MFFrame.getStackSize();
628  if (ZFI->getRestoreGPRRegs().LowGPR) {
629  --MBBI;
630  unsigned Opcode = MBBI->getOpcode();
631  if (Opcode != SystemZ::LMG)
632  llvm_unreachable("Expected to see callee-save register restore code");
633 
634  unsigned AddrOpNo = 2;
635  DebugLoc DL = MBBI->getDebugLoc();
636  uint64_t Offset = StackSize + MBBI->getOperand(AddrOpNo + 1).getImm();
637  unsigned NewOpcode = ZII->getOpcodeForOffset(Opcode, Offset);
638 
639  // If the offset is too large, use the largest stack-aligned offset
640  // and add the rest to the base register (the stack or frame pointer).
641  if (!NewOpcode) {
642  uint64_t NumBytes = Offset - 0x7fff8;
643  emitIncrement(MBB, MBBI, DL, MBBI->getOperand(AddrOpNo).getReg(),
644  NumBytes, ZII);
645  Offset -= NumBytes;
646  NewOpcode = ZII->getOpcodeForOffset(Opcode, Offset);
647  assert(NewOpcode && "No restore instruction available");
648  }
649 
650  MBBI->setDesc(ZII->get(NewOpcode));
651  MBBI->getOperand(AddrOpNo + 1).ChangeToImmediate(Offset);
652  } else if (StackSize) {
653  DebugLoc DL = MBBI->getDebugLoc();
654  emitIncrement(MBB, MBBI, DL, SystemZ::R15D, StackSize, ZII);
655  }
656 }
657 
659  MachineFunction &MF, MachineBasicBlock &PrologMBB) const {
660  auto *ZII =
661  static_cast<const SystemZInstrInfo *>(MF.getSubtarget().getInstrInfo());
663  const SystemZTargetLowering &TLI = *STI.getTargetLowering();
664 
665  MachineInstr *StackAllocMI = nullptr;
666  for (MachineInstr &MI : PrologMBB)
667  if (MI.getOpcode() == SystemZ::PROBED_STACKALLOC) {
668  StackAllocMI = &MI;
669  break;
670  }
671  if (StackAllocMI == nullptr)
672  return;
673  uint64_t StackSize = StackAllocMI->getOperand(0).getImm();
674  const unsigned ProbeSize = TLI.getStackProbeSize(MF);
675  uint64_t NumFullBlocks = StackSize / ProbeSize;
676  uint64_t Residual = StackSize % ProbeSize;
677  int64_t SPOffsetFromCFA = -SystemZMC::ELFCFAOffsetFromInitialSP;
678  MachineBasicBlock *MBB = &PrologMBB;
679  MachineBasicBlock::iterator MBBI = StackAllocMI;
680  const DebugLoc DL = StackAllocMI->getDebugLoc();
681 
682  // Allocate a block of Size bytes on the stack and probe it.
683  auto allocateAndProbe = [&](MachineBasicBlock &InsMBB,
684  MachineBasicBlock::iterator InsPt, unsigned Size,
685  bool EmitCFI) -> void {
686  emitIncrement(InsMBB, InsPt, DL, SystemZ::R15D, -int64_t(Size), ZII);
687  if (EmitCFI) {
688  SPOffsetFromCFA -= Size;
689  buildCFAOffs(InsMBB, InsPt, DL, SPOffsetFromCFA, ZII);
690  }
691  // Probe by means of a volatile compare.
694  BuildMI(InsMBB, InsPt, DL, ZII->get(SystemZ::CG))
695  .addReg(SystemZ::R0D, RegState::Undef)
696  .addReg(SystemZ::R15D).addImm(Size - 8).addReg(0)
697  .addMemOperand(MMO);
698  };
699 
700  bool StoreBackchain = MF.getFunction().hasFnAttribute("backchain");
701  if (StoreBackchain)
702  BuildMI(*MBB, MBBI, DL, ZII->get(SystemZ::LGR))
703  .addReg(SystemZ::R1D, RegState::Define).addReg(SystemZ::R15D);
704 
705  MachineBasicBlock *DoneMBB = nullptr;
706  MachineBasicBlock *LoopMBB = nullptr;
707  if (NumFullBlocks < 3) {
708  // Emit unrolled probe statements.
709  for (unsigned int i = 0; i < NumFullBlocks; i++)
710  allocateAndProbe(*MBB, MBBI, ProbeSize, true/*EmitCFI*/);
711  } else {
712  // Emit a loop probing the pages.
713  uint64_t LoopAlloc = ProbeSize * NumFullBlocks;
714  SPOffsetFromCFA -= LoopAlloc;
715 
716  // Use R0D to hold the exit value.
717  BuildMI(*MBB, MBBI, DL, ZII->get(SystemZ::LGR), SystemZ::R0D)
718  .addReg(SystemZ::R15D);
719  buildDefCFAReg(*MBB, MBBI, DL, SystemZ::R0D, ZII);
720  emitIncrement(*MBB, MBBI, DL, SystemZ::R0D, -int64_t(LoopAlloc), ZII);
721  buildCFAOffs(*MBB, MBBI, DL, -int64_t(SystemZMC::ELFCallFrameSize + LoopAlloc),
722  ZII);
723 
724  DoneMBB = SystemZ::splitBlockBefore(MBBI, MBB);
725  LoopMBB = SystemZ::emitBlockAfter(MBB);
726  MBB->addSuccessor(LoopMBB);
727  LoopMBB->addSuccessor(LoopMBB);
728  LoopMBB->addSuccessor(DoneMBB);
729 
730  MBB = LoopMBB;
731  allocateAndProbe(*MBB, MBB->end(), ProbeSize, false/*EmitCFI*/);
732  BuildMI(*MBB, MBB->end(), DL, ZII->get(SystemZ::CLGR))
733  .addReg(SystemZ::R15D).addReg(SystemZ::R0D);
734  BuildMI(*MBB, MBB->end(), DL, ZII->get(SystemZ::BRC))
736 
737  MBB = DoneMBB;
738  MBBI = DoneMBB->begin();
739  buildDefCFAReg(*MBB, MBBI, DL, SystemZ::R15D, ZII);
740  }
741 
742  if (Residual)
743  allocateAndProbe(*MBB, MBBI, Residual, true/*EmitCFI*/);
744 
745  if (StoreBackchain)
746  BuildMI(*MBB, MBBI, DL, ZII->get(SystemZ::STG))
747  .addReg(SystemZ::R1D, RegState::Kill).addReg(SystemZ::R15D)
749 
750  StackAllocMI->eraseFromParent();
751  if (DoneMBB != nullptr) {
752  // Compute the live-in lists for the new blocks.
753  recomputeLiveIns(*DoneMBB);
754  recomputeLiveIns(*LoopMBB);
755  }
756 }
757 
759  return (MF.getTarget().Options.DisableFramePointerElim(MF) ||
762 }
763 
765  const MachineFunction &MF, int FI, Register &FrameReg) const {
766  // Our incoming SP is actually SystemZMC::ELFCallFrameSize below the CFA, so
767  // add that difference here.
771 }
772 
774  Register Reg) const {
775  bool IsVarArg = MF.getFunction().isVarArg();
776  bool BackChain = MF.getFunction().hasFnAttribute("backchain");
777  bool SoftFloat = MF.getSubtarget<SystemZSubtarget>().hasSoftFloat();
778  unsigned Offset = RegSpillOffsets[Reg];
779  if (usePackedStack(MF) && !(IsVarArg && !SoftFloat)) {
780  if (SystemZ::GR64BitRegClass.contains(Reg))
781  // Put all GPRs at the top of the Register save area with packed
782  // stack. Make room for the backchain if needed.
783  Offset += BackChain ? 24 : 32;
784  else
785  Offset = 0;
786  }
787  return Offset;
788 }
789 
791  MachineFunction &MF) const {
793  int FI = ZFI->getFramePointerSaveIndex();
794  if (!FI) {
795  MachineFrameInfo &MFFrame = MF.getFrameInfo();
797  FI = MFFrame.CreateFixedObject(8, Offset, false);
798  ZFI->setFramePointerSaveIndex(FI);
799  }
800  return FI;
801 }
802 
804  bool HasPackedStackAttr = MF.getFunction().hasFnAttribute("packed-stack");
805  bool BackChain = MF.getFunction().hasFnAttribute("backchain");
806  bool SoftFloat = MF.getSubtarget<SystemZSubtarget>().hasSoftFloat();
807  if (HasPackedStackAttr && BackChain && !SoftFloat)
808  report_fatal_error("packed-stack + backchain + hard-float is unsupported.");
809  bool CallConv = MF.getFunction().getCallingConv() != CallingConv::GHC;
810  return HasPackedStackAttr && CallConv;
811 }
812 
814  : SystemZFrameLowering(TargetFrameLowering::StackGrowsUp, Align(32), 128,
815  Align(32), false /* StackRealignable */) {}
816 
818  MachineBasicBlock &MBB) const {}
819 
821  MachineBasicBlock &MBB) const {}
822 
824  return false;
825 }
llvm::Check::Size
@ Size
Definition: FileCheck.h:73
i
i
Definition: README.txt:29
llvm::MachineFrameInfo::hasVarSizedObjects
bool hasVarSizedObjects() const
This method may be called any time after instruction selection is complete to determine if the stack ...
Definition: MachineFrameInfo.h:353
SystemZInstrBuilder.h
llvm::SystemZSubtarget::getTargetLowering
const SystemZTargetLowering * getTargetLowering() const override
Definition: SystemZSubtarget.h:111
MI
IRTranslator LLVM IR MI
Definition: IRTranslator.cpp:103
llvm::MachineInstrBuilder::addImm
const MachineInstrBuilder & addImm(int64_t Val) const
Add a new immediate operand.
Definition: MachineInstrBuilder.h:131
llvm::MachineFrameInfo::estimateStackSize
uint64_t estimateStackSize(const MachineFunction &MF) const
Estimate and return the size of the stack frame.
Definition: MachineFrameInfo.cpp:137
llvm
---------------------— PointerInfo ------------------------------------—
Definition: AllocatorList.h:23
Reg
unsigned Reg
Definition: MachineSink.cpp:1566
llvm::drop_begin
auto drop_begin(T &&RangeOrContainer, size_t N=1)
Return a range covering RangeOrContainer with the first N elements excluded.
Definition: STLExtras.h:266
llvm::MachineBasicBlock::isLiveIn
bool isLiveIn(MCPhysReg Reg, LaneBitmask LaneMask=LaneBitmask::getAll()) const
Return true if the specified register is in the live in set.
Definition: MachineBasicBlock.cpp:575
llvm::SystemZMachineFunctionInfo::getFramePointerSaveIndex
int getFramePointerSaveIndex() const
Definition: SystemZMachineFunctionInfo.h:85
llvm::TargetFrameLowering
Information about stack frame layout on the target.
Definition: TargetFrameLowering.h:43
llvm::MachineModuleInfo::getContext
const MCContext & getContext() const
Definition: MachineModuleInfo.h:167
llvm::SystemZELFFrameLowering::inlineStackProbe
void inlineStackProbe(MachineFunction &MF, MachineBasicBlock &PrologMBB) const override
Replace a StackProbe stub (if any) with the actual probe code inline.
Definition: SystemZFrameLowering.cpp:658
llvm::MachineRegisterInfo
MachineRegisterInfo - Keep track of information for virtual and physical registers,...
Definition: MachineRegisterInfo.h:52
llvm::MCContext::getRegisterInfo
const MCRegisterInfo * getRegisterInfo() const
Definition: MCContext.h:425
llvm::BitVector::set
BitVector & set()
Definition: BitVector.h:343
llvm::TargetSubtargetInfo::getInstrInfo
virtual const TargetInstrInfo * getInstrInfo() const
Definition: TargetSubtargetInfo.h:92
llvm::MachineInstrBuilder::addCFIIndex
const MachineInstrBuilder & addCFIIndex(unsigned CFIIndex) const
Definition: MachineInstrBuilder.h:247
llvm::SystemZELFFrameLowering::processFunctionBeforeFrameFinalized
void processFunctionBeforeFrameFinalized(MachineFunction &MF, RegScavenger *RS) const override
processFunctionBeforeFrameFinalized - This method is called immediately before the specified function...
Definition: SystemZFrameLowering.cpp:352
contains
return AArch64::GPR64RegClass contains(Reg)
llvm::SystemZTargetLowering
Definition: SystemZISelLowering.h:392
emitIncrement
static void emitIncrement(MachineBasicBlock &MBB, MachineBasicBlock::iterator &MBBI, const DebugLoc &DL, Register Reg, int64_t NumBytes, const TargetInstrInfo *TII)
Definition: SystemZFrameLowering.cpp:396
llvm::SmallVector< unsigned, 8 >
llvm::SystemZ::emitBlockAfter
MachineBasicBlock * emitBlockAfter(MachineBasicBlock *MBB)
Definition: SystemZInstrInfo.cpp:1879
llvm::SystemZFrameLowering::create
static std::unique_ptr< SystemZFrameLowering > create(const SystemZSubtarget &STI)
Definition: SystemZFrameLowering.cpp:55
llvm::MachineFunction::getMachineMemOperand
MachineMemOperand * getMachineMemOperand(MachinePointerInfo PtrInfo, MachineMemOperand::Flags f, uint64_t s, Align base_alignment, const AAMDNodes &AAInfo=AAMDNodes(), const MDNode *Ranges=nullptr, SyncScope::ID SSID=SyncScope::System, AtomicOrdering Ordering=AtomicOrdering::NotAtomic, AtomicOrdering FailureOrdering=AtomicOrdering::NotAtomic)
getMachineMemOperand - Allocate a new MachineMemOperand.
Definition: MachineFunction.cpp:430
llvm::recomputeLiveIns
static void recomputeLiveIns(MachineBasicBlock &MBB)
Convenience function for recomputing live-in's for MBB.
Definition: LivePhysRegs.h:196
llvm::AArch64ISD::STG
@ STG
Definition: AArch64ISelLowering.h:437
llvm::TargetSubtargetInfo::getRegisterInfo
virtual const TargetRegisterInfo * getRegisterInfo() const
getRegisterInfo - If register information is available, return it.
Definition: TargetSubtargetInfo.h:124
llvm::TargetRegisterInfo
TargetRegisterInfo base class - We assume that the target defines a static array of TargetRegisterDes...
Definition: TargetRegisterInfo.h:233
llvm::SystemZFrameLowering::hasReservedCallFrame
bool hasReservedCallFrame(const MachineFunction &MF) const override
hasReservedCallFrame - Under normal circumstances, when a frame pointer is not required,...
Definition: SystemZFrameLowering.cpp:77
llvm::StackOffset::getFixed
ScalarTy getFixed() const
Definition: TypeSize.h:149
llvm::MachineFrameInfo::setStackSize
void setStackSize(uint64_t Size)
Set the size of the stack.
Definition: MachineFrameInfo.h:556
llvm::SystemZ::splitBlockBefore
MachineBasicBlock * splitBlockBefore(MachineBasicBlock::iterator MI, MachineBasicBlock *MBB)
Definition: SystemZInstrInfo.cpp:1895
llvm::MachineMemOperand
A description of a memory reference used in the backend.
Definition: MachineMemOperand.h:128
llvm::SystemZELFFrameLowering::determineCalleeSaves
void determineCalleeSaves(MachineFunction &MF, BitVector &SavedRegs, RegScavenger *RS) const override
This method determines which of the registers reported by TargetRegisterInfo::getCalleeSavedRegs() sh...
Definition: SystemZFrameLowering.cpp:153
Offset
uint64_t Offset
Definition: ELFObjHandler.cpp:81
llvm::SystemZMachineFunctionInfo::getVarArgsFirstGPR
Register getVarArgsFirstGPR() const
Definition: SystemZMachineFunctionInfo.h:68
llvm::SystemZELFFrameLowering::emitPrologue
void emitPrologue(MachineFunction &MF, MachineBasicBlock &MBB) const override
emitProlog/emitEpilog - These methods insert prolog and epilog code into the function.
Definition: SystemZFrameLowering.cpp:449
SystemZCallingConv.h
llvm::SystemZELFFrameLowering::usePackedStack
bool usePackedStack(MachineFunction &MF) const
Definition: SystemZFrameLowering.cpp:803
llvm::SystemZInstrInfo
Definition: SystemZInstrInfo.h:174
llvm::SystemZSubtarget::isTargetXPLINK64
bool isTargetXPLINK64() const
Definition: SystemZSubtarget.h:295
llvm::MachineFrameInfo::getObjectIndexEnd
int getObjectIndexEnd() const
Return one past the maximum frame object index.
Definition: MachineFrameInfo.h:393
TRI
unsigned const TargetRegisterInfo * TRI
Definition: MachineSink.cpp:1567
llvm::SystemZ::GPRRegs
Definition: SystemZMachineFunctionInfo.h:19
llvm::ArrayRef::empty
bool empty() const
empty - Check if the array is empty.
Definition: ArrayRef.h:160
llvm::SystemZMachineFunctionInfo::setRestoreGPRRegs
void setRestoreGPRRegs(Register Low, Register High, unsigned Offs)
Definition: SystemZMachineFunctionInfo.h:60
llvm::MCCFIInstruction::cfiDefCfaOffset
static MCCFIInstruction cfiDefCfaOffset(MCSymbol *L, int Offset)
.cfi_def_cfa_offset modifies a rule for computing CFA.
Definition: MCDwarf.h:502
MachineRegisterInfo.h
llvm::TargetFrameLowering::StackDirection
StackDirection
Definition: TargetFrameLowering.h:45
llvm::MachineBasicBlock::erase
instr_iterator erase(instr_iterator I)
Remove an instruction from the instruction list and delete it.
Definition: MachineBasicBlock.cpp:1299
llvm::RegState::ImplicitDefine
@ ImplicitDefine
Definition: MachineInstrBuilder.h:63
llvm::TargetRegisterInfo::getCalleeSavedRegs
virtual const MCPhysReg * getCalleeSavedRegs(const MachineFunction *MF) const =0
Return a null-terminated list of all of the callee-saved registers on this target.
llvm::MachineBasicBlock::addSuccessor
void addSuccessor(MachineBasicBlock *Succ, BranchProbability Prob=BranchProbability::getUnknown())
Add Succ as a successor of this MachineBasicBlock.
Definition: MachineBasicBlock.cpp:746
llvm::SystemZFrameLowering::SystemZFrameLowering
SystemZFrameLowering(StackDirection D, Align StackAl, int LAO, Align TransAl, bool StackReal)
Definition: SystemZFrameLowering.cpp:49
llvm::MachineFunction::front
const MachineBasicBlock & front() const
Definition: MachineFunction.h:820
llvm::MachineFunction::getRegInfo
MachineRegisterInfo & getRegInfo()
getRegInfo - Return information about the registers currently in use.
Definition: MachineFunction.h:636
llvm::TargetInstrInfo
TargetInstrInfo - Interface to description of machine instruction set.
Definition: TargetInstrInfo.h:97
llvm::MachineRegisterInfo::use_nodbg_operands
iterator_range< use_nodbg_iterator > use_nodbg_operands(Register Reg) const
Definition: MachineRegisterInfo.h:526
TargetMachine.h
llvm::MachineInstrBuilder::addMBB
const MachineInstrBuilder & addMBB(MachineBasicBlock *MBB, unsigned TargetFlags=0) const
Definition: MachineInstrBuilder.h:146
llvm::SystemZ::GPRRegs::GPROffset
unsigned GPROffset
Definition: SystemZMachineFunctionInfo.h:22
llvm::SystemZELFFrameLowering::getBackchainOffset
unsigned getBackchainOffset(MachineFunction &MF) const
Definition: SystemZFrameLowering.h:79
llvm::MutableArrayRef
MutableArrayRef - Represent a mutable reference to an array (0 or more elements consecutively in memo...
Definition: ArrayRef.h:307
SystemZInstrInfo.h
E
static GCRegistry::Add< CoreCLRGC > E("coreclr", "CoreCLR-compatible GC")
llvm::MachineOperand::getImm
int64_t getImm() const
Definition: MachineOperand.h:537
llvm::MachineFunction::getInfo
Ty * getInfo()
getInfo - Keep track of various per-function pieces of information for backends that would like to do...
Definition: MachineFunction.h:724
llvm::RegState::Undef
@ Undef
Value of the register doesn't matter.
Definition: MachineInstrBuilder.h:52
llvm::MachineInstr::getOperand
const MachineOperand & getOperand(unsigned i) const
Definition: MachineInstr.h:499
llvm::TargetRegisterClass
Definition: TargetRegisterInfo.h:46
false
Definition: StackSlotColoring.cpp:142
TII
const HexagonInstrInfo * TII
Definition: HexagonCopyToCombine.cpp:129
llvm::MachineModuleInfo
This class contains meta information specific to a module.
Definition: MachineModuleInfo.h:78
llvm::report_fatal_error
void report_fatal_error(Error Err, bool gen_crash_diag=true)
Report a serious error, calling any installed error handler.
Definition: Error.cpp:140
llvm::MachineFrameInfo::getStackSize
uint64_t getStackSize() const
Return the number of bytes that must be allocated to hold all of the fixed size frame objects.
Definition: MachineFrameInfo.h:553
llvm::MachineFrameInfo::getObjectOffset
int64_t getObjectOffset(int ObjectIdx) const
Return the assigned stack offset of the specified object from the incoming stack pointer.
Definition: MachineFrameInfo.h:494
llvm::RegState::Define
@ Define
Register definition.
Definition: MachineInstrBuilder.h:44
llvm::BitVector
Definition: BitVector.h:74
llvm::SystemZFrameLowering::eliminateCallFramePseudoInstr
MachineBasicBlock::iterator eliminateCallFramePseudoInstr(MachineFunction &MF, MachineBasicBlock &MBB, MachineBasicBlock::iterator MI) const override
This method is called during prolog/epilog code insertion to eliminate call frame setup and destroy p...
Definition: SystemZFrameLowering.cpp:61
Align
uint64_t Align
Definition: ELFObjHandler.cpp:83
llvm::SystemZMachineFunctionInfo::getRestoreGPRRegs
SystemZ::GPRRegs getRestoreGPRRegs() const
Definition: SystemZMachineFunctionInfo.h:59
llvm::SystemZMachineFunctionInfo::setSpillGPRRegs
void setSpillGPRRegs(Register Low, Register High, unsigned Offs)
Definition: SystemZMachineFunctionInfo.h:50
llvm::Align
This struct is a compact representation of a valid (non-zero power of two) alignment.
Definition: Alignment.h:39
llvm::SystemZ::CCMASK_CMP_GT
const unsigned CCMASK_CMP_GT
Definition: SystemZ.h:36
llvm::MachineFrameInfo::getObjectIndexBegin
int getObjectIndexBegin() const
Return the minimum frame object index.
Definition: MachineFrameInfo.h:390
llvm::array_lengthof
constexpr size_t array_lengthof(T(&)[N])
Find the length of an array.
Definition: STLExtras.h:1390
llvm::MCCFIInstruction::createDefCfaRegister
static MCCFIInstruction createDefCfaRegister(MCSymbol *L, unsigned Register)
.cfi_def_cfa_register modifies a rule for computing CFA.
Definition: MCDwarf.h:495
llvm::MachineBasicBlock
Definition: MachineBasicBlock.h:95
llvm::MachineFrameInfo::isDeadObjectIndex
bool isDeadObjectIndex(int ObjectIdx) const
Returns true if the specified index corresponds to a dead object.
Definition: MachineFrameInfo.h:713
llvm::SystemZ::ELFArgGPRs
const MCPhysReg ELFArgGPRs[ELFNumArgGPRs]
Definition: SystemZCallingConv.cpp:14
llvm::SystemZELFFrameLowering::hasFP
bool hasFP(const MachineFunction &MF) const override
hasFP - Return true if the specified function should have a dedicated frame pointer register.
Definition: SystemZFrameLowering.cpp:758
llvm::TargetOptions::DisableFramePointerElim
bool DisableFramePointerElim(const MachineFunction &MF) const
DisableFramePointerElim - This returns true if frame pointer elimination optimization should be disab...
Definition: TargetOptionsImpl.cpp:24
llvm::MachineFunction::getMMI
MachineModuleInfo & getMMI() const
Definition: MachineFunction.h:577
buildDefCFAReg
static void buildDefCFAReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, const DebugLoc &DL, unsigned Reg, const SystemZInstrInfo *ZII)
Definition: SystemZFrameLowering.cpp:435
llvm::MachineFunction::getSubtarget
const TargetSubtargetInfo & getSubtarget() const
getSubtarget - Return the subtarget for which this machine code is being compiled.
Definition: MachineFunction.h:626
llvm::Function::hasFnAttribute
bool hasFnAttribute(Attribute::AttrKind Kind) const
Return true if the function has the attribute.
Definition: Function.cpp:626
llvm::MachineInstr::getDebugLoc
const DebugLoc & getDebugLoc() const
Returns the debug location id of this MachineInstr.
Definition: MachineInstr.h:418
llvm::TargetRegisterInfo::getSpillSize
unsigned getSpillSize(const TargetRegisterClass &RC) const
Return the size in bytes of the stack slot allocated to hold a spilled copy of a register from class ...
Definition: TargetRegisterInfo.h:282
llvm::SystemZMC::ELFCFAOffsetFromInitialSP
const int64_t ELFCFAOffsetFromInitialSP
Definition: SystemZMCTargetDesc.h:38
llvm::MachineInstr
Representation of each machine instruction.
Definition: MachineInstr.h:64
llvm::MachineInstrBuilder
Definition: MachineInstrBuilder.h:69
SystemZMachineFunctionInfo.h
uint64_t
llvm::MachineFrameInfo::getObjectSize
int64_t getObjectSize(int ObjectIdx) const
Return the size of the specified object.
Definition: MachineFrameInfo.h:453
D
static GCRegistry::Add< StatepointGC > D("statepoint-example", "an example strategy for statepoint")
llvm::SystemZXPLINKFrameLowering::emitEpilogue
void emitEpilogue(MachineFunction &MF, MachineBasicBlock &MBB) const override
Definition: SystemZFrameLowering.cpp:820
llvm::Function::getCallingConv
CallingConv::ID getCallingConv() const
getCallingConv()/setCallingConv(CC) - These method get and set the calling convention of this functio...
Definition: Function.h:239
llvm::SystemZELFFrameLowering::assignCalleeSavedSpillSlots
bool assignCalleeSavedSpillSlots(MachineFunction &MF, const TargetRegisterInfo *TRI, std::vector< CalleeSavedInfo > &CSI) const override
Definition: SystemZFrameLowering.cpp:87
llvm::SystemZ::CCMASK_ICMP
const unsigned CCMASK_ICMP
Definition: SystemZ.h:46
llvm::HexagonInstrInfo::storeRegToStackSlot
void storeRegToStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, Register SrcReg, bool isKill, int FrameIndex, const TargetRegisterClass *RC, const TargetRegisterInfo *TRI) const override
Store the specified register of the given register class to the specified stack frame index.
Definition: HexagonInstrInfo.cpp:913
llvm::MachinePointerInfo
This class contains a discriminated union of information about pointers in memory operands,...
Definition: MachineMemOperand.h:38
llvm::numbers::e
constexpr double e
Definition: MathExtras.h:57
I
#define I(x, y, z)
Definition: MD5.cpp:59
llvm::RegScavenger
Definition: RegisterScavenging.h:34
addSavedGPR
static void addSavedGPR(MachineBasicBlock &MBB, MachineInstrBuilder &MIB, unsigned GPR64, bool IsImplicit)
Definition: SystemZFrameLowering.cpp:223
llvm::MachineBasicBlock::getLastNonDebugInstr
iterator getLastNonDebugInstr(bool SkipPseudoOp=true)
Returns an iterator to the last non-debug instruction in the basic block, or end().
Definition: MachineBasicBlock.cpp:267
llvm::TargetMachine::Options
TargetOptions Options
Definition: TargetMachine.h:120
assert
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
llvm::MachineFrameInfo::CreateFixedObject
int CreateFixedObject(uint64_t Size, int64_t SPOffset, bool IsImmutable, bool isAliased=false)
Create a new object at a fixed location on the stack.
Definition: MachineFrameInfo.cpp:83
llvm::SystemZELFFrameLowering::getRegSpillOffset
unsigned getRegSpillOffset(MachineFunction &MF, Register Reg) const
Definition: SystemZFrameLowering.cpp:773
llvm::MachineFunction::getFrameInfo
MachineFrameInfo & getFrameInfo()
getFrameInfo - Return the frame info object for the current function.
Definition: MachineFunction.h:642
llvm::MachineBasicBlock::getParent
const MachineFunction * getParent() const
Return the MachineFunction containing this basic block.
Definition: MachineBasicBlock.h:225
llvm::RegScavenger::addScavengingFrameIndex
void addScavengingFrameIndex(int FI)
Add a scavenging frame index.
Definition: RegisterScavenging.h:123
llvm::MachineInstrBuilder::addMemOperand
const MachineInstrBuilder & addMemOperand(MachineMemOperand *MMO) const
Definition: MachineInstrBuilder.h:202
llvm::MachineFunction::getLandingPads
const std::vector< LandingPadInfo > & getLandingPads() const
Return a reference to the landing pad info for the current function.
Definition: MachineFunction.h:1061
MachineModuleInfo.h
llvm::MachineInstrBuilder::addReg
const MachineInstrBuilder & addReg(Register RegNo, unsigned flags=0, unsigned SubReg=0) const
Add a new virtual register operand.
Definition: MachineInstrBuilder.h:97
llvm::SystemZMachineFunctionInfo::getManipulatesSP
bool getManipulatesSP() const
Definition: SystemZMachineFunctionInfo.h:90
llvm::SystemZSubtarget
Definition: SystemZSubtarget.h:33
llvm::MachineFunction
Definition: MachineFunction.h:230
SystemZSubtarget.h
llvm::MachineFrameInfo::getCalleeSavedInfo
const std::vector< CalleeSavedInfo > & getCalleeSavedInfo() const
Returns a reference to call saved info vector for the current function.
Definition: MachineFrameInfo.h:755
llvm::IndexedMap::grow
void grow(IndexT n)
Definition: IndexedMap.h:67
llvm::ArrayRef
ArrayRef - Represent a constant reference to an array (0 or more elements consecutively in memory),...
Definition: APInt.h:32
llvm::MachineFrameInfo::CreateStackObject
int CreateStackObject(uint64_t Size, Align Alignment, bool isSpillSlot, const AllocaInst *Alloca=nullptr, uint8_t ID=0)
Create a new statically sized stack object, returning a nonnegative identifier to represent it.
Definition: MachineFrameInfo.cpp:51
llvm::HexagonInstrInfo::loadRegFromStackSlot
void loadRegFromStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, Register DestReg, int FrameIndex, const TargetRegisterClass *RC, const TargetRegisterInfo *TRI) const override
Load the specified register of the given register class from the specified stack frame index.
Definition: HexagonInstrInfo.cpp:958
MBBI
MachineBasicBlock MachineBasicBlock::iterator MBBI
Definition: AArch64SLSHardening.cpp:75
llvm::SystemZ::GPRRegs::LowGPR
unsigned LowGPR
Definition: SystemZMachineFunctionInfo.h:20
llvm_unreachable
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
Definition: ErrorHandling.h:136
llvm::SystemZELFFrameLowering::getFrameIndexReference
StackOffset getFrameIndexReference(const MachineFunction &MF, int FI, Register &FrameReg) const override
getFrameIndexReference - This method should return the base register and offset used to reference a f...
Definition: SystemZFrameLowering.cpp:764
llvm::StackOffset
StackOffset is a class to represent an offset with 2 dimensions, named fixed and scalable,...
Definition: TypeSize.h:134
DL
MachineBasicBlock MachineBasicBlock::iterator DebugLoc DL
Definition: AArch64SLSHardening.cpp:76
llvm::SystemZXPLINKFrameLowering::emitPrologue
void emitPrologue(MachineFunction &MF, MachineBasicBlock &MBB) const override
emitProlog/emitEpilog - These methods insert prolog and epilog code into the function.
Definition: SystemZFrameLowering.cpp:817
llvm::MCRegisterInfo
MCRegisterInfo base class - We assume that the target defines a static array of MCRegisterDesc object...
Definition: MCRegisterInfo.h:135
llvm::MachineMemOperand::MOVolatile
@ MOVolatile
The memory access is volatile.
Definition: MachineMemOperand.h:139
llvm::StackOffset::getFixed
static StackOffset getFixed(ScalarTy Fixed)
Definition: TypeSize.h:143
llvm::MachineMemOperand::MOLoad
@ MOLoad
The memory access reads data.
Definition: MachineMemOperand.h:135
MRI
unsigned const MachineRegisterInfo * MRI
Definition: AArch64AdvSIMDScalarPass.cpp:105
llvm::Register
Wrapper class representing virtual and physical registers.
Definition: Register.h:19
llvm::SystemZELFFrameLowering::emitEpilogue
void emitEpilogue(MachineFunction &MF, MachineBasicBlock &MBB) const override
Definition: SystemZFrameLowering.cpp:612
llvm::MachineBasicBlock::addLiveIn
void addLiveIn(MCRegister PhysReg, LaneBitmask LaneMask=LaneBitmask::getAll())
Adds the specified register as a live in.
Definition: MachineBasicBlock.h:367
llvm::MachineFrameInfo::hasCalls
bool hasCalls() const
Return true if the current function has any function calls.
Definition: MachineFrameInfo.h:581
MBB
MachineBasicBlock & MBB
Definition: AArch64SLSHardening.cpp:74
llvm::isInt< 16 >
constexpr bool isInt< 16 >(int64_t x)
Definition: MathExtras.h:370
llvm::SystemZMachineFunctionInfo
Definition: SystemZMachineFunctionInfo.h:27
llvm::BitVector::test
bool test(unsigned Idx) const
Definition: BitVector.h:447
llvm::SystemZELFFrameLowering::spillCalleeSavedRegisters
bool spillCalleeSavedRegisters(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, ArrayRef< CalleeSavedInfo > CSI, const TargetRegisterInfo *TRI) const override
spillCalleeSavedRegisters - Issues instruction(s) to spill all callee saved registers and returns tru...
Definition: SystemZFrameLowering.cpp:236
llvm::MachineFunction::getFunction
Function & getFunction()
Return the LLVM function that this machine code represents.
Definition: MachineFunction.h:592
uint16_t
llvm::MachineFunction::getTarget
const LLVMTargetMachine & getTarget() const
getTarget - Return the target machine this machine code is compiled with
Definition: MachineFunction.h:622
llvm::TargetFrameLowering::getFrameIndexReference
virtual StackOffset getFrameIndexReference(const MachineFunction &MF, int FI, Register &FrameReg) const
getFrameIndexReference - This method should return the base register and offset used to reference a f...
Definition: TargetFrameLoweringImpl.cpp:45
llvm::TargetLoweringBase::hasInlineStackProbe
virtual bool hasInlineStackProbe(MachineFunction &MF) const
Definition: TargetLowering.h:1825
llvm::SystemZXPLINKFrameLowering::hasFP
bool hasFP(const MachineFunction &MF) const override
hasFP - Return true if the specified function should have a dedicated frame pointer register.
Definition: SystemZFrameLowering.cpp:823
Function.h
llvm::SystemZELFFrameLowering::restoreCalleeSavedRegisters
bool restoreCalleeSavedRegisters(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBII, MutableArrayRef< CalleeSavedInfo > CSI, const TargetRegisterInfo *TRI) const override
restoreCalleeSavedRegisters - Issues instruction(s) to restore all callee saved registers and returns...
Definition: SystemZFrameLowering.cpp:296
llvm::SystemZSubtarget::getInstrInfo
const SystemZInstrInfo * getInstrInfo() const override
Definition: SystemZSubtarget.h:107
llvm::SystemZMachineFunctionInfo::getSpillGPRRegs
SystemZ::GPRRegs getSpillGPRRegs() const
Definition: SystemZMachineFunctionInfo.h:49
SystemZFrameLowering.h
llvm::SystemZFrameLowering
Definition: SystemZFrameLowering.h:21
llvm::SystemZELFFrameLowering::getOrCreateFramePointerSaveIndex
int getOrCreateFramePointerSaveIndex(MachineFunction &MF) const
Definition: SystemZFrameLowering.cpp:790
llvm::Function::isVarArg
bool isVarArg() const
isVarArg - Return true if this function takes a variable number of arguments.
Definition: Function.h:189
llvm::getKillRegState
unsigned getKillRegState(bool B)
Definition: MachineInstrBuilder.h:508
llvm::MachineFunction::addFrameInst
LLVM_NODISCARD unsigned addFrameInst(const MCCFIInstruction &Inst)
Definition: MachineFunction.cpp:285
llvm::MachineFrameInfo
The MachineFrameInfo class represents an abstract stack frame until prolog/epilog code is inserted.
Definition: MachineFrameInfo.h:107
SystemZRegisterInfo.h
llvm::TargetSubtargetInfo::getTargetLowering
virtual const TargetLowering * getTargetLowering() const
Definition: TargetSubtargetInfo.h:96
llvm::MachineBasicBlock::begin
iterator begin()
Definition: MachineBasicBlock.h:268
buildCFAOffs
static void buildCFAOffs(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, const DebugLoc &DL, int Offset, const SystemZInstrInfo *ZII)
Definition: SystemZFrameLowering.cpp:424
llvm::BuildMI
MachineInstrBuilder BuildMI(MachineFunction &MF, const DebugLoc &DL, const MCInstrDesc &MCID)
Builder interface. Specify how to create the initial instruction itself.
Definition: MachineInstrBuilder.h:328
llvm::ArrayRef::size
size_t size() const
size - Get the array size.
Definition: ArrayRef.h:165
llvm::RegState::Kill
@ Kill
The last use of a register.
Definition: MachineInstrBuilder.h:48
llvm::max
Align max(MaybeAlign Lhs, Align Rhs)
Definition: Alignment.h:340
llvm::SystemZELFFrameLowering::SystemZELFFrameLowering
SystemZELFFrameLowering()
Definition: SystemZFrameLowering.cpp:202
llvm::TargetRegisterInfo::getSubReg
MCRegister getSubReg(MCRegister Reg, unsigned Idx) const
Returns the physical register number of sub-register "Index" for physical register RegNo.
Definition: TargetRegisterInfo.h:1094
llvm::MCCFIInstruction::createOffset
static MCCFIInstruction createOffset(MCSymbol *L, unsigned Register, int Offset)
.cfi_offset Previous value of Register is saved at offset Offset from CFA.
Definition: MCDwarf.h:526
llvm::TargetFrameLowering::determineCalleeSaves
virtual void determineCalleeSaves(MachineFunction &MF, BitVector &SavedRegs, RegScavenger *RS=nullptr) const
This method determines which of the registers reported by TargetRegisterInfo::getCalleeSavedRegs() sh...
Definition: TargetFrameLoweringImpl.cpp:78
llvm::DebugLoc
A debug info location.
Definition: DebugLoc.h:33
llvm::TargetRegisterInfo::getMinimalPhysRegClass
const TargetRegisterClass * getMinimalPhysRegClass(MCRegister Reg, MVT VT=MVT::Other) const
Returns the Register Class of a physical register of the given type, picking the most sub register cl...
Definition: TargetRegisterInfo.cpp:211
RegisterScavenging.h
llvm::SystemZXPLINKFrameLowering::SystemZXPLINKFrameLowering
SystemZXPLINKFrameLowering()
Definition: SystemZFrameLowering.cpp:813
llvm::SystemZ::GPRRegs::HighGPR
unsigned HighGPR
Definition: SystemZMachineFunctionInfo.h:21
llvm::MachineInstr::eraseFromParent
void eraseFromParent()
Unlink 'this' from the containing basic block and delete it.
Definition: MachineInstr.cpp:677
llvm::MachineInstrBundleIterator< MachineInstr >
llvm::getImplRegState
unsigned getImplRegState(bool B)
Definition: MachineInstrBuilder.h:505
llvm::TargetFrameLowering::SpillSlot
Definition: TargetFrameLowering.h:51
llvm::SystemZ::ELFNumArgGPRs
const unsigned ELFNumArgGPRs
Definition: SystemZCallingConv.h:19
llvm::SystemZMachineFunctionInfo::setFramePointerSaveIndex
void setFramePointerSaveIndex(int Idx)
Definition: SystemZMachineFunctionInfo.h:86
llvm::MachineBasicBlock::end
iterator end()
Definition: MachineBasicBlock.h:270
llvm::CallingConv::GHC
@ GHC
Definition: CallingConv.h:51
llvm::SystemZMC::ELFCallFrameSize
const int64_t ELFCallFrameSize
Definition: SystemZMCTargetDesc.h:35