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45 #define DEBUG_TYPE "nvptx-peephole"
62 return "NVPTX optimize redundant cvta.to.local instruction";
73 INITIALIZE_PASS(NVPTXPeephole,
"nvptx-peephole",
"NVPTX Peephole",
false,
false)
79 if (Root.getOpcode() != NVPTX::cvta_to_local_yes_64 &&
80 Root.getOpcode() != NVPTX::cvta_to_local_yes)
83 auto &
Op = Root.getOperand(1);
84 const auto &
MRI = MF.getRegInfo();
86 if (
Op.isReg() &&
Op.getReg().isVirtual()) {
91 if (!GenericAddrDef || GenericAddrDef->
getParent() != &
MBB ||
92 (GenericAddrDef->
getOpcode() != NVPTX::LEA_ADDRi64 &&
93 GenericAddrDef->
getOpcode() != NVPTX::LEA_ADDRi)) {
101 auto &BaseAddrOp = GenericAddrDef->
getOperand(1);
102 if (BaseAddrOp.isReg() && BaseAddrOp.getReg() == NRI->
getFrameRegister(MF)) {
112 const auto &
MRI = MF.getRegInfo();
123 .
add(Prev.getOperand(2));
129 Prev.eraseFromParent();
131 Root.eraseFromParent();
138 bool Changed =
false;
140 for (
auto &
MBB : MF) {
144 while (BlockIter !=
MBB.
end()) {
145 auto &
MI = *BlockIter++;
157 const auto &
MRI = MF.getRegInfo();
160 MI->eraseFromParent();
This is an optimization pass for GlobalISel generic memory operations.
static void CombineCVTAToLocal(MachineInstr &Root)
const MachineInstrBuilder & add(const MachineOperand &MO) const
void initializeNVPTXPeepholePass(PassRegistry &)
MachineInstr * getUniqueVRegDef(Register Reg) const
getUniqueVRegDef - Return the unique machine instr that defines the specified virtual register or nul...
MachineFunctionPass - This class adapts the FunctionPass interface to allow convenient creation of pa...
Register getFrameRegister(const MachineFunction &MF) const override
void getAnalysisUsage(AnalysisUsage &AU) const override
getAnalysisUsage - Subclasses that override getAnalysisUsage must call this.
Register getFrameLocalRegister(const MachineFunction &MF) const
TargetInstrInfo - Interface to description of machine instruction set.
static PassRegistry * getPassRegistry()
getPassRegistry - Access the global registry object, which is automatically initialized at applicatio...
const MachineOperand & getOperand(unsigned i) const
#define INITIALIZE_PASS(passName, arg, name, cfg, analysis)
Represent the analysis usage information of a pass.
const HexagonInstrInfo * TII
PassRegistry - This class manages the registration and intitialization of the pass subsystem as appli...
bool use_empty(Register RegNo) const
use_empty - Return true if there are no instructions using the specified register.
unsigned ID
LLVM IR allows to use arbitrary numbers as calling convention identifiers.
const DebugLoc & getDebugLoc() const
Returns the debug location id of this MachineInstr.
Representation of each machine instruction.
const MachineFunction * getParent() const
Return the MachineFunction containing this basic block.
const MachineInstrBuilder & addReg(Register RegNo, unsigned flags=0, unsigned SubReg=0) const
Add a new virtual register operand.
Register getReg() const
getReg - Returns the register number.
StringRef - Represent a constant reference to a string, i.e.
unsigned getOpcode() const
Returns the opcode of this MachineInstr.
bool hasOneNonDBGUse(Register RegNo) const
hasOneNonDBGUse - Return true if there is exactly one non-Debug use of the specified register.
static bool isCVTAToLocalCombinationCandidate(MachineInstr &Root)
const MachineBasicBlock * getParent() const
unsigned const MachineRegisterInfo * MRI
Function & getFunction()
Return the LLVM function that this machine code represents.
instr_iterator insert(instr_iterator I, MachineInstr *M)
Insert MI into the instruction list before I, possibly inside a bundle.
MachineInstrBuilder BuildMI(MachineFunction &MF, const MIMetadata &MIMD, const MCInstrDesc &MCID)
Builder interface. Specify how to create the initial instruction itself.
MachineFunctionPass * createNVPTXPeephole()