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43 #define DEBUG_TYPE "nvptx-peephole"
60 return "NVPTX optimize redundant cvta.to.local instruction";
71 INITIALIZE_PASS(NVPTXPeephole,
"nvptx-peephole",
"NVPTX Peephole",
false,
false)
77 if (Root.getOpcode() != NVPTX::cvta_to_local_yes_64 &&
78 Root.getOpcode() != NVPTX::cvta_to_local_yes)
81 auto &
Op = Root.getOperand(1);
82 const auto &
MRI = MF.getRegInfo();
89 if (!GenericAddrDef || GenericAddrDef->
getParent() != &
MBB ||
90 (GenericAddrDef->
getOpcode() != NVPTX::LEA_ADDRi64 &&
91 GenericAddrDef->
getOpcode() != NVPTX::LEA_ADDRi)) {
96 auto &BaseAddrOp = GenericAddrDef->
getOperand(1);
97 if (BaseAddrOp.isReg() && BaseAddrOp.getReg() == NVPTX::VRFrame) {
107 const auto &
MRI = MF.getRegInfo();
114 .
addReg(NVPTX::VRFrameLocal)
115 .
add(Prev.getOperand(2));
121 Prev.eraseFromParentAndMarkDBGValuesForRemoval();
123 Root.eraseFromParentAndMarkDBGValuesForRemoval();
130 bool Changed =
false;
132 for (
auto &
MBB : MF) {
136 while (BlockIter !=
MBB.
end()) {
137 auto &
MI = *BlockIter++;
146 const auto &
MRI = MF.getRegInfo();
149 MI->eraseFromParentAndMarkDBGValuesForRemoval();
This class represents lattice values for constants.
static void CombineCVTAToLocal(MachineInstr &Root)
const MachineInstrBuilder & add(const MachineOperand &MO) const
void initializeNVPTXPeepholePass(PassRegistry &)
MachineInstr * getUniqueVRegDef(Register Reg) const
getUniqueVRegDef - Return the unique machine instr that defines the specified virtual register or nul...
MachineFunctionPass - This class adapts the FunctionPass interface to allow convenient creation of pa...
void getAnalysisUsage(AnalysisUsage &AU) const override
getAnalysisUsage - Subclasses that override getAnalysisUsage must call this.
TargetInstrInfo - Interface to description of machine instruction set.
static PassRegistry * getPassRegistry()
getPassRegistry - Access the global registry object, which is automatically initialized at applicatio...
const MachineOperand & getOperand(unsigned i) const
#define INITIALIZE_PASS(passName, arg, name, cfg, analysis)
Represent the analysis usage information of a pass.
const HexagonInstrInfo * TII
PassRegistry - This class manages the registration and intitialization of the pass subsystem as appli...
bool use_empty(Register RegNo) const
use_empty - Return true if there are no instructions using the specified register.
const DebugLoc & getDebugLoc() const
Returns the debug location id of this MachineInstr.
Representation of each machine instruction.
static bool isVirtualRegister(unsigned Reg)
Return true if the specified register number is in the virtual register namespace.
const MachineFunction * getParent() const
Return the MachineFunction containing this basic block.
const MachineInstrBuilder & addReg(Register RegNo, unsigned flags=0, unsigned SubReg=0) const
Add a new virtual register operand.
Register getReg() const
getReg - Returns the register number.
StringRef - Represent a constant reference to a string, i.e.
unsigned getOpcode() const
Returns the opcode of this MachineInstr.
bool hasOneNonDBGUse(Register RegNo) const
hasOneNonDBGUse - Return true if there is exactly one non-Debug use of the specified register.
static bool isCVTAToLocalCombinationCandidate(MachineInstr &Root)
const MachineBasicBlock * getParent() const
unsigned const MachineRegisterInfo * MRI
Function & getFunction()
Return the LLVM function that this machine code represents.
instr_iterator insert(instr_iterator I, MachineInstr *M)
Insert MI into the instruction list before I, possibly inside a bundle.
MachineInstrBuilder BuildMI(MachineFunction &MF, const DebugLoc &DL, const MCInstrDesc &MCID)
Builder interface. Specify how to create the initial instruction itself.
MachineFunctionPass * createNVPTXPeephole()