26#define DEBUG_TYPE "nvptx-reg-info"
30 if (RC == &NVPTX::Float32RegsRegClass)
32 if (RC == &NVPTX::Float16RegsRegClass)
38 if (RC == &NVPTX::Float16x2RegsRegClass)
40 if (RC == &NVPTX::Float64RegsRegClass)
42 if (RC == &NVPTX::Int64RegsRegClass)
62 if (RC == &NVPTX::Int32RegsRegClass)
64 if (RC == &NVPTX::Int16RegsRegClass)
66 if (RC == &NVPTX::Int1RegsRegClass)
68 if (RC == &NVPTX::SpecialRegsRegClass)
74 if (RC == &NVPTX::Float32RegsRegClass)
76 if (RC == &NVPTX::Float16RegsRegClass)
78 if (RC == &NVPTX::Float16x2RegsRegClass)
80 if (RC == &NVPTX::Float64RegsRegClass)
82 if (RC == &NVPTX::Int64RegsRegClass)
84 if (RC == &NVPTX::Int32RegsRegClass)
86 if (RC == &NVPTX::Int16RegsRegClass)
88 if (RC == &NVPTX::Int1RegsRegClass)
90 if (RC == &NVPTX::SpecialRegsRegClass)
99#define GET_REGINFO_TARGET_DESC
100#include "NVPTXGenRegisterInfo.inc"
105 static const MCPhysReg CalleeSavedRegs[] = { 0 };
106 return CalleeSavedRegs;
111 for (
unsigned Reg = NVPTX::ENVREG0; Reg <= NVPTX::ENVREG31; ++Reg) {
114 markSuperRegs(
Reserved, NVPTX::VRFrame32);
115 markSuperRegs(
Reserved, NVPTX::VRFrameLocal32);
116 markSuperRegs(
Reserved, NVPTX::VRFrame64);
117 markSuperRegs(
Reserved, NVPTX::VRFrameLocal64);
118 markSuperRegs(
Reserved, NVPTX::VRDepot);
123 int SPAdj,
unsigned FIOperandNum,
125 assert(SPAdj == 0 &&
"Unexpected");
128 int FrameIndex =
MI.getOperand(FIOperandNum).getIndex();
132 MI.getOperand(FIOperandNum + 1).getImm();
136 MI.getOperand(FIOperandNum + 1).ChangeToImmediate(
Offset);
143 return TM.is64Bit() ? NVPTX::VRFrame64 : NVPTX::VRFrame32;
150 return TM.is64Bit() ? NVPTX::VRFrameLocal64 : NVPTX::VRFrameLocal32;
This file implements the BitVector class.
const char LLVMTargetMachineRef TM
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
int64_t getObjectOffset(int ObjectIdx) const
Return the assigned stack offset of the specified object from the incoming stack pointer.
MachineFrameInfo & getFrameInfo()
getFrameInfo - Return the frame info object for the current function.
const LLVMTargetMachine & getTarget() const
getTarget - Return the target machine this machine code is compiled with
Representation of each machine instruction.
Register getFrameLocalRegister(const MachineFunction &MF) const
const MCPhysReg * getCalleeSavedRegs(const MachineFunction *MF) const override
NVPTX Callee Saved Registers.
bool eliminateFrameIndex(MachineBasicBlock::iterator MI, int SPAdj, unsigned FIOperandNum, RegScavenger *RS=nullptr) const override
BitVector getReservedRegs(const MachineFunction &MF) const override
Register getFrameRegister(const MachineFunction &MF) const override
Wrapper class representing virtual and physical registers.
This is an optimization pass for GlobalISel generic memory operations.
std::string getNVPTXRegClassName(TargetRegisterClass const *RC)
std::string getNVPTXRegClassStr(TargetRegisterClass const *RC)