38 static inline bool isImmU6(
unsigned val) {
39 return val < (1 << 6);
43 return val < (1 << 16);
48 struct StackSlotInfo {
52 StackSlotInfo(
int f,
int o,
int r) : FI(f),
Offset(o),
Reg(r){};
57 return a.Offset < b.Offset;
67 .addCFIIndex(CFIIndex);
78 .addCFIIndex(CFIIndex);
89 .addCFIIndex(CFIIndex);
101 int &Adjusted,
int FrameSize,
bool emitFrameMoves) {
102 while (OffsetFromTop > Adjusted) {
103 assert(Adjusted < FrameSize &&
"OffsetFromTop is beyond FrameSize");
104 int remaining = FrameSize - Adjusted;
106 int Opcode =
isImmU6(OpImm) ? XCore::EXTSP_u6 : XCore::EXTSP_lu6;
125 while (OffsetFromTop < RemainingAdj -
MaxImmU16) {
126 assert(RemainingAdj &&
"OffsetFromTop is beyond FrameSize");
128 int Opcode =
isImmU6(OpImm) ? XCore::LDAWSP_ru6 : XCore::LDAWSP_lru6;
130 RemainingAdj -= OpImm;
140 bool fetchLR,
bool fetchFP) {
195 for (
unsigned i = 0,
e = SpillList.
size(); i !=
e; ++i) {
196 assert(SpillList[i].
Offset % 4 == 0 &&
"Misaligned stack offset");
197 assert(SpillList[i].
Offset <= 0 &&
"Unexpected positive stack offset");
198 int OffsetFromTop = - SpillList[i].Offset/4;
200 int Offset = RemainingAdj - OffsetFromTop;
201 int Opcode =
isImmU6(
Offset) ? XCore::LDWSP_ru6 : XCore::LDWSP_lru6;
225 assert(&MF.
front() == &
MBB &&
"Shrink-wrapping not yet supported");
252 bool UseENTSP = saveLR && FrameSize
262 int Opcode =
isImmU6(Adjusted) ? XCore::ENTSP_u6 : XCore::ENTSP_lu6;
268 if (emitFrameMoves) {
270 unsigned DRegNum =
MRI->getDwarfRegNum(XCore::LR,
true);
280 for (
unsigned i = 0,
e = SpillList.
size(); i !=
e; ++i) {
281 assert(SpillList[i].
Offset % 4 == 0 &&
"Misaligned stack offset");
282 assert(SpillList[i].
Offset <= 0 &&
"Unexpected positive stack offset");
283 int OffsetFromTop = - SpillList[i].Offset/4;
286 int Offset = Adjusted - OffsetFromTop;
287 int Opcode =
isImmU6(
Offset) ? XCore::STWSP_ru6 : XCore::STWSP_lru6;
294 if (emitFrameMoves) {
295 unsigned DRegNum =
MRI->getDwarfRegNum(SpillList[i].
Reg,
true);
303 assert(Adjusted==FrameSize &&
"IfNeededExtSP has not completed adjustment");
313 if (emitFrameMoves) {
320 unsigned DRegNum =
MRI->getDwarfRegNum(CSI.
getReg(),
true);
332 assert(SpillList.
size()==2 &&
"Unexpected SpillList size");
334 MRI->getDwarfRegNum(SpillList[0].Reg,
true),
335 SpillList[0].Offset);
337 MRI->getDwarfRegNum(SpillList[1].Reg,
true),
338 SpillList[1].Offset);
350 unsigned RetOpcode =
MBBI->getOpcode();
355 assert(RemainingAdj%4 == 0 &&
"Misaligned frame size");
379 bool UseRETSP = restoreLR && RemainingAdj
398 assert(RetOpcode == XCore::RETSP_u6
399 || RetOpcode == XCore::RETSP_lu6);
400 int Opcode =
isImmU6(RemainingAdj) ? XCore::RETSP_u6 : XCore::RETSP_lu6;
402 .addImm(RemainingAdj);
403 for (
unsigned i = 3,
e =
MBBI->getNumOperands(); i <
e; ++i)
407 int Opcode =
isImmU6(RemainingAdj) ? XCore::LDAWSP_ru6 :
428 DL =
MI->getDebugLoc();
430 for (
auto it = CSI.
begin(); it != CSI.
end(); ++it) {
431 unsigned Reg = it->getReg();
433 "LR & FP are always handled in emitPrologue");
439 if (emitFrameMoves) {
458 unsigned Reg = CSR.getReg();
460 "LR & FP are always handled in emitEpilogue");
465 "loadRegFromStackSlot didn't insert any code!");
502 errs() <<
"eliminateCallFramePseudoInstr size too big: " 509 if (Old.
getOpcode() == XCore::ADJCALLSTACKDOWN) {
510 int Opcode = isU6 ? XCore::EXTSP_u6 : XCore::EXTSP_lu6;
514 int Opcode = isU6 ? XCore::LDAWSP_ru6 : XCore::LDAWSP_lru6;
535 bool LRUsed =
MRI.isPhysRegModified(XCore::LR);
555 SavedRegs.
reset(XCore::LR);
568 assert(RS &&
"requiresRegisterScavenging failed");
577 unsigned Size =
TRI.getSpillSize(RC);
578 Align Alignment =
TRI.getSpillAlign(RC);
bool isVarArg() const
isVarArg - Return true if this function takes a variable number of arguments.
int createLRSpillSlot(MachineFunction &MF)
static const int MaxImmU16
static bool isImmU16(unsigned val)
LLVM_ATTRIBUTE_NORETURN void report_fatal_error(Error Err, bool gen_crash_diag=true)
Report a serious error, calling any installed error handler.
This class represents lattice values for constants.
Align getMaxAlign() const
Return the alignment in bytes that this function must be aligned to, which is greater than the defaul...
XCoreFrameLowering(const XCoreSubtarget &STI)
virtual const TargetRegisterInfo * getRegisterInfo() const
getRegisterInfo - If register information is available, return it.
bool spillCalleeSavedRegisters(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, ArrayRef< CalleeSavedInfo > CSI, const TargetRegisterInfo *TRI) const override
spillCalleeSavedRegisters - Issues instruction(s) to spill all callee saved registers and returns tru...
void push_back(const T &Elt)
const DebugLoc & getDebugLoc() const
Returns the debug location id of this MachineInstr.
LLVM_NODISCARD unsigned addFrameInst(const MCCFIInstruction &Inst)
static MCCFIInstruction createOffset(MCSymbol *L, unsigned Register, int Offset)
.cfi_offset Previous value of Register is saved at offset Offset from CFA.
virtual const TargetLowering * getTargetLowering() const
std::vector< std::pair< MachineBasicBlock::iterator, CalleeSavedInfo > > & getSpillLabels()
unsigned const TargetRegisterInfo * TRI
MachineModuleInfo & getMMI() const
The last use of a register.
static MachineMemOperand * getFrameIndexMMO(MachineBasicBlock &MBB, int FrameIndex, MachineMemOperand::Flags flags)
Function & getFunction()
Return the LLVM function that this machine code represents.
virtual void determineCalleeSaves(MachineFunction &MF, BitVector &SavedRegs, RegScavenger *RS=nullptr) const
This method determines which of the registers reported by TargetRegisterInfo::getCalleeSavedRegs() sh...
A description of a memory reference used in the backend.
instr_iterator erase(instr_iterator I)
Remove an instruction from the instruction list and delete it.
Twine - A lightweight data structure for efficiently representing the concatenation of temporary valu...
const HexagonInstrInfo * TII
This class consists of common code factored out of the SmallVector class to reduce code duplication b...
int64_t getObjectOffset(int ObjectIdx) const
Return the assigned stack offset of the specified object from the incoming stack pointer.
The MachineFrameInfo class represents an abstract stack frame until prolog/epilog code is inserted.
bool hasVarSizedObjects() const
This method may be called any time after instruction selection is complete to determine if the stack ...
unsigned getOpcode() const
Returns the opcode of this MachineInstr.
This class defines information used to lower LLVM code to legal SelectionDAG operators that the targe...
static bool needsFrameMoves(const MachineFunction &MF)
Return whether to emit frame moves.
bool restoreCalleeSavedRegisters(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, MutableArrayRef< CalleeSavedInfo > CSI, const TargetRegisterInfo *TRI) const override
restoreCalleeSavedRegisters - Issues instruction(s) to restore all callee saved registers and returns...
static void GetEHSpillList(SmallVectorImpl< StackSlotInfo > &SpillList, MachineFrameInfo &MFI, XCoreFunctionInfo *XFI, const Constant *PersonalityFn, const TargetLowering *TL)
Creates an ordered list of EH info register 'spills'.
bool DisableFramePointerElim(const MachineFunction &MF) const
DisableFramePointerElim - This returns true if frame pointer elimination optimization should be disab...
bool addRegisterKilled(Register IncomingReg, const TargetRegisterInfo *RegInfo, bool AddIfNotFound=false)
We have determined MI kills a register.
const MCContext & getContext() const
ArrayRef - Represent a constant reference to an array (0 or more elements consecutively in memory),...
iterator getLastNonDebugInstr()
Returns an iterator to the last non-debug instruction in the basic block, or end().
AttributeList getAttributes() const
Return the attribute list for this Function.
bool hasPersonalityFn() const
Check whether this function has a personality function.
virtual const TargetInstrInfo * getInstrInfo() const
uint64_t value() const
This is a hole in the type system and should not be abused.
instr_iterator insert(instr_iterator I, MachineInstr *M)
Insert MI into the instruction list before I, possibly inside a bundle.
int64_t getObjectSize(int ObjectIdx) const
Return the size of the specified object.
int createFPSpillSlot(MachineFunction &MF)
MCRegisterInfo base class - We assume that the target defines a static array of MCRegisterDesc object...
TargetInstrInfo - Interface to description of machine instruction set.
void addLiveIn(MCRegister PhysReg, LaneBitmask LaneMask=LaneBitmask::getAll())
Adds the specified register as a live in.
bool hasAttrSomewhere(Attribute::AttrKind Kind, unsigned *Index=nullptr) const
Return true if the specified attribute is set for at least one parameter or for the return value.
MachineInstrBuilder BuildMI(MachineFunction &MF, const DebugLoc &DL, const MCInstrDesc &MCID)
Builder interface. Specify how to create the initial instruction itself.
static void GetSpillList(SmallVectorImpl< StackSlotInfo > &SpillList, MachineFrameInfo &MFI, XCoreFunctionInfo *XFI, bool fetchLR, bool fetchFP)
Creates an ordered list of registers that are spilled during the emitPrologue/emitEpilogue.
This file declares the machine register scavenger class.
unsigned const MachineRegisterInfo * MRI
MutableArrayRef - Represent a mutable reference to an array (0 or more elements consecutively in memo...
Align getStackAlign() const
getStackAlignment - This method returns the number of bytes to which the stack pointer must be aligne...
const TargetSubtargetInfo & getSubtarget() const
getSubtarget - Return the subtarget for which this machine code is being compiled.
static MCCFIInstruction createDefCfaRegister(MCSymbol *L, unsigned Register)
.cfi_def_cfa_register modifies a rule for computing CFA.
MachineFrameInfo & getFrameInfo()
getFrameInfo - Return the frame info object for the current function.
static void EmitCfiOffset(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, const DebugLoc &dl, const TargetInstrInfo &TII, unsigned DRegNum, int Offset)
This is an important base class in LLVM.
Ty * getInfo()
getInfo - Keep track of various per-function pieces of information for backends that would like to do...
void emitPrologue(MachineFunction &MF, MachineBasicBlock &MBB) const override
emitProlog/emitEpilog - These methods insert prolog and epilog code into the function.
const int * createEHSpillSlot(MachineFunction &MF)
raw_fd_ostream & errs()
This returns a reference to a raw_ostream for standard error.
void sort(IteratorTy Start, IteratorTy End)
Align getObjectAlign(int ObjectIdx) const
Return the alignment of the specified stack object.
XCoreFunctionInfo - This class is derived from MachineFunction private XCore target-specific informat...
bool hasFP(const MachineFunction &MF) const override
hasFP - Return true if the specified function should have a dedicated frame pointer register.
TargetRegisterInfo base class - We assume that the target defines a static array of TargetRegisterDes...
const MachineBasicBlock & front() const
static void EmitDefCfaRegister(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, const DebugLoc &dl, const TargetInstrInfo &TII, MachineFunction &MF, unsigned DRegNum)
int getLRSpillSlot() const
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
virtual bool hasReservedCallFrame(const MachineFunction &MF) const
hasReservedCallFrame - Under normal circumstances, when a frame pointer is not required,...
This struct is a compact representation of a valid (non-zero power of two) alignment.
The memory access writes data.
void determineCalleeSaves(MachineFunction &MF, BitVector &SavedRegs, RegScavenger *RS=nullptr) const override
This method determines which of the registers reported by TargetRegisterInfo::getCalleeSavedRegs() sh...
void addOperand(MachineFunction &MF, const MachineOperand &Op)
Add the specified operand to the instruction.
static void EmitDefCfaOffset(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, const DebugLoc &dl, const TargetInstrInfo &TII, int Offset)
void addScavengingFrameIndex(int FI)
Add a scavenging frame index.
This is a 'vector' (really, a variable-sized array), optimized for the case when the array is small.
virtual Register getExceptionPointerRegister(const Constant *PersonalityFn) const
If a physical register, this returns the register that receives the exception address on entry to an ...
Information about stack frame layout on the target.
const MachineInstrBuilder & addMemOperand(MachineMemOperand *MMO) const
bool callsUnwindInit() const
MachineBasicBlock::iterator eliminateCallFramePseudoInstr(MachineFunction &MF, MachineBasicBlock &MBB, MachineBasicBlock::iterator I) const override
This method is called during prolog/epilog code insertion to eliminate call frame setup and destroy p...
static bool isImmU6(unsigned val)
The CalleeSavedInfo class tracks the information need to locate where a callee saved register is in t...
bool callsEHReturn() const
void processFunctionBeforeFrameFinalized(MachineFunction &MF, RegScavenger *RS=nullptr) const override
processFunctionBeforeFrameFinalized - This method is called immediately before the specified function...
Flags
Flags values. These may be or'd together.
MachineRegisterInfo - Keep track of information for virtual and physical registers,...
The memory access reads data.
static MachinePointerInfo getFixedStack(MachineFunction &MF, int FI, int64_t Offset=0)
Return a MachinePointerInfo record that refers to the specified FrameIndex.
const int * getEHSpillSlot() const
Representation of each machine instruction.
const MachineFunction * getParent() const
Return the MachineFunction containing this basic block.
static MCCFIInstruction cfiDefCfaOffset(MCSymbol *L, int Offset)
.cfi_def_cfa_offset modifies a rule for computing CFA.
uint64_t alignTo(uint64_t Size, Align A)
Returns a multiple of A needed to store Size bytes.
uint64_t estimateStackSize(const MachineFunction &MF) const
Estimate and return the size of the stack frame.
const MachineInstrBuilder & addImm(int64_t Val) const
Add a new immediate operand.
static void RestoreSpillList(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, const DebugLoc &dl, const TargetInstrInfo &TII, int &RemainingAdj, SmallVectorImpl< StackSlotInfo > &SpillList)
Restore clobbered registers with their spill slot value.
MachineRegisterInfo & getRegInfo()
getRegInfo - Return information about the registers currently in use.
void loadRegFromStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, Register DestReg, int FrameIndex, const TargetRegisterClass *RC, const TargetRegisterInfo *TRI) const override
Load the specified register of the given register class from the specified stack frame index.
void emitEpilogue(MachineFunction &MF, MachineBasicBlock &MBB) const override
const LLVMTargetMachine & getTarget() const
getTarget - Return the target machine this machine code is compiled with
OUTCHAIN = EH_RETURN(INCHAIN, OFFSET, HANDLER) - This node represents 'eh_return' gcc dwarf builtin,...
bool isLargeFrame(const MachineFunction &MF) const
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
MachineMemOperand * getMachineMemOperand(MachinePointerInfo PtrInfo, MachineMemOperand::Flags f, uint64_t s, Align base_alignment, const AAMDNodes &AAInfo=AAMDNodes(), const MDNode *Ranges=nullptr, SyncScope::ID SSID=SyncScope::System, AtomicOrdering Ordering=AtomicOrdering::NotAtomic, AtomicOrdering FailureOrdering=AtomicOrdering::NotAtomic)
getMachineMemOperand - Allocate a new MachineMemOperand.
int CreateStackObject(uint64_t Size, Align Alignment, bool isSpillSlot, const AllocaInst *Alloca=nullptr, uint8_t ID=0)
Create a new statically sized stack object, returning a nonnegative identifier to represent it.
const MCRegisterInfo * getRegisterInfo() const
Constant * getPersonalityFn() const
Get the personality function associated with this function.
static void IfNeededExtSP(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, const DebugLoc &dl, const TargetInstrInfo &TII, int OffsetFromTop, int &Adjusted, int FrameSize, bool emitFrameMoves)
The SP register is moved in steps of 'MaxImmU16' towards the bottom of the frame.
static const unsigned FramePtr
virtual Register getExceptionSelectorRegister(const Constant *PersonalityFn) const
If a physical register, this returns the register that receives the exception typeid on entry to a la...
static void IfNeededLDAWSP(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, const DebugLoc &dl, const TargetInstrInfo &TII, int OffsetFromTop, int &RemainingAdj)
The SP register is moved in steps of 'MaxImmU16' towards the top of the frame.
int getFPSpillSlot() const
auto reverse(ContainerTy &&C, std::enable_if_t< has_rbegin< ContainerTy >::value > *=nullptr)
const MachineOperand & getOperand(unsigned i) const
static bool CompareSSIOffset(const StackSlotInfo &a, const StackSlotInfo &b)
uint64_t getStackSize() const
Return the number of bytes that must be allocated to hold all of the fixed size frame objects.
MachineBasicBlock MachineBasicBlock::iterator MBBI
Wrapper class representing virtual and physical registers.
bool empty() const
empty - Check if the array is empty.
void storeRegToStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, Register SrcReg, bool isKill, int FrameIndex, const TargetRegisterClass *RC, const TargetRegisterInfo *TRI) const override
Store the specified register of the given register class to the specified stack frame index.
This class contains meta information specific to a module.
This file describes how to lower LLVM code to machine code.
MachineBasicBlock MachineBasicBlock::iterator DebugLoc DL