LLVM
15.0.0git
|
Functions | |
int64_t | getHwregId (const StringRef Name, const MCSubtargetInfo &STI) |
bool | isValidHwreg (int64_t Id) |
bool | isValidHwregOffset (int64_t Offset) |
bool | isValidHwregWidth (int64_t Width) |
uint64_t | encodeHwreg (uint64_t Id, uint64_t Offset, uint64_t Width) |
StringRef | getHwreg (unsigned Id, const MCSubtargetInfo &STI) |
void | decodeHwreg (unsigned Val, unsigned &Id, unsigned &Offset, unsigned &Width) |
Variables | |
const CustomOperand< const MCSubtargetInfo & > | Opr [] |
const int | OPR_SIZE |
Definition at line 382 of file SIDefines.h.
Definition at line 440 of file SIDefines.h.
enum llvm::AMDGPU::Hwreg::Offset : unsigned |
Enumerator | |
---|---|
OFFSET_DEFAULT_ | |
OFFSET_SHIFT_ | |
OFFSET_WIDTH_ | |
OFFSET_MASK_ | |
OFFSET_MEM_VIOL | |
OFFSET_SRC_SHARED_BASE | |
OFFSET_SRC_PRIVATE_BASE |
Definition at line 413 of file SIDefines.h.
enum llvm::AMDGPU::Hwreg::Width : unsigned |
Enumerator | |
---|---|
WIDTH_DEFAULT_ |
Definition at line 436 of file SIDefines.h.
enum llvm::AMDGPU::Hwreg::WidthMinusOne : unsigned |
Enumerator | |
---|---|
WIDTH_M1_DEFAULT_ | |
WIDTH_M1_SHIFT_ | |
WIDTH_M1_WIDTH_ | |
WIDTH_M1_MASK_ | |
WIDTH_M1_SRC_SHARED_BASE | |
WIDTH_M1_SRC_PRIVATE_BASE |
Definition at line 425 of file SIDefines.h.
void llvm::AMDGPU::Hwreg::decodeHwreg | ( | unsigned | Val, |
unsigned & | Id, | ||
unsigned & | Offset, | ||
unsigned & | Width | ||
) |
Definition at line 1284 of file AMDGPUBaseInfo.cpp.
References ID_MASK_, ID_SHIFT_, OFFSET_MASK_, OFFSET_SHIFT_, WIDTH_M1_MASK_, and WIDTH_M1_SHIFT_.
Referenced by llvm::SITargetLowering::EmitInstrWithCustomInserter(), and llvm::AMDGPUInstPrinter::printHwreg().
LLVM_READNONE uint64_t llvm::AMDGPU::Hwreg::encodeHwreg | ( | uint64_t | Id, |
uint64_t | Offset, | ||
uint64_t | Width | ||
) |
Definition at line 1273 of file AMDGPUBaseInfo.cpp.
References ID_SHIFT_, OFFSET_SHIFT_, and WIDTH_M1_SHIFT_.
Referenced by llvm::SITargetLowering::emitGWSMemViolTestLoop().
LLVM_READNONE StringRef llvm::AMDGPU::Hwreg::getHwreg | ( | unsigned | Id, |
const MCSubtargetInfo & | STI | ||
) |
Definition at line 1279 of file AMDGPUBaseInfo.cpp.
Referenced by llvm::AMDGPUInstPrinter::printHwreg().
LLVM_READONLY int64_t llvm::AMDGPU::Hwreg::getHwregId | ( | const StringRef | Name, |
const MCSubtargetInfo & | STI | ||
) |
Definition at line 1256 of file AMDGPUBaseInfo.cpp.
LLVM_READNONE bool llvm::AMDGPU::Hwreg::isValidHwreg | ( | int64_t | Id | ) |
Definition at line 1261 of file AMDGPUBaseInfo.cpp.
LLVM_READNONE bool llvm::AMDGPU::Hwreg::isValidHwregOffset | ( | int64_t | Offset | ) |
Definition at line 1265 of file AMDGPUBaseInfo.cpp.
LLVM_READNONE bool llvm::AMDGPU::Hwreg::isValidHwregWidth | ( | int64_t | Width | ) |
Definition at line 1269 of file AMDGPUBaseInfo.cpp.
const CustomOperand< const MCSubtargetInfo & > llvm::AMDGPU::Hwreg::Opr |
Definition at line 90 of file AMDGPUAsmUtils.cpp.
Referenced by llvm::AMDGPU::decodeCustomOperand(), llvm::AMDGPU::encodeCustomOperand(), llvm::AMDGPU::getDefaultCustomOperandEncoding(), getHwreg(), getHwregId(), isGuaranteedNotToBeUndefOrPoison(), and llvm::AMDGPU::isSymbolicCustomOperandEncoding().
Definition at line 134 of file AMDGPUAsmUtils.cpp.
Referenced by getHwreg(), and getHwregId().