LLVM 18.0.0git
AMDGPUAsmUtils.cpp
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1//===-- AMDGPUAsmUtils.cpp - AsmParser/InstPrinter common -----------------===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8#include "AMDGPUAsmUtils.h"
9#include "AMDGPUBaseInfo.h"
10#include "SIDefines.h"
11
12namespace llvm {
13namespace AMDGPU {
14
15namespace DepCtr {
16
17// NOLINTBEGIN
18const CustomOperandVal DepCtrInfo[] = {
19 // Name max dflt offset width constraint
20 {{"depctr_hold_cnt"}, 1, 1, 7, 1, isGFX10_BEncoding},
21 {{"depctr_sa_sdst"}, 1, 1, 0, 1},
22 {{"depctr_va_vdst"}, 15, 15, 12, 4},
23 {{"depctr_va_sdst"}, 7, 7, 9, 3},
24 {{"depctr_va_ssrc"}, 1, 1, 8, 1},
25 {{"depctr_va_vcc"}, 1, 1, 1, 1},
26 {{"depctr_vm_vsrc"}, 7, 7, 2, 3},
27};
28// NOLINTEND
29
30const int DEP_CTR_SIZE =
31 static_cast<int>(sizeof(DepCtrInfo) / sizeof(CustomOperandVal));
32
33} // namespace DepCtr
34
35namespace SendMsg {
36
37// Disable lint checking for this block since it makes the table unreadable.
38// NOLINTBEGIN
39const CustomOperand<const MCSubtargetInfo &> Msg[] = {
40 {{""}},
41 {{"MSG_INTERRUPT"}, ID_INTERRUPT},
42 {{"MSG_GS"}, ID_GS_PreGFX11, isNotGFX11Plus},
43 {{"MSG_GS_DONE"}, ID_GS_DONE_PreGFX11, isNotGFX11Plus},
44 {{"MSG_SAVEWAVE"}, ID_SAVEWAVE, isGFX8_GFX9_GFX10},
45 {{"MSG_STALL_WAVE_GEN"}, ID_STALL_WAVE_GEN, isGFX9Plus},
46 {{"MSG_HALT_WAVES"}, ID_HALT_WAVES, isGFX9Plus},
47 {{"MSG_ORDERED_PS_DONE"}, ID_ORDERED_PS_DONE, isGFX9_GFX10},
48 {{"MSG_EARLY_PRIM_DEALLOC"}, ID_EARLY_PRIM_DEALLOC, isGFX9_GFX10},
49 {{"MSG_GS_ALLOC_REQ"}, ID_GS_ALLOC_REQ, isGFX9Plus},
50 {{"MSG_GET_DOORBELL"}, ID_GET_DOORBELL, isGFX9_GFX10},
51 {{"MSG_GET_DDID"}, ID_GET_DDID, isGFX10},
52 {{"MSG_HS_TESSFACTOR"}, ID_HS_TESSFACTOR_GFX11Plus, isGFX11Plus},
53 {{"MSG_DEALLOC_VGPRS"}, ID_DEALLOC_VGPRS_GFX11Plus, isGFX11Plus},
54 {{""}},
55 {{"MSG_SYSMSG"}, ID_SYSMSG},
56 {{"MSG_RTN_GET_DOORBELL"}, ID_RTN_GET_DOORBELL, isGFX11Plus},
57 {{"MSG_RTN_GET_DDID"}, ID_RTN_GET_DDID, isGFX11Plus},
58 {{"MSG_RTN_GET_TMA"}, ID_RTN_GET_TMA, isGFX11Plus},
59 {{"MSG_RTN_GET_REALTIME"}, ID_RTN_GET_REALTIME, isGFX11Plus},
60 {{"MSG_RTN_SAVE_WAVE"}, ID_RTN_SAVE_WAVE, isGFX11Plus},
61 {{"MSG_RTN_GET_TBA"}, ID_RTN_GET_TBA, isGFX11Plus},
62};
63// NOLINTEND
64
65const int MSG_SIZE = static_cast<int>(
66 sizeof(Msg) / sizeof(CustomOperand<const MCSubtargetInfo &>));
67
68// These two must be in sync with llvm::AMDGPU::SendMsg::Op enum members, see SIDefines.h.
69const char *const OpSysSymbolic[OP_SYS_LAST_] = {
70 nullptr,
71 "SYSMSG_OP_ECC_ERR_INTERRUPT",
72 "SYSMSG_OP_REG_RD",
73 "SYSMSG_OP_HOST_TRAP_ACK",
74 "SYSMSG_OP_TTRACE_PC"
75};
76
77const char *const OpGsSymbolic[OP_GS_LAST_] = {
78 "GS_OP_NOP",
79 "GS_OP_CUT",
80 "GS_OP_EMIT",
81 "GS_OP_EMIT_CUT"
82};
83
84} // namespace SendMsg
85
86namespace Hwreg {
87
88// Disable lint checking for this block since it makes the table unreadable.
89// NOLINTBEGIN
90const CustomOperand<const MCSubtargetInfo &> Opr[] = {
91 {{""}},
92 {{"HW_REG_MODE"}, ID_MODE},
93 {{"HW_REG_STATUS"}, ID_STATUS},
94 {{"HW_REG_TRAPSTS"}, ID_TRAPSTS},
95 {{"HW_REG_HW_ID"}, ID_HW_ID, isNotGFX10Plus},
96 {{"HW_REG_GPR_ALLOC"}, ID_GPR_ALLOC},
97 {{"HW_REG_LDS_ALLOC"}, ID_LDS_ALLOC},
98 {{"HW_REG_IB_STS"}, ID_IB_STS},
99 {{""}},
100 {{""}},
101 {{""}},
102 {{""}},
103 {{""}},
104 {{""}},
105 {{""}},
106 {{"HW_REG_SH_MEM_BASES"}, ID_MEM_BASES, isGFX9Plus},
107 {{"HW_REG_TBA_LO"}, ID_TBA_LO, isGFX9_GFX10},
108 {{"HW_REG_TBA_HI"}, ID_TBA_HI, isGFX9_GFX10},
109 {{"HW_REG_TMA_LO"}, ID_TMA_LO, isGFX9_GFX10},
110 {{"HW_REG_TMA_HI"}, ID_TMA_HI, isGFX9_GFX10},
111 {{"HW_REG_FLAT_SCR_LO"}, ID_FLAT_SCR_LO, isGFX10Plus},
112 {{"HW_REG_FLAT_SCR_HI"}, ID_FLAT_SCR_HI, isGFX10Plus},
113 {{"HW_REG_XNACK_MASK"}, ID_XNACK_MASK, isGFX10Before1030},
114 {{"HW_REG_HW_ID1"}, ID_HW_ID1, isGFX10Plus},
115 {{"HW_REG_HW_ID2"}, ID_HW_ID2, isGFX10Plus},
116 {{"HW_REG_POPS_PACKER"}, ID_POPS_PACKER, isGFX10},
117 {{""}},
118 {{"HW_REG_PERF_SNAPSHOT_DATA"}, ID_PERF_SNAPSHOT_DATA, isGFX11Plus},
119 {{""}},
120 {{"HW_REG_SHADER_CYCLES"}, ID_SHADER_CYCLES, isGFX10_BEncoding},
121
122 // Register numbers reused in GFX11+
123 {{"HW_REG_PERF_SNAPSHOT_PC_LO"}, ID_PERF_SNAPSHOT_PC_LO, isGFX11Plus},
124 {{"HW_REG_PERF_SNAPSHOT_PC_HI"}, ID_PERF_SNAPSHOT_PC_HI, isGFX11Plus},
125
126 // GFX940 specific registers
127 {{"HW_REG_XCC_ID"}, ID_XCC_ID, isGFX940},
128 {{"HW_REG_SQ_PERF_SNAPSHOT_DATA"}, ID_SQ_PERF_SNAPSHOT_DATA, isGFX940},
129 {{"HW_REG_SQ_PERF_SNAPSHOT_DATA1"}, ID_SQ_PERF_SNAPSHOT_DATA1, isGFX940},
130 {{"HW_REG_SQ_PERF_SNAPSHOT_PC_LO"}, ID_SQ_PERF_SNAPSHOT_PC_LO, isGFX940},
131 {{"HW_REG_SQ_PERF_SNAPSHOT_PC_HI"}, ID_SQ_PERF_SNAPSHOT_PC_HI, isGFX940},
132
133 // Aliases
134 {{"HW_REG_HW_ID"}, ID_HW_ID1, isGFX10},
135};
136// NOLINTEND
137
138const int OPR_SIZE = static_cast<int>(
139 sizeof(Opr) / sizeof(CustomOperand<const MCSubtargetInfo &>));
140
141} // namespace Hwreg
142
143namespace MTBUFFormat {
144
145StringLiteral const DfmtSymbolic[] = {
146 "BUF_DATA_FORMAT_INVALID",
147 "BUF_DATA_FORMAT_8",
148 "BUF_DATA_FORMAT_16",
149 "BUF_DATA_FORMAT_8_8",
150 "BUF_DATA_FORMAT_32",
151 "BUF_DATA_FORMAT_16_16",
152 "BUF_DATA_FORMAT_10_11_11",
153 "BUF_DATA_FORMAT_11_11_10",
154 "BUF_DATA_FORMAT_10_10_10_2",
155 "BUF_DATA_FORMAT_2_10_10_10",
156 "BUF_DATA_FORMAT_8_8_8_8",
157 "BUF_DATA_FORMAT_32_32",
158 "BUF_DATA_FORMAT_16_16_16_16",
159 "BUF_DATA_FORMAT_32_32_32",
160 "BUF_DATA_FORMAT_32_32_32_32",
161 "BUF_DATA_FORMAT_RESERVED_15"
162};
163
164StringLiteral const NfmtSymbolicGFX10[] = {
165 "BUF_NUM_FORMAT_UNORM",
166 "BUF_NUM_FORMAT_SNORM",
167 "BUF_NUM_FORMAT_USCALED",
168 "BUF_NUM_FORMAT_SSCALED",
169 "BUF_NUM_FORMAT_UINT",
170 "BUF_NUM_FORMAT_SINT",
171 "",
172 "BUF_NUM_FORMAT_FLOAT"
173};
174
175StringLiteral const NfmtSymbolicSICI[] = {
176 "BUF_NUM_FORMAT_UNORM",
177 "BUF_NUM_FORMAT_SNORM",
178 "BUF_NUM_FORMAT_USCALED",
179 "BUF_NUM_FORMAT_SSCALED",
180 "BUF_NUM_FORMAT_UINT",
181 "BUF_NUM_FORMAT_SINT",
182 "BUF_NUM_FORMAT_SNORM_OGL",
183 "BUF_NUM_FORMAT_FLOAT"
184};
185
186StringLiteral const NfmtSymbolicVI[] = { // VI and GFX9
187 "BUF_NUM_FORMAT_UNORM",
188 "BUF_NUM_FORMAT_SNORM",
189 "BUF_NUM_FORMAT_USCALED",
190 "BUF_NUM_FORMAT_SSCALED",
191 "BUF_NUM_FORMAT_UINT",
192 "BUF_NUM_FORMAT_SINT",
193 "BUF_NUM_FORMAT_RESERVED_6",
194 "BUF_NUM_FORMAT_FLOAT"
195};
196
197StringLiteral const UfmtSymbolicGFX10[] = {
198 "BUF_FMT_INVALID",
199
200 "BUF_FMT_8_UNORM",
201 "BUF_FMT_8_SNORM",
202 "BUF_FMT_8_USCALED",
203 "BUF_FMT_8_SSCALED",
204 "BUF_FMT_8_UINT",
205 "BUF_FMT_8_SINT",
206
207 "BUF_FMT_16_UNORM",
208 "BUF_FMT_16_SNORM",
209 "BUF_FMT_16_USCALED",
210 "BUF_FMT_16_SSCALED",
211 "BUF_FMT_16_UINT",
212 "BUF_FMT_16_SINT",
213 "BUF_FMT_16_FLOAT",
214
215 "BUF_FMT_8_8_UNORM",
216 "BUF_FMT_8_8_SNORM",
217 "BUF_FMT_8_8_USCALED",
218 "BUF_FMT_8_8_SSCALED",
219 "BUF_FMT_8_8_UINT",
220 "BUF_FMT_8_8_SINT",
221
222 "BUF_FMT_32_UINT",
223 "BUF_FMT_32_SINT",
224 "BUF_FMT_32_FLOAT",
225
226 "BUF_FMT_16_16_UNORM",
227 "BUF_FMT_16_16_SNORM",
228 "BUF_FMT_16_16_USCALED",
229 "BUF_FMT_16_16_SSCALED",
230 "BUF_FMT_16_16_UINT",
231 "BUF_FMT_16_16_SINT",
232 "BUF_FMT_16_16_FLOAT",
233
234 "BUF_FMT_10_11_11_UNORM",
235 "BUF_FMT_10_11_11_SNORM",
236 "BUF_FMT_10_11_11_USCALED",
237 "BUF_FMT_10_11_11_SSCALED",
238 "BUF_FMT_10_11_11_UINT",
239 "BUF_FMT_10_11_11_SINT",
240 "BUF_FMT_10_11_11_FLOAT",
241
242 "BUF_FMT_11_11_10_UNORM",
243 "BUF_FMT_11_11_10_SNORM",
244 "BUF_FMT_11_11_10_USCALED",
245 "BUF_FMT_11_11_10_SSCALED",
246 "BUF_FMT_11_11_10_UINT",
247 "BUF_FMT_11_11_10_SINT",
248 "BUF_FMT_11_11_10_FLOAT",
249
250 "BUF_FMT_10_10_10_2_UNORM",
251 "BUF_FMT_10_10_10_2_SNORM",
252 "BUF_FMT_10_10_10_2_USCALED",
253 "BUF_FMT_10_10_10_2_SSCALED",
254 "BUF_FMT_10_10_10_2_UINT",
255 "BUF_FMT_10_10_10_2_SINT",
256
257 "BUF_FMT_2_10_10_10_UNORM",
258 "BUF_FMT_2_10_10_10_SNORM",
259 "BUF_FMT_2_10_10_10_USCALED",
260 "BUF_FMT_2_10_10_10_SSCALED",
261 "BUF_FMT_2_10_10_10_UINT",
262 "BUF_FMT_2_10_10_10_SINT",
263
264 "BUF_FMT_8_8_8_8_UNORM",
265 "BUF_FMT_8_8_8_8_SNORM",
266 "BUF_FMT_8_8_8_8_USCALED",
267 "BUF_FMT_8_8_8_8_SSCALED",
268 "BUF_FMT_8_8_8_8_UINT",
269 "BUF_FMT_8_8_8_8_SINT",
270
271 "BUF_FMT_32_32_UINT",
272 "BUF_FMT_32_32_SINT",
273 "BUF_FMT_32_32_FLOAT",
274
275 "BUF_FMT_16_16_16_16_UNORM",
276 "BUF_FMT_16_16_16_16_SNORM",
277 "BUF_FMT_16_16_16_16_USCALED",
278 "BUF_FMT_16_16_16_16_SSCALED",
279 "BUF_FMT_16_16_16_16_UINT",
280 "BUF_FMT_16_16_16_16_SINT",
281 "BUF_FMT_16_16_16_16_FLOAT",
282
283 "BUF_FMT_32_32_32_UINT",
284 "BUF_FMT_32_32_32_SINT",
285 "BUF_FMT_32_32_32_FLOAT",
286 "BUF_FMT_32_32_32_32_UINT",
287 "BUF_FMT_32_32_32_32_SINT",
288 "BUF_FMT_32_32_32_32_FLOAT"
289};
290
291unsigned const DfmtNfmt2UFmtGFX10[] = {
292 DFMT_INVALID | (NFMT_UNORM << NFMT_SHIFT),
293
294 DFMT_8 | (NFMT_UNORM << NFMT_SHIFT),
295 DFMT_8 | (NFMT_SNORM << NFMT_SHIFT),
296 DFMT_8 | (NFMT_USCALED << NFMT_SHIFT),
297 DFMT_8 | (NFMT_SSCALED << NFMT_SHIFT),
298 DFMT_8 | (NFMT_UINT << NFMT_SHIFT),
299 DFMT_8 | (NFMT_SINT << NFMT_SHIFT),
300
301 DFMT_16 | (NFMT_UNORM << NFMT_SHIFT),
302 DFMT_16 | (NFMT_SNORM << NFMT_SHIFT),
303 DFMT_16 | (NFMT_USCALED << NFMT_SHIFT),
304 DFMT_16 | (NFMT_SSCALED << NFMT_SHIFT),
305 DFMT_16 | (NFMT_UINT << NFMT_SHIFT),
306 DFMT_16 | (NFMT_SINT << NFMT_SHIFT),
307 DFMT_16 | (NFMT_FLOAT << NFMT_SHIFT),
308
309 DFMT_8_8 | (NFMT_UNORM << NFMT_SHIFT),
310 DFMT_8_8 | (NFMT_SNORM << NFMT_SHIFT),
311 DFMT_8_8 | (NFMT_USCALED << NFMT_SHIFT),
312 DFMT_8_8 | (NFMT_SSCALED << NFMT_SHIFT),
313 DFMT_8_8 | (NFMT_UINT << NFMT_SHIFT),
314 DFMT_8_8 | (NFMT_SINT << NFMT_SHIFT),
315
316 DFMT_32 | (NFMT_UINT << NFMT_SHIFT),
317 DFMT_32 | (NFMT_SINT << NFMT_SHIFT),
318 DFMT_32 | (NFMT_FLOAT << NFMT_SHIFT),
319
320 DFMT_16_16 | (NFMT_UNORM << NFMT_SHIFT),
321 DFMT_16_16 | (NFMT_SNORM << NFMT_SHIFT),
322 DFMT_16_16 | (NFMT_USCALED << NFMT_SHIFT),
323 DFMT_16_16 | (NFMT_SSCALED << NFMT_SHIFT),
324 DFMT_16_16 | (NFMT_UINT << NFMT_SHIFT),
325 DFMT_16_16 | (NFMT_SINT << NFMT_SHIFT),
326 DFMT_16_16 | (NFMT_FLOAT << NFMT_SHIFT),
327
328 DFMT_10_11_11 | (NFMT_UNORM << NFMT_SHIFT),
329 DFMT_10_11_11 | (NFMT_SNORM << NFMT_SHIFT),
330 DFMT_10_11_11 | (NFMT_USCALED << NFMT_SHIFT),
331 DFMT_10_11_11 | (NFMT_SSCALED << NFMT_SHIFT),
332 DFMT_10_11_11 | (NFMT_UINT << NFMT_SHIFT),
333 DFMT_10_11_11 | (NFMT_SINT << NFMT_SHIFT),
334 DFMT_10_11_11 | (NFMT_FLOAT << NFMT_SHIFT),
335
336 DFMT_11_11_10 | (NFMT_UNORM << NFMT_SHIFT),
337 DFMT_11_11_10 | (NFMT_SNORM << NFMT_SHIFT),
338 DFMT_11_11_10 | (NFMT_USCALED << NFMT_SHIFT),
339 DFMT_11_11_10 | (NFMT_SSCALED << NFMT_SHIFT),
340 DFMT_11_11_10 | (NFMT_UINT << NFMT_SHIFT),
341 DFMT_11_11_10 | (NFMT_SINT << NFMT_SHIFT),
342 DFMT_11_11_10 | (NFMT_FLOAT << NFMT_SHIFT),
343
344 DFMT_10_10_10_2 | (NFMT_UNORM << NFMT_SHIFT),
345 DFMT_10_10_10_2 | (NFMT_SNORM << NFMT_SHIFT),
346 DFMT_10_10_10_2 | (NFMT_USCALED << NFMT_SHIFT),
347 DFMT_10_10_10_2 | (NFMT_SSCALED << NFMT_SHIFT),
348 DFMT_10_10_10_2 | (NFMT_UINT << NFMT_SHIFT),
349 DFMT_10_10_10_2 | (NFMT_SINT << NFMT_SHIFT),
350
351 DFMT_2_10_10_10 | (NFMT_UNORM << NFMT_SHIFT),
352 DFMT_2_10_10_10 | (NFMT_SNORM << NFMT_SHIFT),
353 DFMT_2_10_10_10 | (NFMT_USCALED << NFMT_SHIFT),
354 DFMT_2_10_10_10 | (NFMT_SSCALED << NFMT_SHIFT),
355 DFMT_2_10_10_10 | (NFMT_UINT << NFMT_SHIFT),
356 DFMT_2_10_10_10 | (NFMT_SINT << NFMT_SHIFT),
357
358 DFMT_8_8_8_8 | (NFMT_UNORM << NFMT_SHIFT),
359 DFMT_8_8_8_8 | (NFMT_SNORM << NFMT_SHIFT),
360 DFMT_8_8_8_8 | (NFMT_USCALED << NFMT_SHIFT),
361 DFMT_8_8_8_8 | (NFMT_SSCALED << NFMT_SHIFT),
362 DFMT_8_8_8_8 | (NFMT_UINT << NFMT_SHIFT),
363 DFMT_8_8_8_8 | (NFMT_SINT << NFMT_SHIFT),
364
365 DFMT_32_32 | (NFMT_UINT << NFMT_SHIFT),
366 DFMT_32_32 | (NFMT_SINT << NFMT_SHIFT),
367 DFMT_32_32 | (NFMT_FLOAT << NFMT_SHIFT),
368
369 DFMT_16_16_16_16 | (NFMT_UNORM << NFMT_SHIFT),
370 DFMT_16_16_16_16 | (NFMT_SNORM << NFMT_SHIFT),
371 DFMT_16_16_16_16 | (NFMT_USCALED << NFMT_SHIFT),
372 DFMT_16_16_16_16 | (NFMT_SSCALED << NFMT_SHIFT),
373 DFMT_16_16_16_16 | (NFMT_UINT << NFMT_SHIFT),
374 DFMT_16_16_16_16 | (NFMT_SINT << NFMT_SHIFT),
375 DFMT_16_16_16_16 | (NFMT_FLOAT << NFMT_SHIFT),
376
377 DFMT_32_32_32 | (NFMT_UINT << NFMT_SHIFT),
378 DFMT_32_32_32 | (NFMT_SINT << NFMT_SHIFT),
379 DFMT_32_32_32 | (NFMT_FLOAT << NFMT_SHIFT),
380 DFMT_32_32_32_32 | (NFMT_UINT << NFMT_SHIFT),
381 DFMT_32_32_32_32 | (NFMT_SINT << NFMT_SHIFT),
382 DFMT_32_32_32_32 | (NFMT_FLOAT << NFMT_SHIFT)
383};
384
385StringLiteral const UfmtSymbolicGFX11[] = {
386 "BUF_FMT_INVALID",
387
388 "BUF_FMT_8_UNORM",
389 "BUF_FMT_8_SNORM",
390 "BUF_FMT_8_USCALED",
391 "BUF_FMT_8_SSCALED",
392 "BUF_FMT_8_UINT",
393 "BUF_FMT_8_SINT",
394
395 "BUF_FMT_16_UNORM",
396 "BUF_FMT_16_SNORM",
397 "BUF_FMT_16_USCALED",
398 "BUF_FMT_16_SSCALED",
399 "BUF_FMT_16_UINT",
400 "BUF_FMT_16_SINT",
401 "BUF_FMT_16_FLOAT",
402
403 "BUF_FMT_8_8_UNORM",
404 "BUF_FMT_8_8_SNORM",
405 "BUF_FMT_8_8_USCALED",
406 "BUF_FMT_8_8_SSCALED",
407 "BUF_FMT_8_8_UINT",
408 "BUF_FMT_8_8_SINT",
409
410 "BUF_FMT_32_UINT",
411 "BUF_FMT_32_SINT",
412 "BUF_FMT_32_FLOAT",
413
414 "BUF_FMT_16_16_UNORM",
415 "BUF_FMT_16_16_SNORM",
416 "BUF_FMT_16_16_USCALED",
417 "BUF_FMT_16_16_SSCALED",
418 "BUF_FMT_16_16_UINT",
419 "BUF_FMT_16_16_SINT",
420 "BUF_FMT_16_16_FLOAT",
421
422 "BUF_FMT_10_11_11_FLOAT",
423
424 "BUF_FMT_11_11_10_FLOAT",
425
426 "BUF_FMT_10_10_10_2_UNORM",
427 "BUF_FMT_10_10_10_2_SNORM",
428 "BUF_FMT_10_10_10_2_UINT",
429 "BUF_FMT_10_10_10_2_SINT",
430
431 "BUF_FMT_2_10_10_10_UNORM",
432 "BUF_FMT_2_10_10_10_SNORM",
433 "BUF_FMT_2_10_10_10_USCALED",
434 "BUF_FMT_2_10_10_10_SSCALED",
435 "BUF_FMT_2_10_10_10_UINT",
436 "BUF_FMT_2_10_10_10_SINT",
437
438 "BUF_FMT_8_8_8_8_UNORM",
439 "BUF_FMT_8_8_8_8_SNORM",
440 "BUF_FMT_8_8_8_8_USCALED",
441 "BUF_FMT_8_8_8_8_SSCALED",
442 "BUF_FMT_8_8_8_8_UINT",
443 "BUF_FMT_8_8_8_8_SINT",
444
445 "BUF_FMT_32_32_UINT",
446 "BUF_FMT_32_32_SINT",
447 "BUF_FMT_32_32_FLOAT",
448
449 "BUF_FMT_16_16_16_16_UNORM",
450 "BUF_FMT_16_16_16_16_SNORM",
451 "BUF_FMT_16_16_16_16_USCALED",
452 "BUF_FMT_16_16_16_16_SSCALED",
453 "BUF_FMT_16_16_16_16_UINT",
454 "BUF_FMT_16_16_16_16_SINT",
455 "BUF_FMT_16_16_16_16_FLOAT",
456
457 "BUF_FMT_32_32_32_UINT",
458 "BUF_FMT_32_32_32_SINT",
459 "BUF_FMT_32_32_32_FLOAT",
460 "BUF_FMT_32_32_32_32_UINT",
461 "BUF_FMT_32_32_32_32_SINT",
462 "BUF_FMT_32_32_32_32_FLOAT"
463};
464
465unsigned const DfmtNfmt2UFmtGFX11[] = {
466 DFMT_INVALID | (NFMT_UNORM << NFMT_SHIFT),
467
468 DFMT_8 | (NFMT_UNORM << NFMT_SHIFT),
469 DFMT_8 | (NFMT_SNORM << NFMT_SHIFT),
470 DFMT_8 | (NFMT_USCALED << NFMT_SHIFT),
471 DFMT_8 | (NFMT_SSCALED << NFMT_SHIFT),
472 DFMT_8 | (NFMT_UINT << NFMT_SHIFT),
473 DFMT_8 | (NFMT_SINT << NFMT_SHIFT),
474
475 DFMT_16 | (NFMT_UNORM << NFMT_SHIFT),
476 DFMT_16 | (NFMT_SNORM << NFMT_SHIFT),
477 DFMT_16 | (NFMT_USCALED << NFMT_SHIFT),
478 DFMT_16 | (NFMT_SSCALED << NFMT_SHIFT),
479 DFMT_16 | (NFMT_UINT << NFMT_SHIFT),
480 DFMT_16 | (NFMT_SINT << NFMT_SHIFT),
481 DFMT_16 | (NFMT_FLOAT << NFMT_SHIFT),
482
483 DFMT_8_8 | (NFMT_UNORM << NFMT_SHIFT),
484 DFMT_8_8 | (NFMT_SNORM << NFMT_SHIFT),
485 DFMT_8_8 | (NFMT_USCALED << NFMT_SHIFT),
486 DFMT_8_8 | (NFMT_SSCALED << NFMT_SHIFT),
487 DFMT_8_8 | (NFMT_UINT << NFMT_SHIFT),
488 DFMT_8_8 | (NFMT_SINT << NFMT_SHIFT),
489
490 DFMT_32 | (NFMT_UINT << NFMT_SHIFT),
491 DFMT_32 | (NFMT_SINT << NFMT_SHIFT),
492 DFMT_32 | (NFMT_FLOAT << NFMT_SHIFT),
493
494 DFMT_16_16 | (NFMT_UNORM << NFMT_SHIFT),
495 DFMT_16_16 | (NFMT_SNORM << NFMT_SHIFT),
496 DFMT_16_16 | (NFMT_USCALED << NFMT_SHIFT),
497 DFMT_16_16 | (NFMT_SSCALED << NFMT_SHIFT),
498 DFMT_16_16 | (NFMT_UINT << NFMT_SHIFT),
499 DFMT_16_16 | (NFMT_SINT << NFMT_SHIFT),
500 DFMT_16_16 | (NFMT_FLOAT << NFMT_SHIFT),
501
502 DFMT_10_11_11 | (NFMT_FLOAT << NFMT_SHIFT),
503
504 DFMT_11_11_10 | (NFMT_FLOAT << NFMT_SHIFT),
505
506 DFMT_10_10_10_2 | (NFMT_UNORM << NFMT_SHIFT),
507 DFMT_10_10_10_2 | (NFMT_SNORM << NFMT_SHIFT),
508 DFMT_10_10_10_2 | (NFMT_UINT << NFMT_SHIFT),
509 DFMT_10_10_10_2 | (NFMT_SINT << NFMT_SHIFT),
510
511 DFMT_2_10_10_10 | (NFMT_UNORM << NFMT_SHIFT),
512 DFMT_2_10_10_10 | (NFMT_SNORM << NFMT_SHIFT),
513 DFMT_2_10_10_10 | (NFMT_USCALED << NFMT_SHIFT),
514 DFMT_2_10_10_10 | (NFMT_SSCALED << NFMT_SHIFT),
515 DFMT_2_10_10_10 | (NFMT_UINT << NFMT_SHIFT),
516 DFMT_2_10_10_10 | (NFMT_SINT << NFMT_SHIFT),
517
518 DFMT_8_8_8_8 | (NFMT_UNORM << NFMT_SHIFT),
519 DFMT_8_8_8_8 | (NFMT_SNORM << NFMT_SHIFT),
520 DFMT_8_8_8_8 | (NFMT_USCALED << NFMT_SHIFT),
521 DFMT_8_8_8_8 | (NFMT_SSCALED << NFMT_SHIFT),
522 DFMT_8_8_8_8 | (NFMT_UINT << NFMT_SHIFT),
523 DFMT_8_8_8_8 | (NFMT_SINT << NFMT_SHIFT),
524
525 DFMT_32_32 | (NFMT_UINT << NFMT_SHIFT),
526 DFMT_32_32 | (NFMT_SINT << NFMT_SHIFT),
527 DFMT_32_32 | (NFMT_FLOAT << NFMT_SHIFT),
528
529 DFMT_16_16_16_16 | (NFMT_UNORM << NFMT_SHIFT),
530 DFMT_16_16_16_16 | (NFMT_SNORM << NFMT_SHIFT),
531 DFMT_16_16_16_16 | (NFMT_USCALED << NFMT_SHIFT),
532 DFMT_16_16_16_16 | (NFMT_SSCALED << NFMT_SHIFT),
533 DFMT_16_16_16_16 | (NFMT_UINT << NFMT_SHIFT),
534 DFMT_16_16_16_16 | (NFMT_SINT << NFMT_SHIFT),
535 DFMT_16_16_16_16 | (NFMT_FLOAT << NFMT_SHIFT),
536
537 DFMT_32_32_32 | (NFMT_UINT << NFMT_SHIFT),
538 DFMT_32_32_32 | (NFMT_SINT << NFMT_SHIFT),
539 DFMT_32_32_32 | (NFMT_FLOAT << NFMT_SHIFT),
540 DFMT_32_32_32_32 | (NFMT_UINT << NFMT_SHIFT),
541 DFMT_32_32_32_32 | (NFMT_SINT << NFMT_SHIFT),
542 DFMT_32_32_32_32 | (NFMT_FLOAT << NFMT_SHIFT)
543};
544
545} // namespace MTBUFFormat
546
547namespace Swizzle {
548
549// This must be in sync with llvm::AMDGPU::Swizzle::Id enum members, see SIDefines.h.
550const char* const IdSymbolic[] = {
551 "QUAD_PERM",
552 "BITMASK_PERM",
553 "SWAP",
554 "REVERSE",
555 "BROADCAST",
556};
557
558} // namespace Swizzle
559
560namespace VGPRIndexMode {
561
562// This must be in sync with llvm::AMDGPU::VGPRIndexMode::Id enum members, see SIDefines.h.
563const char* const IdSymbolic[] = {
564 "SRC0",
565 "SRC1",
566 "SRC2",
567 "DST",
568};
569
570} // namespace VGPRIndexMode
571
572} // namespace AMDGPU
573} // namespace llvm
Swizzle
static std::vector< std::pair< int, unsigned > > Swizzle(std::vector< std::pair< int, unsigned > > Src, R600InstrInfo::BankSwizzle Swz)
Definition: R600InstrInfo.cpp:350
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A wrapper around a string literal that serves as a proxy for constructing global tables of StringRefs...
Definition: StringRef.h:857
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const CustomOperandVal DepCtrInfo[]
Definition: AMDGPUAsmUtils.cpp:18
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const CustomOperand< const MCSubtargetInfo & > Opr[]
Definition: AMDGPUAsmUtils.cpp:90
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StringLiteral const UfmtSymbolicGFX11[]
Definition: AMDGPUAsmUtils.cpp:385
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unsigned const DfmtNfmt2UFmtGFX10[]
Definition: AMDGPUAsmUtils.cpp:291
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StringLiteral const DfmtSymbolic[]
Definition: AMDGPUAsmUtils.cpp:145
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StringLiteral const NfmtSymbolicGFX10[]
Definition: AMDGPUAsmUtils.cpp:164
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unsigned const DfmtNfmt2UFmtGFX11[]
Definition: AMDGPUAsmUtils.cpp:465
llvm::AMDGPU::MTBUFFormat::NfmtSymbolicVI
StringLiteral const NfmtSymbolicVI[]
Definition: AMDGPUAsmUtils.cpp:186
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StringLiteral const NfmtSymbolicSICI[]
Definition: AMDGPUAsmUtils.cpp:175
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StringLiteral const UfmtSymbolicGFX10[]
Definition: AMDGPUAsmUtils.cpp:197
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const char *const OpGsSymbolic[OP_GS_LAST_]
Definition: AMDGPUAsmUtils.cpp:77
llvm::AMDGPU::SendMsg::OpSysSymbolic
const char *const OpSysSymbolic[OP_SYS_LAST_]
Definition: AMDGPUAsmUtils.cpp:69
llvm::AMDGPU::SendMsg::Msg
const CustomOperand< const MCSubtargetInfo & > Msg[]
Definition: AMDGPUAsmUtils.cpp:39
llvm::AMDGPU::Swizzle::IdSymbolic
const char *const IdSymbolic[]
Definition: AMDGPUAsmUtils.cpp:550
llvm::AMDGPU::VGPRIndexMode::IdSymbolic
const char *const IdSymbolic[]
Definition: AMDGPUAsmUtils.cpp:563
llvm::AMDGPU::isGFX10_BEncoding
bool isGFX10_BEncoding(const MCSubtargetInfo &STI)
Definition: AMDGPUBaseInfo.cpp:2055
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bool isGFX10Before1030(const MCSubtargetInfo &STI)
Definition: AMDGPUBaseInfo.cpp:2043
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bool isGFX10(const MCSubtargetInfo &STI)
Definition: AMDGPUBaseInfo.cpp:2007
llvm::AMDGPU::isGFX940
bool isGFX940(const MCSubtargetInfo &STI)
Definition: AMDGPUBaseInfo.cpp:2071
llvm::AMDGPU::isGFX8_GFX9_GFX10
bool isGFX8_GFX9_GFX10(const MCSubtargetInfo &STI)
Definition: AMDGPUBaseInfo.cpp:1995
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bool isNotGFX10Plus(const MCSubtargetInfo &STI)
Definition: AMDGPUBaseInfo.cpp:2039
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Definition: AMDGPUBaseInfo.cpp:2035
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bool isGFX11Plus(const MCSubtargetInfo &STI)
Definition: AMDGPUBaseInfo.cpp:2023
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bool isGFX10Plus(const MCSubtargetInfo &STI)
Definition: AMDGPUBaseInfo.cpp:2015
llvm::AMDGPU::isGFX9Plus
bool isGFX9Plus(const MCSubtargetInfo &STI)
Definition: AMDGPUBaseInfo.cpp:2003
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bool isGFX9_GFX10(const MCSubtargetInfo &STI)
Definition: AMDGPUBaseInfo.cpp:1987
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This is an optimization pass for GlobalISel generic memory operations.
Definition: AddressRanges.h:18
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