LLVM  14.0.0git
CSKYFrameLowering.cpp
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1 //===-- CSKYFrameLowering.cpp - CSKY Frame Information ------------------===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // This file contains the CSKY implementation of TargetFrameLowering class.
10 //
11 //===----------------------------------------------------------------------===//
12 
13 #include "CSKYFrameLowering.h"
15 #include "CSKYSubtarget.h"
21 #include "llvm/IR/DiagnosticInfo.h"
22 #include "llvm/MC/MCDwarf.h"
23 
24 using namespace llvm;
25 
26 #define DEBUG_TYPE "csky-frame-lowering"
27 
28 // Returns the register used to hold the frame pointer.
29 static Register getFPReg(const CSKYSubtarget &STI) { return CSKY::R8; }
30 
31 // To avoid the BP value clobbered by a function call, we need to choose a
32 // callee saved register to save the value.
33 static Register getBPReg(const CSKYSubtarget &STI) { return CSKY::R7; }
34 
36  const TargetRegisterInfo *RegInfo = MF.getSubtarget().getRegisterInfo();
37 
38  const MachineFrameInfo &MFI = MF.getFrameInfo();
39  return MF.getTarget().Options.DisableFramePointerElim(MF) ||
40  RegInfo->hasStackRealignment(MF) || MFI.hasVarSizedObjects() ||
41  MFI.isFrameAddressTaken();
42 }
43 
45  const MachineFrameInfo &MFI = MF.getFrameInfo();
46 
47  return MFI.hasVarSizedObjects();
48 }
49 
50 // Determines the size of the frame and maximum call frame size.
51 void CSKYFrameLowering::determineFrameLayout(MachineFunction &MF) const {
52  MachineFrameInfo &MFI = MF.getFrameInfo();
53  const CSKYRegisterInfo *RI = STI.getRegisterInfo();
54 
55  // Get the number of bytes to allocate from the FrameInfo.
56  uint64_t FrameSize = MFI.getStackSize();
57 
58  // Get the alignment.
60  if (RI->hasStackRealignment(MF)) {
61  Align MaxStackAlign = std::max(StackAlign, MFI.getMaxAlign());
62  FrameSize += (MaxStackAlign.value() - StackAlign.value());
63  StackAlign = MaxStackAlign;
64  }
65 
66  // Set Max Call Frame Size
67  uint64_t MaxCallSize = alignTo(MFI.getMaxCallFrameSize(), StackAlign);
68  MFI.setMaxCallFrameSize(MaxCallSize);
69 
70  // Make sure the frame is aligned.
71  FrameSize = alignTo(FrameSize, StackAlign);
72 
73  // Update frame info.
74  MFI.setStackSize(FrameSize);
75 }
76 
78  MachineBasicBlock &MBB) const {
80  MachineFrameInfo &MFI = MF.getFrameInfo();
81  const CSKYRegisterInfo *RI = STI.getRegisterInfo();
82  const CSKYInstrInfo *TII = STI.getInstrInfo();
85  const MachineRegisterInfo &MRI = MF.getRegInfo();
86 
87  Register FPReg = getFPReg(STI);
88  Register SPReg = CSKY::R14;
89  Register BPReg = getBPReg(STI);
90 
91  // Debug location must be unknown since the first debug location is used
92  // to determine the end of the prologue.
93  DebugLoc DL;
94 
95  if (MF.getFunction().hasFnAttribute("interrupt"))
96  BuildMI(MBB, MBBI, DL, TII->get(CSKY::NIE));
97 
98  // Determine the correct frame layout
99  determineFrameLayout(MF);
100 
101  // FIXME (note copied from Lanai): This appears to be overallocating. Needs
102  // investigation. Get the number of bytes to allocate from the FrameInfo.
103  uint64_t StackSize = MFI.getStackSize();
104 
105  // Early exit if there is no need to allocate on the stack
106  if (StackSize == 0 && !MFI.adjustsStack())
107  return;
108 
109  const auto &CSI = MFI.getCalleeSavedInfo();
110 
111  unsigned spillAreaSize = CFI->getCalleeSaveAreaSize();
112 
113  uint64_t ActualSize = spillAreaSize + CFI->getVarArgsSaveSize();
114 
115  // First part stack allocation.
116  adjustReg(MBB, MBBI, DL, SPReg, SPReg, -(static_cast<int64_t>(ActualSize)),
118 
119  // Emit ".cfi_def_cfa_offset FirstSPAdjustAmount"
120  unsigned CFIIndex =
121  MF.addFrameInst(MCCFIInstruction::cfiDefCfaOffset(nullptr, ActualSize));
122  BuildMI(MBB, MBBI, DL, TII->get(TargetOpcode::CFI_INSTRUCTION))
123  .addCFIIndex(CFIIndex);
124 
125  // The frame pointer is callee-saved, and code has been generated for us to
126  // save it to the stack. We need to skip over the storing of callee-saved
127  // registers as the frame pointer must be modified after it has been saved
128  // to the stack, not before.
129  // FIXME: assumes exactly one instruction is used to save each callee-saved
130  // register.
131  std::advance(MBBI, CSI.size());
132 
133  // Iterate over list of callee-saved registers and emit .cfi_offset
134  // directives.
135  for (const auto &Entry : CSI) {
136  int64_t Offset = MFI.getObjectOffset(Entry.getFrameIdx());
137  Register Reg = Entry.getReg();
138 
139  unsigned Num = TRI->getRegSizeInBits(Reg, MRI) / 32;
140  for (unsigned i = 0; i < Num; i++) {
141  unsigned CFIIndex = MF.addFrameInst(MCCFIInstruction::createOffset(
142  nullptr, RI->getDwarfRegNum(Reg, true) + i, Offset + i * 4));
143  BuildMI(MBB, MBBI, DL, TII->get(TargetOpcode::CFI_INSTRUCTION))
144  .addCFIIndex(CFIIndex);
145  }
146  }
147 
148  // Generate new FP.
149  if (hasFP(MF)) {
150  BuildMI(MBB, MBBI, DL, TII->get(TargetOpcode::COPY), FPReg)
151  .addReg(SPReg)
153 
154  // Emit ".cfi_def_cfa_register $fp"
156  nullptr, RI->getDwarfRegNum(FPReg, true)));
157  BuildMI(MBB, MBBI, DL, TII->get(TargetOpcode::CFI_INSTRUCTION))
158  .addCFIIndex(CFIIndex);
159 
160  // Second part stack allocation.
161  adjustReg(MBB, MBBI, DL, SPReg, SPReg,
162  -(static_cast<int64_t>(StackSize - ActualSize)),
164 
165  // Realign Stack
166  const CSKYRegisterInfo *RI = STI.getRegisterInfo();
167  if (RI->hasStackRealignment(MF)) {
168  Align MaxAlignment = MFI.getMaxAlign();
169 
170  const CSKYInstrInfo *TII = STI.getInstrInfo();
171  if (STI.hasE2() && isUInt<12>(~(-(int)MaxAlignment.value()))) {
172  BuildMI(MBB, MBBI, DL, TII->get(CSKY::ANDNI32), SPReg)
173  .addReg(SPReg)
174  .addImm(~(-(int)MaxAlignment.value()));
175  } else {
176  unsigned ShiftAmount = Log2(MaxAlignment);
177 
178  if (STI.hasE2()) {
179  Register VR =
180  MF.getRegInfo().createVirtualRegister(&CSKY::GPRRegClass);
181  BuildMI(MBB, MBBI, DL, TII->get(CSKY::LSRI32), VR)
182  .addReg(SPReg)
183  .addImm(ShiftAmount);
184  BuildMI(MBB, MBBI, DL, TII->get(CSKY::LSLI32), SPReg)
185  .addReg(VR)
186  .addImm(ShiftAmount);
187  } else {
188  Register VR =
189  MF.getRegInfo().createVirtualRegister(&CSKY::mGPRRegClass);
190  BuildMI(MBB, MBBI, DL, TII->get(CSKY::MOV16), VR).addReg(SPReg);
191  BuildMI(MBB, MBBI, DL, TII->get(CSKY::LSRI16), VR)
192  .addReg(VR)
193  .addImm(ShiftAmount);
194  BuildMI(MBB, MBBI, DL, TII->get(CSKY::LSLI16), VR)
195  .addReg(VR)
196  .addImm(ShiftAmount);
197  BuildMI(MBB, MBBI, DL, TII->get(CSKY::MOV16), SPReg).addReg(VR);
198  }
199  }
200  }
201 
202  // FP will be used to restore the frame in the epilogue, so we need
203  // another base register BP to record SP after re-alignment. SP will
204  // track the current stack after allocating variable sized objects.
205  if (hasBP(MF)) {
206  // move BP, SP
207  BuildMI(MBB, MBBI, DL, TII->get(TargetOpcode::COPY), BPReg).addReg(SPReg);
208  }
209 
210  } else {
211  adjustReg(MBB, MBBI, DL, SPReg, SPReg,
212  -(static_cast<int64_t>(StackSize - ActualSize)),
214  // Emit ".cfi_def_cfa_offset StackSize"
215  unsigned CFIIndex = MF.addFrameInst(
216  MCCFIInstruction::cfiDefCfaOffset(nullptr, MFI.getStackSize()));
217  BuildMI(MBB, MBBI, DL, TII->get(TargetOpcode::CFI_INSTRUCTION))
218  .addCFIIndex(CFIIndex);
219  }
220 }
221 
223  MachineBasicBlock &MBB) const {
225 
226  MachineFrameInfo &MFI = MF.getFrameInfo();
227  Register FPReg = getFPReg(STI);
228  Register SPReg = CSKY::R14;
229 
230  // Get the insert location for the epilogue. If there were no terminators in
231  // the block, get the last instruction.
233  DebugLoc DL;
234  if (!MBB.empty()) {
236  if (MBBI == MBB.end())
238  DL = MBBI->getDebugLoc();
239 
240  // If this is not a terminator, the actual insert location should be after
241  // the last instruction.
242  if (!MBBI->isTerminator())
243  MBBI = std::next(MBBI);
244  }
245 
246  const auto &CSI = MFI.getCalleeSavedInfo();
247  uint64_t StackSize = MFI.getStackSize();
248 
249  uint64_t ActualSize =
251 
252  // Skip to before the restores of callee-saved registers
253  // FIXME: assumes exactly one instruction is used to restore each
254  // callee-saved register.
255  auto LastFrameDestroy = MBBI;
256  if (!CSI.empty())
257  LastFrameDestroy = std::prev(MBBI, CSI.size());
258 
259  if (hasFP(MF)) {
260  const CSKYInstrInfo *TII = STI.getInstrInfo();
261  BuildMI(MBB, LastFrameDestroy, DL, TII->get(TargetOpcode::COPY), SPReg)
262  .addReg(FPReg)
264  } else {
265  adjustReg(MBB, LastFrameDestroy, DL, SPReg, SPReg, (StackSize - ActualSize),
267  }
268 
269  adjustReg(MBB, MBBI, DL, SPReg, SPReg, ActualSize,
271 }
272 
274  const CSKYSubtarget &STI) {
275  unsigned Limit = (1 << 12) - 1;
276 
277  for (auto &MBB : MF) {
278  for (auto &MI : MBB) {
279  if (MI.isDebugInstr())
280  continue;
281 
282  for (unsigned i = 0, e = MI.getNumOperands(); i != e; ++i) {
283  if (!MI.getOperand(i).isFI())
284  continue;
285 
286  if (MI.getOpcode() == CSKY::SPILL_CARRY ||
287  MI.getOpcode() == CSKY::RESTORE_CARRY ||
288  MI.getOpcode() == CSKY::STORE_PAIR ||
289  MI.getOpcode() == CSKY::LOAD_PAIR) {
290  Limit = std::min(Limit, ((1U << 12) - 1) * 4);
291  break;
292  }
293 
294  if (MI.getOpcode() == CSKY::ADDI32) {
295  Limit = std::min(Limit, (1U << 12));
296  break;
297  }
298 
299  if (MI.getOpcode() == CSKY::ADDI16XZ) {
300  Limit = std::min(Limit, (1U << 3));
301  break;
302  }
303 
304  // ADDI16 will not require an extra register,
305  // it can reuse the destination.
306  if (MI.getOpcode() == CSKY::ADDI16)
307  break;
308 
309  // Otherwise check the addressing mode.
310  switch (MI.getDesc().TSFlags & CSKYII::AddrModeMask) {
311  default:
312  LLVM_DEBUG(MI.dump());
314  "Unhandled addressing mode in stack size limit calculation");
315  case CSKYII::AddrMode32B:
316  Limit = std::min(Limit, (1U << 12) - 1);
317  break;
318  case CSKYII::AddrMode32H:
319  Limit = std::min(Limit, ((1U << 12) - 1) * 2);
320  break;
322  Limit = std::min(Limit, ((1U << 12) - 1) * 4);
323  break;
324  case CSKYII::AddrMode16B:
325  Limit = std::min(Limit, (1U << 5) - 1);
326  break;
327  case CSKYII::AddrMode16H:
328  Limit = std::min(Limit, ((1U << 5) - 1) * 2);
329  break;
330  case CSKYII::AddrMode16W:
331  Limit = std::min(Limit, ((1U << 5) - 1) * 4);
332  break;
334  Limit = std::min(Limit, ((1U << 8) - 1) * 4);
335  break;
336  }
337  break; // At most one FI per instruction
338  }
339  }
340  }
341 
342  return Limit;
343 }
344 
346  BitVector &SavedRegs,
347  RegScavenger *RS) const {
349 
352  const MachineRegisterInfo &MRI = MF.getRegInfo();
353  MachineFrameInfo &MFI = MF.getFrameInfo();
354 
355  if (hasFP(MF))
356  SavedRegs.set(CSKY::R8);
357 
358  // Mark BP as used if function has dedicated base pointer.
359  if (hasBP(MF))
360  SavedRegs.set(CSKY::R7);
361 
362  // If interrupt is enabled and there are calls in the handler,
363  // unconditionally save all Caller-saved registers and
364  // all FP registers, regardless whether they are used.
365  if (MF.getFunction().hasFnAttribute("interrupt") && MFI.hasCalls()) {
366 
367  static const MCPhysReg CSRegs[] = {CSKY::R0, CSKY::R1, CSKY::R2, CSKY::R3,
368  CSKY::R12, CSKY::R13, 0};
369 
370  for (unsigned i = 0; CSRegs[i]; ++i)
371  SavedRegs.set(CSRegs[i]);
372 
373  if (STI.hasHighRegisters()) {
374 
375  static const MCPhysReg CSHRegs[] = {CSKY::R18, CSKY::R19, CSKY::R20,
376  CSKY::R21, CSKY::R22, CSKY::R23,
377  CSKY::R24, CSKY::R25, 0};
378 
379  for (unsigned i = 0; CSHRegs[i]; ++i)
380  SavedRegs.set(CSHRegs[i]);
381  }
382 
383  static const MCPhysReg CSF32Regs[] = {
384  CSKY::F8_32, CSKY::F9_32, CSKY::F10_32,
385  CSKY::F11_32, CSKY::F12_32, CSKY::F13_32,
386  CSKY::F14_32, CSKY::F15_32, 0};
387  static const MCPhysReg CSF64Regs[] = {
388  CSKY::F8_64, CSKY::F9_64, CSKY::F10_64,
389  CSKY::F11_64, CSKY::F12_64, CSKY::F13_64,
390  CSKY::F14_64, CSKY::F15_64, 0};
391 
392  const MCPhysReg *FRegs = NULL;
393  if (STI.hasFPUv2DoubleFloat() || STI.hasFPUv3DoubleFloat())
394  FRegs = CSF64Regs;
395  else if (STI.hasFPUv2SingleFloat() || STI.hasFPUv3SingleFloat())
396  FRegs = CSF32Regs;
397 
398  if (FRegs != NULL) {
399  const MCPhysReg *Regs = MF.getRegInfo().getCalleeSavedRegs();
400 
401  for (unsigned i = 0; Regs[i]; ++i)
402  if (CSKY::FPR32RegClass.contains(Regs[i]) ||
403  CSKY::FPR64RegClass.contains(Regs[i])) {
404  unsigned x = 0;
405  for (; FRegs[x]; ++x)
406  if (FRegs[x] == Regs[i])
407  break;
408  if (FRegs[x] == 0)
409  SavedRegs.set(Regs[i]);
410  }
411  }
412  }
413 
414  CFI->setLRIsSpilled(SavedRegs.test(CSKY::R15));
415 
416  unsigned CSStackSize = 0;
417  for (unsigned Reg : SavedRegs.set_bits()) {
418  auto RegSize = TRI->getRegSizeInBits(Reg, MRI) / 8;
419  CSStackSize += RegSize;
420  }
421 
422  CFI->setCalleeSaveAreaSize(CSStackSize);
423 
424  uint64_t Limit = estimateRSStackSizeLimit(MF, STI);
425 
426  bool BigFrame = (MFI.estimateStackSize(MF) + CSStackSize >= Limit);
427 
428  if (BigFrame || CFI->isCRSpilled() || !STI.hasE2()) {
429  const TargetRegisterClass *RC = &CSKY::GPRRegClass;
430  unsigned size = TRI->getSpillSize(*RC);
431  Align align = TRI->getSpillAlign(*RC);
432 
434  }
435 }
436 
437 // Not preserve stack space within prologue for outgoing variables when the
438 // function contains variable size objects and let eliminateCallFramePseudoInstr
439 // preserve stack space for it.
441  return !MF.getFrameInfo().hasVarSizedObjects();
442 }
443 
447  if (CSI.empty())
448  return true;
449 
450  MachineFunction *MF = MBB.getParent();
451  const TargetInstrInfo &TII = *MF->getSubtarget().getInstrInfo();
452  DebugLoc DL;
453  if (MI != MBB.end() && !MI->isDebugInstr())
454  DL = MI->getDebugLoc();
455 
456  for (auto &CS : CSI) {
457  // Insert the spill to the stack frame.
458  Register Reg = CS.getReg();
460  TII.storeRegToStackSlot(MBB, MI, Reg, true, CS.getFrameIdx(), RC, TRI);
461  }
462 
463  return true;
464 }
465 
469  if (CSI.empty())
470  return true;
471 
472  MachineFunction *MF = MBB.getParent();
473  const TargetInstrInfo &TII = *MF->getSubtarget().getInstrInfo();
474  DebugLoc DL;
475  if (MI != MBB.end() && !MI->isDebugInstr())
476  DL = MI->getDebugLoc();
477 
478  for (auto &CS : reverse(CSI)) {
479  Register Reg = CS.getReg();
481  TII.loadRegFromStackSlot(MBB, MI, Reg, CS.getFrameIdx(), RC, TRI);
482  assert(MI != MBB.begin() && "loadRegFromStackSlot didn't insert any code!");
483  }
484 
485  return true;
486 }
487 
488 // Eliminate ADJCALLSTACKDOWN, ADJCALLSTACKUP pseudo instructions.
492  Register SPReg = CSKY::R14;
493  DebugLoc DL = MI->getDebugLoc();
494 
495  if (!hasReservedCallFrame(MF)) {
496  // If space has not been reserved for a call frame, ADJCALLSTACKDOWN and
497  // ADJCALLSTACKUP must be converted to instructions manipulating the stack
498  // pointer. This is necessary when there is a variable length stack
499  // allocation (e.g. alloca), which means it's not possible to allocate
500  // space for outgoing arguments from within the function prologue.
501  int64_t Amount = MI->getOperand(0).getImm();
502 
503  if (Amount != 0) {
504  // Ensure the stack remains aligned after adjustment.
505  Amount = alignSPAdjust(Amount);
506 
507  if (MI->getOpcode() == CSKY::ADJCALLSTACKDOWN)
508  Amount = -Amount;
509 
510  adjustReg(MBB, MI, DL, SPReg, SPReg, Amount, MachineInstr::NoFlags);
511  }
512  }
513 
514  return MBB.erase(MI);
515 }
516 
517 void CSKYFrameLowering::adjustReg(MachineBasicBlock &MBB,
519  const DebugLoc &DL, Register DestReg,
520  Register SrcReg, int64_t Val,
521  MachineInstr::MIFlag Flag) const {
522  const CSKYInstrInfo *TII = STI.getInstrInfo();
523 
524  if (DestReg == SrcReg && Val == 0)
525  return;
526 
527  // TODO: Add 16-bit instruction support with immediate num
528  if (STI.hasE2() && isUInt<12>(std::abs(Val) - 1)) {
529  BuildMI(MBB, MBBI, DL, TII->get(Val < 0 ? CSKY::SUBI32 : CSKY::ADDI32),
530  DestReg)
531  .addReg(SrcReg)
532  .addImm(std::abs(Val))
533  .setMIFlag(Flag);
534  } else if (!STI.hasE2() && isShiftedUInt<7, 2>(std::abs(Val))) {
535  BuildMI(MBB, MBBI, DL,
536  TII->get(Val < 0 ? CSKY::SUBI16SPSP : CSKY::ADDI16SPSP), CSKY::R14)
537  .addReg(CSKY::R14, RegState::Kill)
538  .addImm(std::abs(Val))
539  .setMIFlag(Flag);
540  } else {
541 
542  unsigned Op = 0;
543 
544  if (STI.hasE2()) {
545  Op = Val < 0 ? CSKY::SUBU32 : CSKY::ADDU32;
546  } else {
547  assert(SrcReg == DestReg);
548  Op = Val < 0 ? CSKY::SUBU16XZ : CSKY::ADDU16XZ;
549  }
550 
551  Register ScratchReg = TII->movImm(MBB, MBBI, DL, std::abs(Val), Flag);
552 
553  BuildMI(MBB, MBBI, DL, TII->get(Op), DestReg)
554  .addReg(SrcReg)
555  .addReg(ScratchReg, RegState::Kill)
556  .setMIFlag(Flag);
557  }
558 }
559 
562  Register &FrameReg) const {
564  const MachineFrameInfo &MFI = MF.getFrameInfo();
566  const auto &CSI = MFI.getCalleeSavedInfo();
567 
568  int MinCSFI = 0;
569  int MaxCSFI = -1;
570 
571  int Offset = MFI.getObjectOffset(FI) + MFI.getOffsetAdjustment();
572 
573  if (CSI.size()) {
574  MinCSFI = CSI[0].getFrameIdx();
575  MaxCSFI = CSI[CSI.size() - 1].getFrameIdx();
576  }
577 
578  if (FI >= MinCSFI && FI <= MaxCSFI) {
579  FrameReg = CSKY::R14;
581  } else if (RI->hasStackRealignment(MF)) {
582  assert(hasFP(MF));
583  if (!MFI.isFixedObjectIndex(FI)) {
584  FrameReg = hasBP(MF) ? getBPReg(STI) : CSKY::R14;
585  Offset += MFI.getStackSize();
586  } else {
587  FrameReg = getFPReg(STI);
589  }
590  } else {
591  if (MFI.isFixedObjectIndex(FI) && hasFP(MF)) {
592  FrameReg = getFPReg(STI);
594  } else {
595  FrameReg = hasBP(MF) ? getBPReg(STI) : CSKY::R14;
596  Offset += MFI.getStackSize();
597  }
598  }
599 
601 }
i
i
Definition: README.txt:29
llvm::CSKYFrameLowering::spillCalleeSavedRegisters
bool spillCalleeSavedRegisters(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, ArrayRef< CalleeSavedInfo > CSI, const TargetRegisterInfo *TRI) const override
spillCalleeSavedRegisters - Issues instruction(s) to spill all callee saved registers and returns tru...
Definition: CSKYFrameLowering.cpp:444
llvm::alignTo
uint64_t alignTo(uint64_t Size, Align A)
Returns a multiple of A needed to store Size bytes.
Definition: Alignment.h:148
llvm::MachineFrameInfo::hasVarSizedObjects
bool hasVarSizedObjects() const
This method may be called any time after instruction selection is complete to determine if the stack ...
Definition: MachineFrameInfo.h:353
llvm::CSKYII::AddrMode32SDF
@ AddrMode32SDF
Definition: CSKYBaseInfo.h:36
llvm::RISCVAttrs::StackAlign
StackAlign
Definition: RISCVAttributes.h:37
MCDwarf.h
MI
IRTranslator LLVM IR MI
Definition: IRTranslator.cpp:105
llvm::MachineInstrBuilder::addImm
const MachineInstrBuilder & addImm(int64_t Val) const
Add a new immediate operand.
Definition: MachineInstrBuilder.h:131
llvm::MachineFrameInfo::estimateStackSize
uint64_t estimateStackSize(const MachineFunction &MF) const
Estimate and return the size of the stack frame.
Definition: MachineFrameInfo.cpp:137
llvm
This is an optimization pass for GlobalISel generic memory operations.
Definition: AllocatorList.h:23
llvm::CSKYII::AddrMode32WD
@ AddrMode32WD
Definition: CSKYBaseInfo.h:32
llvm::MachineRegisterInfo::createVirtualRegister
Register createVirtualRegister(const TargetRegisterClass *RegClass, StringRef Name="")
createVirtualRegister - Create and return a new virtual register in the function with the specified r...
Definition: MachineRegisterInfo.cpp:158
llvm::MachineRegisterInfo
MachineRegisterInfo - Keep track of information for virtual and physical registers,...
Definition: MachineRegisterInfo.h:52
RegSize
unsigned RegSize
Definition: AArch64MIPeepholeOpt.cpp:93
llvm::BitVector::set
BitVector & set()
Definition: BitVector.h:343
llvm::TargetSubtargetInfo::getInstrInfo
virtual const TargetInstrInfo * getInstrInfo() const
Definition: TargetSubtargetInfo.h:92
llvm::MachineInstrBuilder::addCFIIndex
const MachineInstrBuilder & addCFIIndex(unsigned CFIIndex) const
Definition: MachineInstrBuilder.h:247
getBPReg
static Register getBPReg(const CSKYSubtarget &STI)
Definition: CSKYFrameLowering.cpp:33
contains
return AArch64::GPR64RegClass contains(Reg)
llvm::CSKYFrameLowering::eliminateCallFramePseudoInstr
MachineBasicBlock::iterator eliminateCallFramePseudoInstr(MachineFunction &MF, MachineBasicBlock &MBB, MachineBasicBlock::iterator MI) const override
This method is called during prolog/epilog code insertion to eliminate call frame setup and destroy p...
Definition: CSKYFrameLowering.cpp:489
llvm::CSKYInstrInfo
Definition: CSKYInstrInfo.h:26
llvm::X86Disassembler::Reg
Reg
All possible values of the reg field in the ModR/M byte.
Definition: X86DisassemblerDecoder.h:462
llvm::BitVector::set_bits
iterator_range< const_set_bits_iterator > set_bits() const
Definition: BitVector.h:132
llvm::CSKYMachineFunctionInfo
Definition: CSKYMachineFunctionInfo.h:20
llvm::CSKYFrameLowering::restoreCalleeSavedRegisters
bool restoreCalleeSavedRegisters(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, MutableArrayRef< CalleeSavedInfo > CSI, const TargetRegisterInfo *TRI) const override
restoreCalleeSavedRegisters - Issues instruction(s) to restore all callee saved registers and returns...
Definition: CSKYFrameLowering.cpp:466
llvm::TargetSubtargetInfo::getRegisterInfo
virtual const TargetRegisterInfo * getRegisterInfo() const
getRegisterInfo - If register information is available, return it.
Definition: TargetSubtargetInfo.h:124
llvm::CSKYII::AddrMode16W
@ AddrMode16W
Definition: CSKYBaseInfo.h:35
llvm::TargetRegisterInfo
TargetRegisterInfo base class - We assume that the target defines a static array of TargetRegisterDes...
Definition: TargetRegisterInfo.h:233
llvm::StackOffset::getFixed
ScalarTy getFixed() const
Definition: TypeSize.h:149
llvm::CSKYRegisterInfo
Definition: CSKYRegisterInfo.h:24
llvm::MachineFrameInfo::setStackSize
void setStackSize(uint64_t Size)
Set the size of the stack.
Definition: MachineFrameInfo.h:556
llvm::reverse
auto reverse(ContainerTy &&C, std::enable_if_t< has_rbegin< ContainerTy >::value > *=nullptr)
Definition: STLExtras.h:357
llvm::MachineFrameInfo::setMaxCallFrameSize
void setMaxCallFrameSize(unsigned S)
Definition: MachineFrameInfo.h:632
Offset
uint64_t Offset
Definition: ELFObjHandler.cpp:80
llvm::CSKYMachineFunctionInfo::getVarArgsSaveSize
unsigned getVarArgsSaveSize() const
Definition: CSKYMachineFunctionInfo.h:47
llvm::RegState::Kill
@ Kill
The last use of a register.
Definition: MachineInstrBuilder.h:48
llvm::CSKYFrameLowering::emitEpilogue
void emitEpilogue(MachineFunction &MF, MachineBasicBlock &MBB) const override
Definition: CSKYFrameLowering.cpp:222
TRI
unsigned const TargetRegisterInfo * TRI
Definition: MachineSink.cpp:1564
llvm::MachineFrameInfo::getMaxCallFrameSize
unsigned getMaxCallFrameSize() const
Return the maximum size of a call frame that must be allocated for an outgoing function call.
Definition: MachineFrameInfo.h:622
llvm::CSKYFrameLowering::emitPrologue
void emitPrologue(MachineFunction &MF, MachineBasicBlock &MBB) const override
emitProlog/emitEpilog - These methods insert prolog and epilog code into the function.
Definition: CSKYFrameLowering.cpp:77
llvm::ArrayRef::empty
bool empty() const
empty - Check if the array is empty.
Definition: ArrayRef.h:158
LLVM_DEBUG
#define LLVM_DEBUG(X)
Definition: Debug.h:101
llvm::CSKYFrameLowering::getFrameIndexReference
StackOffset getFrameIndexReference(const MachineFunction &MF, int FI, Register &FrameReg) const override
getFrameIndexReference - This method should return the base register and offset used to reference a f...
Definition: CSKYFrameLowering.cpp:561
llvm::MCCFIInstruction::cfiDefCfaOffset
static MCCFIInstruction cfiDefCfaOffset(MCSymbol *L, int Offset)
.cfi_def_cfa_offset modifies a rule for computing CFA.
Definition: MCDwarf.h:538
MachineRegisterInfo.h
llvm::MachineInstr::FrameDestroy
@ FrameDestroy
Definition: MachineInstr.h:84
llvm::MachineBasicBlock::erase
instr_iterator erase(instr_iterator I)
Remove an instruction from the instruction list and delete it.
Definition: MachineBasicBlock.cpp:1298
R2
#define R2(n)
llvm::MachineFunction::getRegInfo
MachineRegisterInfo & getRegInfo()
getRegInfo - Return information about the registers currently in use.
Definition: MachineFunction.h:651
llvm::TargetInstrInfo
TargetInstrInfo - Interface to description of machine instruction set.
Definition: TargetInstrInfo.h:97
llvm::CSKYSubtarget::hasFPUv2SingleFloat
bool hasFPUv2SingleFloat() const
Definition: CSKYSubtarget.h:92
llvm::MutableArrayRef
MutableArrayRef - Represent a mutable reference to an array (0 or more elements consecutively in memo...
Definition: ArrayRef.h:305
CSKYSubtarget.h
llvm::MachineFunction::getInfo
Ty * getInfo()
getInfo - Keep track of various per-function pieces of information for backends that would like to do...
Definition: MachineFunction.h:739
llvm::CSKYFrameLowering::hasReservedCallFrame
bool hasReservedCallFrame(const MachineFunction &MF) const override
hasReservedCallFrame - Under normal circumstances, when a frame pointer is not required,...
Definition: CSKYFrameLowering.cpp:440
llvm::TargetFrameLowering::getStackAlign
Align getStackAlign() const
getStackAlignment - This method returns the number of bytes to which the stack pointer must be aligne...
Definition: TargetFrameLowering.h:100
llvm::Log2
unsigned Log2(Align A)
Returns the log2 of the alignment.
Definition: Alignment.h:207
estimateRSStackSizeLimit
static unsigned estimateRSStackSizeLimit(MachineFunction &MF, const CSKYSubtarget &STI)
Definition: CSKYFrameLowering.cpp:273
llvm::TargetRegisterClass
Definition: TargetRegisterInfo.h:46
llvm::CSKYII::AddrMode16B
@ AddrMode16B
Definition: CSKYBaseInfo.h:33
TII
const HexagonInstrInfo * TII
Definition: HexagonCopyToCombine.cpp:127
llvm::MachineInstr::FrameSetup
@ FrameSetup
Definition: MachineInstr.h:82
llvm::MCID::Flag
Flag
These should be considered private to the implementation of the MCInstrDesc class.
Definition: MCInstrDesc.h:146
llvm::CSKYMachineFunctionInfo::isCRSpilled
bool isCRSpilled() const
Definition: CSKYMachineFunctionInfo.h:42
llvm::MachineFrameInfo::getStackSize
uint64_t getStackSize() const
Return the number of bytes that must be allocated to hold all of the fixed size frame objects.
Definition: MachineFrameInfo.h:553
llvm::BitVector
Definition: BitVector.h:74
llvm::CSKYSubtarget::getRegisterInfo
const CSKYRegisterInfo * getRegisterInfo() const override
Definition: CSKYSubtarget.h:72
llvm::CSKYFrameLowering::determineCalleeSaves
void determineCalleeSaves(MachineFunction &MF, BitVector &SavedRegs, RegScavenger *RS) const override
This method determines which of the registers reported by TargetRegisterInfo::getCalleeSavedRegs() sh...
Definition: CSKYFrameLowering.cpp:345
llvm::Align
This struct is a compact representation of a valid (non-zero power of two) alignment.
Definition: Alignment.h:39
llvm::CSKYFrameLowering::hasBP
bool hasBP(const MachineFunction &MF) const
Definition: CSKYFrameLowering.cpp:44
llvm::CSKYSubtarget
Definition: CSKYSubtarget.h:30
llvm::MCCFIInstruction::createDefCfaRegister
static MCCFIInstruction createDefCfaRegister(MCSymbol *L, unsigned Register)
.cfi_def_cfa_register modifies a rule for computing CFA.
Definition: MCDwarf.h:531
llvm::MachineBasicBlock
Definition: MachineBasicBlock.h:95
llvm::CSKYII::AddrMode16H
@ AddrMode16H
Definition: CSKYBaseInfo.h:34
llvm::CSKYFrameLowering::hasFP
bool hasFP(const MachineFunction &MF) const override
hasFP - Return true if the specified function should have a dedicated frame pointer register.
Definition: CSKYFrameLowering.cpp:35
llvm::TargetOptions::DisableFramePointerElim
bool DisableFramePointerElim(const MachineFunction &MF) const
DisableFramePointerElim - This returns true if frame pointer elimination optimization should be disab...
Definition: TargetOptionsImpl.cpp:24
llvm::TargetRegisterInfo::getSpillAlign
Align getSpillAlign(const TargetRegisterClass &RC) const
Return the minimum required alignment in bytes for a spill slot for a register of this class.
Definition: TargetRegisterInfo.h:288
llvm::MachineFunction::getSubtarget
const TargetSubtargetInfo & getSubtarget() const
getSubtarget - Return the subtarget for which this machine code is being compiled.
Definition: MachineFunction.h:641
llvm::MachineInstrBuilder::setMIFlag
const MachineInstrBuilder & setMIFlag(MachineInstr::MIFlag Flag) const
Definition: MachineInstrBuilder.h:278
llvm::Function::hasFnAttribute
bool hasFnAttribute(Attribute::AttrKind Kind) const
Return true if the function has the attribute.
Definition: Function.cpp:626
llvm::TargetFrameLowering::alignSPAdjust
int alignSPAdjust(int SPAdj) const
alignSPAdjust - This method aligns the stack adjustment to the correct alignment.
Definition: TargetFrameLowering.h:105
llvm::CSKYMachineFunctionInfo::setLRIsSpilled
void setLRIsSpilled(bool s)
Definition: CSKYMachineFunctionInfo.h:51
llvm::TargetRegisterInfo::getSpillSize
unsigned getSpillSize(const TargetRegisterClass &RC) const
Return the size in bytes of the stack slot allocated to hold a spilled copy of a register from class ...
Definition: TargetRegisterInfo.h:282
llvm::CSKYSubtarget::getInstrInfo
const CSKYInstrInfo * getInstrInfo() const override
Definition: CSKYSubtarget.h:71
uint64_t
llvm::CSKYMachineFunctionInfo::getCalleeSaveAreaSize
int getCalleeSaveAreaSize() const
Definition: CSKYMachineFunctionInfo.h:54
llvm::HexagonInstrInfo::storeRegToStackSlot
void storeRegToStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, Register SrcReg, bool isKill, int FrameIndex, const TargetRegisterClass *RC, const TargetRegisterInfo *TRI) const override
Store the specified register of the given register class to the specified stack frame index.
Definition: HexagonInstrInfo.cpp:954
llvm::numbers::e
constexpr double e
Definition: MathExtras.h:57
llvm::MachineRegisterInfo::getCalleeSavedRegs
const MCPhysReg * getCalleeSavedRegs() const
Returns list of callee saved registers.
Definition: MachineRegisterInfo.cpp:619
llvm::RegScavenger
Definition: RegisterScavenging.h:34
llvm::MachineBasicBlock::getLastNonDebugInstr
iterator getLastNonDebugInstr(bool SkipPseudoOp=true)
Returns an iterator to the last non-debug instruction in the basic block, or end().
Definition: MachineBasicBlock.cpp:266
llvm::MachineInstr::NoFlags
@ NoFlags
Definition: MachineInstr.h:81
llvm::TargetMachine::Options
TargetOptions Options
Definition: TargetMachine.h:121
assert
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
llvm::MachineBasicBlock::size
unsigned size() const
Definition: MachineBasicBlock.h:243
llvm::MachineFunction::getFrameInfo
MachineFrameInfo & getFrameInfo()
getFrameInfo - Return the frame info object for the current function.
Definition: MachineFunction.h:657
llvm::CSKYII::AddrMode32B
@ AddrMode32B
Definition: CSKYBaseInfo.h:30
CSKYFrameLowering.h
llvm::MachineBasicBlock::getParent
const MachineFunction * getParent() const
Return the MachineFunction containing this basic block.
Definition: MachineBasicBlock.h:229
llvm::RegScavenger::addScavengingFrameIndex
void addScavengingFrameIndex(int FI)
Add a scavenging frame index.
Definition: RegisterScavenging.h:123
llvm::MachineInstrBuilder::addReg
const MachineInstrBuilder & addReg(Register RegNo, unsigned flags=0, unsigned SubReg=0) const
Add a new virtual register operand.
Definition: MachineInstrBuilder.h:97
llvm::MachineInstr::MIFlag
MIFlag
Definition: MachineInstr.h:80
llvm::MachineFunction
Definition: MachineFunction.h:241
llvm::size
auto size(R &&Range, std::enable_if_t< std::is_base_of< std::random_access_iterator_tag, typename std::iterator_traits< decltype(Range.begin())>::iterator_category >::value, void > *=nullptr)
Get the size of a range.
Definition: STLExtras.h:1573
llvm::MachineBasicBlock::getFirstTerminator
iterator getFirstTerminator()
Returns an iterator to the first terminator instruction of this basic block.
Definition: MachineBasicBlock.cpp:241
llvm::ArrayRef
ArrayRef - Represent a constant reference to an array (0 or more elements consecutively in memory),...
Definition: APInt.h:32
llvm::min
Expected< ExpressionValue > min(const ExpressionValue &Lhs, const ExpressionValue &Rhs)
Definition: FileCheck.cpp:357
llvm::MachineFrameInfo::CreateStackObject
int CreateStackObject(uint64_t Size, Align Alignment, bool isSpillSlot, const AllocaInst *Alloca=nullptr, uint8_t ID=0)
Create a new statically sized stack object, returning a nonnegative identifier to represent it.
Definition: MachineFrameInfo.cpp:51
llvm::HexagonInstrInfo::loadRegFromStackSlot
void loadRegFromStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, Register DestReg, int FrameIndex, const TargetRegisterClass *RC, const TargetRegisterInfo *TRI) const override
Load the specified register of the given register class from the specified stack frame index.
Definition: HexagonInstrInfo.cpp:999
MBBI
MachineBasicBlock MachineBasicBlock::iterator MBBI
Definition: AArch64SLSHardening.cpp:75
llvm_unreachable
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
Definition: ErrorHandling.h:134
llvm::StackOffset
StackOffset is a class to represent an offset with 2 dimensions, named fixed and scalable,...
Definition: TypeSize.h:134
DL
MachineBasicBlock MachineBasicBlock::iterator DebugLoc DL
Definition: AArch64SLSHardening.cpp:76
llvm::CSKYII::AddrModeMask
@ AddrModeMask
Definition: CSKYBaseInfo.h:56
llvm::Pass::dump
void dump() const
Definition: Pass.cpp:131
llvm::CSKYII::AddrMode32H
@ AddrMode32H
Definition: CSKYBaseInfo.h:31
MRI
unsigned const MachineRegisterInfo * MRI
Definition: AArch64AdvSIMDScalarPass.cpp:105
llvm::MachineFrameInfo::getMaxAlign
Align getMaxAlign() const
Return the alignment in bytes that this function must be aligned to, which is greater than the defaul...
Definition: MachineFrameInfo.h:569
llvm::Register
Wrapper class representing virtual and physical registers.
Definition: Register.h:19
llvm::MachineFrameInfo::isFrameAddressTaken
bool isFrameAddressTaken() const
This method may be called any time after instruction selection is complete to determine if there is a...
Definition: MachineFrameInfo.h:368
llvm::MachineFrameInfo::hasCalls
bool hasCalls() const
Return true if the current function has any function calls.
Definition: MachineFrameInfo.h:581
MBB
MachineBasicBlock & MBB
Definition: AArch64SLSHardening.cpp:74
llvm::BitVector::test
bool test(unsigned Idx) const
Definition: BitVector.h:453
llvm::CSKYMachineFunctionInfo::setCalleeSaveAreaSize
void setCalleeSaveAreaSize(int v)
Definition: CSKYMachineFunctionInfo.h:53
llvm::MachineFunction::getFunction
Function & getFunction()
Return the LLVM function that this machine code represents.
Definition: MachineFunction.h:607
llvm::TargetRegisterInfo::getRegSizeInBits
unsigned getRegSizeInBits(const TargetRegisterClass &RC) const
Return the size in bits of a register from class RC.
Definition: TargetRegisterInfo.h:276
uint16_t
llvm::MachineFunction::getTarget
const LLVMTargetMachine & getTarget() const
getTarget - Return the target machine this machine code is compiled with
Definition: MachineFunction.h:637
llvm::AMDGPU::SendMsg::Op
Op
Definition: SIDefines.h:325
MachineFrameInfo.h
llvm::Align::value
uint64_t value() const
This is a hole in the type system and should not be abused.
Definition: Alignment.h:85
DiagnosticInfo.h
llvm::CSKYSubtarget::hasFPUv3SingleFloat
bool hasFPUv3SingleFloat() const
Definition: CSKYSubtarget.h:95
llvm::CSKYSubtarget::hasFPUv2DoubleFloat
bool hasFPUv2DoubleFloat() const
Definition: CSKYSubtarget.h:93
x
TODO unsigned x
Definition: README.txt:10
llvm::CSKYSubtarget::hasFPUv3DoubleFloat
bool hasFPUv3DoubleFloat() const
Definition: CSKYSubtarget.h:96
CSKYMachineFunctionInfo.h
llvm::TargetRegisterInfo::hasStackRealignment
bool hasStackRealignment(const MachineFunction &MF) const
True if stack realignment is required and still possible.
Definition: TargetRegisterInfo.h:936
getFPReg
static Register getFPReg(const CSKYSubtarget &STI)
Definition: CSKYFrameLowering.cpp:29
llvm::MachineFunction::addFrameInst
LLVM_NODISCARD unsigned addFrameInst(const MCCFIInstruction &Inst)
Definition: MachineFunction.cpp:291
llvm::MachineFrameInfo
The MachineFrameInfo class represents an abstract stack frame until prolog/epilog code is inserted.
Definition: MachineFrameInfo.h:107
align
mov r0 ldr L5 sub r0 lr needed for prologue ldmia ip add bx lr r2 The last stmia stores r2 into the address passed in there is one additional stmia that stores and r2 to some stack location The store is dead The llvm gcc generated code looks like align
Definition: README.txt:236
llvm::MachineBasicBlock::begin
iterator begin()
Definition: MachineBasicBlock.h:272
MachineInstrBuilder.h
llvm::BuildMI
MachineInstrBuilder BuildMI(MachineFunction &MF, const DebugLoc &DL, const MCInstrDesc &MCID)
Builder interface. Specify how to create the initial instruction itself.
Definition: MachineInstrBuilder.h:328
llvm::max
Align max(MaybeAlign Lhs, Align Rhs)
Definition: Alignment.h:340
llvm::MachineBasicBlock::empty
bool empty() const
Definition: MachineBasicBlock.h:244
llvm::MCCFIInstruction::createOffset
static MCCFIInstruction createOffset(MCSymbol *L, unsigned Register, int Offset)
.cfi_offset Previous value of Register is saved at offset Offset from CFA.
Definition: MCDwarf.h:562
llvm::CSKYSubtarget::hasE2
bool hasE2() const
Definition: CSKYSubtarget.h:107
llvm::TargetFrameLowering::determineCalleeSaves
virtual void determineCalleeSaves(MachineFunction &MF, BitVector &SavedRegs, RegScavenger *RS=nullptr) const
This method determines which of the registers reported by TargetRegisterInfo::getCalleeSavedRegs() sh...
Definition: TargetFrameLoweringImpl.cpp:78
llvm::CSKYISD::NIE
@ NIE
Definition: CSKYISelLowering.h:27
llvm::DebugLoc
A debug info location.
Definition: DebugLoc.h:33
llvm::TargetRegisterInfo::getMinimalPhysRegClass
const TargetRegisterClass * getMinimalPhysRegClass(MCRegister Reg, MVT VT=MVT::Other) const
Returns the Register Class of a physical register of the given type, picking the most sub register cl...
Definition: TargetRegisterInfo.cpp:211
RegisterScavenging.h
MachineFunction.h
llvm::MachineInstrBundleIterator< MachineInstr >
llvm::abs
APFloat abs(APFloat X)
Returns the absolute value of the argument.
Definition: APFloat.h:1282
llvm::CSKYSubtarget::hasHighRegisters
bool hasHighRegisters() const
Definition: CSKYSubtarget.h:104
llvm::MachineBasicBlock::end
iterator end()
Definition: MachineBasicBlock.h:274