LLVM  15.0.0git
CSKYFrameLowering.cpp
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1 //===-- CSKYFrameLowering.cpp - CSKY Frame Information ------------------===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // This file contains the CSKY implementation of TargetFrameLowering class.
10 //
11 //===----------------------------------------------------------------------===//
12 
13 #include "CSKYFrameLowering.h"
15 #include "CSKYSubtarget.h"
22 #include "llvm/IR/DiagnosticInfo.h"
23 #include "llvm/MC/MCDwarf.h"
24 
25 using namespace llvm;
26 
27 #define DEBUG_TYPE "csky-frame-lowering"
28 
29 // Returns the register used to hold the frame pointer.
30 static Register getFPReg(const CSKYSubtarget &STI) { return CSKY::R8; }
31 
32 // To avoid the BP value clobbered by a function call, we need to choose a
33 // callee saved register to save the value.
34 static Register getBPReg(const CSKYSubtarget &STI) { return CSKY::R7; }
35 
37  const TargetRegisterInfo *RegInfo = MF.getSubtarget().getRegisterInfo();
38 
39  const MachineFrameInfo &MFI = MF.getFrameInfo();
40  return MF.getTarget().Options.DisableFramePointerElim(MF) ||
41  RegInfo->hasStackRealignment(MF) || MFI.hasVarSizedObjects() ||
42  MFI.isFrameAddressTaken();
43 }
44 
46  const MachineFrameInfo &MFI = MF.getFrameInfo();
47 
48  return MFI.hasVarSizedObjects();
49 }
50 
51 // Determines the size of the frame and maximum call frame size.
52 void CSKYFrameLowering::determineFrameLayout(MachineFunction &MF) const {
53  MachineFrameInfo &MFI = MF.getFrameInfo();
54  const CSKYRegisterInfo *RI = STI.getRegisterInfo();
55 
56  // Get the number of bytes to allocate from the FrameInfo.
57  uint64_t FrameSize = MFI.getStackSize();
58 
59  // Get the alignment.
61  if (RI->hasStackRealignment(MF)) {
62  Align MaxStackAlign = std::max(StackAlign, MFI.getMaxAlign());
63  FrameSize += (MaxStackAlign.value() - StackAlign.value());
64  StackAlign = MaxStackAlign;
65  }
66 
67  // Set Max Call Frame Size
68  uint64_t MaxCallSize = alignTo(MFI.getMaxCallFrameSize(), StackAlign);
69  MFI.setMaxCallFrameSize(MaxCallSize);
70 
71  // Make sure the frame is aligned.
72  FrameSize = alignTo(FrameSize, StackAlign);
73 
74  // Update frame info.
75  MFI.setStackSize(FrameSize);
76 }
77 
79  MachineBasicBlock &MBB) const {
81  MachineFrameInfo &MFI = MF.getFrameInfo();
82  const CSKYRegisterInfo *RI = STI.getRegisterInfo();
83  const CSKYInstrInfo *TII = STI.getInstrInfo();
86  const MachineRegisterInfo &MRI = MF.getRegInfo();
87 
88  Register FPReg = getFPReg(STI);
89  Register SPReg = CSKY::R14;
90  Register BPReg = getBPReg(STI);
91 
92  // Debug location must be unknown since the first debug location is used
93  // to determine the end of the prologue.
94  DebugLoc DL;
95 
96  if (MF.getFunction().hasFnAttribute("interrupt"))
97  BuildMI(MBB, MBBI, DL, TII->get(CSKY::NIE));
98 
99  // Determine the correct frame layout
100  determineFrameLayout(MF);
101 
102  // FIXME (note copied from Lanai): This appears to be overallocating. Needs
103  // investigation. Get the number of bytes to allocate from the FrameInfo.
104  uint64_t StackSize = MFI.getStackSize();
105 
106  // Early exit if there is no need to allocate on the stack
107  if (StackSize == 0 && !MFI.adjustsStack())
108  return;
109 
110  const auto &CSI = MFI.getCalleeSavedInfo();
111 
112  unsigned spillAreaSize = CFI->getCalleeSaveAreaSize();
113 
114  uint64_t ActualSize = spillAreaSize + CFI->getVarArgsSaveSize();
115 
116  // First part stack allocation.
117  adjustReg(MBB, MBBI, DL, SPReg, SPReg, -(static_cast<int64_t>(ActualSize)),
119 
120  // Emit ".cfi_def_cfa_offset FirstSPAdjustAmount"
121  unsigned CFIIndex =
122  MF.addFrameInst(MCCFIInstruction::cfiDefCfaOffset(nullptr, ActualSize));
123  BuildMI(MBB, MBBI, DL, TII->get(TargetOpcode::CFI_INSTRUCTION))
124  .addCFIIndex(CFIIndex);
125 
126  // The frame pointer is callee-saved, and code has been generated for us to
127  // save it to the stack. We need to skip over the storing of callee-saved
128  // registers as the frame pointer must be modified after it has been saved
129  // to the stack, not before.
130  // FIXME: assumes exactly one instruction is used to save each callee-saved
131  // register.
132  std::advance(MBBI, CSI.size());
133 
134  // Iterate over list of callee-saved registers and emit .cfi_offset
135  // directives.
136  for (const auto &Entry : CSI) {
137  int64_t Offset = MFI.getObjectOffset(Entry.getFrameIdx());
138  Register Reg = Entry.getReg();
139 
140  unsigned Num = TRI->getRegSizeInBits(Reg, MRI) / 32;
141  for (unsigned i = 0; i < Num; i++) {
142  unsigned CFIIndex = MF.addFrameInst(MCCFIInstruction::createOffset(
143  nullptr, RI->getDwarfRegNum(Reg, true) + i, Offset + i * 4));
144  BuildMI(MBB, MBBI, DL, TII->get(TargetOpcode::CFI_INSTRUCTION))
145  .addCFIIndex(CFIIndex);
146  }
147  }
148 
149  // Generate new FP.
150  if (hasFP(MF)) {
151  BuildMI(MBB, MBBI, DL, TII->get(TargetOpcode::COPY), FPReg)
152  .addReg(SPReg)
154 
155  // Emit ".cfi_def_cfa_register $fp"
157  nullptr, RI->getDwarfRegNum(FPReg, true)));
158  BuildMI(MBB, MBBI, DL, TII->get(TargetOpcode::CFI_INSTRUCTION))
159  .addCFIIndex(CFIIndex);
160 
161  // Second part stack allocation.
162  adjustReg(MBB, MBBI, DL, SPReg, SPReg,
163  -(static_cast<int64_t>(StackSize - ActualSize)),
165 
166  // Realign Stack
167  const CSKYRegisterInfo *RI = STI.getRegisterInfo();
168  if (RI->hasStackRealignment(MF)) {
169  Align MaxAlignment = MFI.getMaxAlign();
170 
171  const CSKYInstrInfo *TII = STI.getInstrInfo();
172  if (STI.hasE2() && isUInt<12>(~(-(int)MaxAlignment.value()))) {
173  BuildMI(MBB, MBBI, DL, TII->get(CSKY::ANDNI32), SPReg)
174  .addReg(SPReg)
175  .addImm(~(-(int)MaxAlignment.value()));
176  } else {
177  unsigned ShiftAmount = Log2(MaxAlignment);
178 
179  if (STI.hasE2()) {
180  Register VR =
181  MF.getRegInfo().createVirtualRegister(&CSKY::GPRRegClass);
182  BuildMI(MBB, MBBI, DL, TII->get(CSKY::LSRI32), VR)
183  .addReg(SPReg)
184  .addImm(ShiftAmount);
185  BuildMI(MBB, MBBI, DL, TII->get(CSKY::LSLI32), SPReg)
186  .addReg(VR)
187  .addImm(ShiftAmount);
188  } else {
189  Register VR =
190  MF.getRegInfo().createVirtualRegister(&CSKY::mGPRRegClass);
191  BuildMI(MBB, MBBI, DL, TII->get(CSKY::MOV16), VR).addReg(SPReg);
192  BuildMI(MBB, MBBI, DL, TII->get(CSKY::LSRI16), VR)
193  .addReg(VR)
194  .addImm(ShiftAmount);
195  BuildMI(MBB, MBBI, DL, TII->get(CSKY::LSLI16), VR)
196  .addReg(VR)
197  .addImm(ShiftAmount);
198  BuildMI(MBB, MBBI, DL, TII->get(CSKY::MOV16), SPReg).addReg(VR);
199  }
200  }
201  }
202 
203  // FP will be used to restore the frame in the epilogue, so we need
204  // another base register BP to record SP after re-alignment. SP will
205  // track the current stack after allocating variable sized objects.
206  if (hasBP(MF)) {
207  // move BP, SP
208  BuildMI(MBB, MBBI, DL, TII->get(TargetOpcode::COPY), BPReg).addReg(SPReg);
209  }
210 
211  } else {
212  adjustReg(MBB, MBBI, DL, SPReg, SPReg,
213  -(static_cast<int64_t>(StackSize - ActualSize)),
215  // Emit ".cfi_def_cfa_offset StackSize"
216  unsigned CFIIndex = MF.addFrameInst(
217  MCCFIInstruction::cfiDefCfaOffset(nullptr, MFI.getStackSize()));
218  BuildMI(MBB, MBBI, DL, TII->get(TargetOpcode::CFI_INSTRUCTION))
219  .addCFIIndex(CFIIndex);
220  }
221 }
222 
224  MachineBasicBlock &MBB) const {
226 
227  MachineFrameInfo &MFI = MF.getFrameInfo();
228  Register FPReg = getFPReg(STI);
229  Register SPReg = CSKY::R14;
230 
231  // Get the insert location for the epilogue. If there were no terminators in
232  // the block, get the last instruction.
234  DebugLoc DL;
235  if (!MBB.empty()) {
237  if (MBBI == MBB.end())
239  DL = MBBI->getDebugLoc();
240 
241  // If this is not a terminator, the actual insert location should be after
242  // the last instruction.
243  if (!MBBI->isTerminator())
244  MBBI = std::next(MBBI);
245  }
246 
247  const auto &CSI = MFI.getCalleeSavedInfo();
248  uint64_t StackSize = MFI.getStackSize();
249 
250  uint64_t ActualSize =
252 
253  // Skip to before the restores of callee-saved registers
254  // FIXME: assumes exactly one instruction is used to restore each
255  // callee-saved register.
256  auto LastFrameDestroy = MBBI;
257  if (!CSI.empty())
258  LastFrameDestroy = std::prev(MBBI, CSI.size());
259 
260  if (hasFP(MF)) {
261  const CSKYInstrInfo *TII = STI.getInstrInfo();
262  BuildMI(MBB, LastFrameDestroy, DL, TII->get(TargetOpcode::COPY), SPReg)
263  .addReg(FPReg)
265  } else {
266  adjustReg(MBB, LastFrameDestroy, DL, SPReg, SPReg, (StackSize - ActualSize),
268  }
269 
270  adjustReg(MBB, MBBI, DL, SPReg, SPReg, ActualSize,
272 }
273 
275  const CSKYInstrInfo &TII) {
276  unsigned FnSize = 0;
277  for (auto &MBB : MF) {
278  for (auto &MI : MBB)
279  FnSize += TII.getInstSizeInBytes(MI);
280  }
281  FnSize += MF.getConstantPool()->getConstants().size() * 4;
282  return FnSize;
283 }
284 
286  const CSKYSubtarget &STI) {
287  unsigned Limit = (1 << 12) - 1;
288 
289  for (auto &MBB : MF) {
290  for (auto &MI : MBB) {
291  if (MI.isDebugInstr())
292  continue;
293 
294  for (unsigned i = 0, e = MI.getNumOperands(); i != e; ++i) {
295  if (!MI.getOperand(i).isFI())
296  continue;
297 
298  if (MI.getOpcode() == CSKY::SPILL_CARRY ||
299  MI.getOpcode() == CSKY::RESTORE_CARRY ||
300  MI.getOpcode() == CSKY::STORE_PAIR ||
301  MI.getOpcode() == CSKY::LOAD_PAIR) {
302  Limit = std::min(Limit, ((1U << 12) - 1) * 4);
303  break;
304  }
305 
306  if (MI.getOpcode() == CSKY::ADDI32) {
307  Limit = std::min(Limit, (1U << 12));
308  break;
309  }
310 
311  if (MI.getOpcode() == CSKY::ADDI16XZ) {
312  Limit = std::min(Limit, (1U << 3));
313  break;
314  }
315 
316  // ADDI16 will not require an extra register,
317  // it can reuse the destination.
318  if (MI.getOpcode() == CSKY::ADDI16)
319  break;
320 
321  // Otherwise check the addressing mode.
322  switch (MI.getDesc().TSFlags & CSKYII::AddrModeMask) {
323  default:
324  LLVM_DEBUG(MI.dump());
326  "Unhandled addressing mode in stack size limit calculation");
327  case CSKYII::AddrMode32B:
328  Limit = std::min(Limit, (1U << 12) - 1);
329  break;
330  case CSKYII::AddrMode32H:
331  Limit = std::min(Limit, ((1U << 12) - 1) * 2);
332  break;
334  Limit = std::min(Limit, ((1U << 12) - 1) * 4);
335  break;
336  case CSKYII::AddrMode16B:
337  Limit = std::min(Limit, (1U << 5) - 1);
338  break;
339  case CSKYII::AddrMode16H:
340  Limit = std::min(Limit, ((1U << 5) - 1) * 2);
341  break;
342  case CSKYII::AddrMode16W:
343  Limit = std::min(Limit, ((1U << 5) - 1) * 4);
344  break;
346  Limit = std::min(Limit, ((1U << 8) - 1) * 4);
347  break;
348  }
349  break; // At most one FI per instruction
350  }
351  }
352  }
353 
354  return Limit;
355 }
356 
358  BitVector &SavedRegs,
359  RegScavenger *RS) const {
361 
364  const CSKYInstrInfo *TII = STI.getInstrInfo();
365  const MachineRegisterInfo &MRI = MF.getRegInfo();
366  MachineFrameInfo &MFI = MF.getFrameInfo();
367 
368  if (hasFP(MF))
369  SavedRegs.set(CSKY::R8);
370 
371  // Mark BP as used if function has dedicated base pointer.
372  if (hasBP(MF))
373  SavedRegs.set(CSKY::R7);
374 
375  // If interrupt is enabled and there are calls in the handler,
376  // unconditionally save all Caller-saved registers and
377  // all FP registers, regardless whether they are used.
378  if (MF.getFunction().hasFnAttribute("interrupt") && MFI.hasCalls()) {
379 
380  static const MCPhysReg CSRegs[] = {CSKY::R0, CSKY::R1, CSKY::R2, CSKY::R3,
381  CSKY::R12, CSKY::R13, 0};
382 
383  for (unsigned i = 0; CSRegs[i]; ++i)
384  SavedRegs.set(CSRegs[i]);
385 
386  if (STI.hasHighRegisters()) {
387 
388  static const MCPhysReg CSHRegs[] = {CSKY::R18, CSKY::R19, CSKY::R20,
389  CSKY::R21, CSKY::R22, CSKY::R23,
390  CSKY::R24, CSKY::R25, 0};
391 
392  for (unsigned i = 0; CSHRegs[i]; ++i)
393  SavedRegs.set(CSHRegs[i]);
394  }
395 
396  static const MCPhysReg CSF32Regs[] = {
397  CSKY::F8_32, CSKY::F9_32, CSKY::F10_32,
398  CSKY::F11_32, CSKY::F12_32, CSKY::F13_32,
399  CSKY::F14_32, CSKY::F15_32, 0};
400  static const MCPhysReg CSF64Regs[] = {
401  CSKY::F8_64, CSKY::F9_64, CSKY::F10_64,
402  CSKY::F11_64, CSKY::F12_64, CSKY::F13_64,
403  CSKY::F14_64, CSKY::F15_64, 0};
404 
405  const MCPhysReg *FRegs = NULL;
406  if (STI.hasFPUv2DoubleFloat() || STI.hasFPUv3DoubleFloat())
407  FRegs = CSF64Regs;
408  else if (STI.hasFPUv2SingleFloat() || STI.hasFPUv3SingleFloat())
409  FRegs = CSF32Regs;
410 
411  if (FRegs != NULL) {
412  const MCPhysReg *Regs = MF.getRegInfo().getCalleeSavedRegs();
413 
414  for (unsigned i = 0; Regs[i]; ++i)
415  if (CSKY::FPR32RegClass.contains(Regs[i]) ||
416  CSKY::FPR64RegClass.contains(Regs[i])) {
417  unsigned x = 0;
418  for (; FRegs[x]; ++x)
419  if (FRegs[x] == Regs[i])
420  break;
421  if (FRegs[x] == 0)
422  SavedRegs.set(Regs[i]);
423  }
424  }
425  }
426 
427  unsigned CSStackSize = 0;
428  for (unsigned Reg : SavedRegs.set_bits()) {
429  auto RegSize = TRI->getRegSizeInBits(Reg, MRI) / 8;
430  CSStackSize += RegSize;
431  }
432 
433  CFI->setCalleeSaveAreaSize(CSStackSize);
434 
435  uint64_t Limit = estimateRSStackSizeLimit(MF, STI);
436 
437  bool BigFrame = (MFI.estimateStackSize(MF) + CSStackSize >= Limit);
438 
439  if (BigFrame || CFI->isCRSpilled() || !STI.hasE2()) {
440  const TargetRegisterClass *RC = &CSKY::GPRRegClass;
441  unsigned size = TRI->getSpillSize(*RC);
442  Align align = TRI->getSpillAlign(*RC);
443 
445  }
446 
447  unsigned FnSize = EstimateFunctionSizeInBytes(MF, *TII);
448  // Force R15 to be spilled if the function size is > 65534. This enables
449  // use of BSR to implement far jump.
450  if (FnSize >= ((1 << (16 - 1)) * 2))
451  SavedRegs.set(CSKY::R15);
452 
453  CFI->setLRIsSpilled(SavedRegs.test(CSKY::R15));
454 }
455 
456 // Not preserve stack space within prologue for outgoing variables when the
457 // function contains variable size objects and let eliminateCallFramePseudoInstr
458 // preserve stack space for it.
460  return !MF.getFrameInfo().hasVarSizedObjects();
461 }
462 
466  if (CSI.empty())
467  return true;
468 
469  MachineFunction *MF = MBB.getParent();
470  const TargetInstrInfo &TII = *MF->getSubtarget().getInstrInfo();
471  DebugLoc DL;
472  if (MI != MBB.end() && !MI->isDebugInstr())
473  DL = MI->getDebugLoc();
474 
475  for (auto &CS : CSI) {
476  // Insert the spill to the stack frame.
477  Register Reg = CS.getReg();
479  TII.storeRegToStackSlot(MBB, MI, Reg, true, CS.getFrameIdx(), RC, TRI);
480  }
481 
482  return true;
483 }
484 
488  if (CSI.empty())
489  return true;
490 
491  MachineFunction *MF = MBB.getParent();
492  const TargetInstrInfo &TII = *MF->getSubtarget().getInstrInfo();
493  DebugLoc DL;
494  if (MI != MBB.end() && !MI->isDebugInstr())
495  DL = MI->getDebugLoc();
496 
497  for (auto &CS : reverse(CSI)) {
498  Register Reg = CS.getReg();
500  TII.loadRegFromStackSlot(MBB, MI, Reg, CS.getFrameIdx(), RC, TRI);
501  assert(MI != MBB.begin() && "loadRegFromStackSlot didn't insert any code!");
502  }
503 
504  return true;
505 }
506 
507 // Eliminate ADJCALLSTACKDOWN, ADJCALLSTACKUP pseudo instructions.
511  Register SPReg = CSKY::R14;
512  DebugLoc DL = MI->getDebugLoc();
513 
514  if (!hasReservedCallFrame(MF)) {
515  // If space has not been reserved for a call frame, ADJCALLSTACKDOWN and
516  // ADJCALLSTACKUP must be converted to instructions manipulating the stack
517  // pointer. This is necessary when there is a variable length stack
518  // allocation (e.g. alloca), which means it's not possible to allocate
519  // space for outgoing arguments from within the function prologue.
520  int64_t Amount = MI->getOperand(0).getImm();
521 
522  if (Amount != 0) {
523  // Ensure the stack remains aligned after adjustment.
524  Amount = alignSPAdjust(Amount);
525 
526  if (MI->getOpcode() == CSKY::ADJCALLSTACKDOWN)
527  Amount = -Amount;
528 
529  adjustReg(MBB, MI, DL, SPReg, SPReg, Amount, MachineInstr::NoFlags);
530  }
531  }
532 
533  return MBB.erase(MI);
534 }
535 
536 void CSKYFrameLowering::adjustReg(MachineBasicBlock &MBB,
538  const DebugLoc &DL, Register DestReg,
539  Register SrcReg, int64_t Val,
540  MachineInstr::MIFlag Flag) const {
541  const CSKYInstrInfo *TII = STI.getInstrInfo();
542 
543  if (DestReg == SrcReg && Val == 0)
544  return;
545 
546  // TODO: Add 16-bit instruction support with immediate num
547  if (STI.hasE2() && isUInt<12>(std::abs(Val) - 1)) {
548  BuildMI(MBB, MBBI, DL, TII->get(Val < 0 ? CSKY::SUBI32 : CSKY::ADDI32),
549  DestReg)
550  .addReg(SrcReg)
551  .addImm(std::abs(Val))
552  .setMIFlag(Flag);
553  } else if (!STI.hasE2() && isShiftedUInt<7, 2>(std::abs(Val))) {
554  BuildMI(MBB, MBBI, DL,
555  TII->get(Val < 0 ? CSKY::SUBI16SPSP : CSKY::ADDI16SPSP), CSKY::R14)
556  .addReg(CSKY::R14, RegState::Kill)
557  .addImm(std::abs(Val))
558  .setMIFlag(Flag);
559  } else {
560 
561  unsigned Op = 0;
562 
563  if (STI.hasE2()) {
564  Op = Val < 0 ? CSKY::SUBU32 : CSKY::ADDU32;
565  } else {
566  assert(SrcReg == DestReg);
567  Op = Val < 0 ? CSKY::SUBU16XZ : CSKY::ADDU16XZ;
568  }
569 
570  Register ScratchReg = TII->movImm(MBB, MBBI, DL, std::abs(Val), Flag);
571 
572  BuildMI(MBB, MBBI, DL, TII->get(Op), DestReg)
573  .addReg(SrcReg)
574  .addReg(ScratchReg, RegState::Kill)
575  .setMIFlag(Flag);
576  }
577 }
578 
581  Register &FrameReg) const {
583  const MachineFrameInfo &MFI = MF.getFrameInfo();
585  const auto &CSI = MFI.getCalleeSavedInfo();
586 
587  int MinCSFI = 0;
588  int MaxCSFI = -1;
589 
590  int Offset = MFI.getObjectOffset(FI) + MFI.getOffsetAdjustment();
591 
592  if (CSI.size()) {
593  MinCSFI = CSI[0].getFrameIdx();
594  MaxCSFI = CSI[CSI.size() - 1].getFrameIdx();
595  }
596 
597  if (FI >= MinCSFI && FI <= MaxCSFI) {
598  FrameReg = CSKY::R14;
599  Offset += CFI->getVarArgsSaveSize() + CFI->getCalleeSaveAreaSize();
600  } else if (RI->hasStackRealignment(MF)) {
601  assert(hasFP(MF));
602  if (!MFI.isFixedObjectIndex(FI)) {
603  FrameReg = hasBP(MF) ? getBPReg(STI) : CSKY::R14;
604  Offset += MFI.getStackSize();
605  } else {
606  FrameReg = getFPReg(STI);
607  Offset += CFI->getVarArgsSaveSize() + CFI->getCalleeSaveAreaSize();
608  }
609  } else {
610  if (MFI.isFixedObjectIndex(FI) && hasFP(MF)) {
611  FrameReg = getFPReg(STI);
612  Offset += CFI->getVarArgsSaveSize() + CFI->getCalleeSaveAreaSize();
613  } else {
614  FrameReg = hasBP(MF) ? getBPReg(STI) : CSKY::R14;
615  Offset += MFI.getStackSize();
616  }
617  }
618 
619  return StackOffset::getFixed(Offset);
620 }
i
i
Definition: README.txt:29
llvm::CSKYFrameLowering::spillCalleeSavedRegisters
bool spillCalleeSavedRegisters(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, ArrayRef< CalleeSavedInfo > CSI, const TargetRegisterInfo *TRI) const override
spillCalleeSavedRegisters - Issues instruction(s) to spill all callee saved registers and returns tru...
Definition: CSKYFrameLowering.cpp:463
llvm::alignTo
uint64_t alignTo(uint64_t Size, Align A)
Returns a multiple of A needed to store Size bytes.
Definition: Alignment.h:156
llvm::MachineFrameInfo::hasVarSizedObjects
bool hasVarSizedObjects() const
This method may be called any time after instruction selection is complete to determine if the stack ...
Definition: MachineFrameInfo.h:354
llvm::CSKYII::AddrMode32SDF
@ AddrMode32SDF
Definition: CSKYBaseInfo.h:36
llvm::RISCVAttrs::StackAlign
StackAlign
Definition: RISCVAttributes.h:37
MCDwarf.h
MI
IRTranslator LLVM IR MI
Definition: IRTranslator.cpp:104
llvm::MachineInstrBuilder::addImm
const MachineInstrBuilder & addImm(int64_t Val) const
Add a new immediate operand.
Definition: MachineInstrBuilder.h:131
llvm::MachineFrameInfo::estimateStackSize
uint64_t estimateStackSize(const MachineFunction &MF) const
Estimate and return the size of the stack frame.
Definition: MachineFrameInfo.cpp:137
llvm
This is an optimization pass for GlobalISel generic memory operations.
Definition: AddressRanges.h:17
llvm::CSKYII::AddrMode32WD
@ AddrMode32WD
Definition: CSKYBaseInfo.h:32
llvm::MachineRegisterInfo::createVirtualRegister
Register createVirtualRegister(const TargetRegisterClass *RegClass, StringRef Name="")
createVirtualRegister - Create and return a new virtual register in the function with the specified r...
Definition: MachineRegisterInfo.cpp:156
llvm::MachineRegisterInfo
MachineRegisterInfo - Keep track of information for virtual and physical registers,...
Definition: MachineRegisterInfo.h:50
RegSize
unsigned RegSize
Definition: AArch64MIPeepholeOpt.cpp:121
llvm::BitVector::set
BitVector & set()
Definition: BitVector.h:344
llvm::TargetSubtargetInfo::getInstrInfo
virtual const TargetInstrInfo * getInstrInfo() const
Definition: TargetSubtargetInfo.h:93
llvm::MachineInstrBuilder::addCFIIndex
const MachineInstrBuilder & addCFIIndex(unsigned CFIIndex) const
Definition: MachineInstrBuilder.h:247
getBPReg
static Register getBPReg(const CSKYSubtarget &STI)
Definition: CSKYFrameLowering.cpp:34
contains
return AArch64::GPR64RegClass contains(Reg)
llvm::CSKYFrameLowering::eliminateCallFramePseudoInstr
MachineBasicBlock::iterator eliminateCallFramePseudoInstr(MachineFunction &MF, MachineBasicBlock &MBB, MachineBasicBlock::iterator MI) const override
This method is called during prolog/epilog code insertion to eliminate call frame setup and destroy p...
Definition: CSKYFrameLowering.cpp:508
llvm::CSKYInstrInfo
Definition: CSKYInstrInfo.h:26
llvm::X86Disassembler::Reg
Reg
All possible values of the reg field in the ModR/M byte.
Definition: X86DisassemblerDecoder.h:462
llvm::BitVector::set_bits
iterator_range< const_set_bits_iterator > set_bits() const
Definition: BitVector.h:133
llvm::CSKYMachineFunctionInfo
Definition: CSKYMachineFunctionInfo.h:20
llvm::CSKYFrameLowering::restoreCalleeSavedRegisters
bool restoreCalleeSavedRegisters(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, MutableArrayRef< CalleeSavedInfo > CSI, const TargetRegisterInfo *TRI) const override
restoreCalleeSavedRegisters - Issues instruction(s) to restore all callee saved registers and returns...
Definition: CSKYFrameLowering.cpp:485
llvm::TargetSubtargetInfo::getRegisterInfo
virtual const TargetRegisterInfo * getRegisterInfo() const
getRegisterInfo - If register information is available, return it.
Definition: TargetSubtargetInfo.h:125
llvm::CSKYII::AddrMode16W
@ AddrMode16W
Definition: CSKYBaseInfo.h:35
llvm::TargetRegisterInfo
TargetRegisterInfo base class - We assume that the target defines a static array of TargetRegisterDes...
Definition: TargetRegisterInfo.h:234
llvm::StackOffset::getFixed
ScalarTy getFixed() const
Definition: TypeSize.h:149
llvm::CSKYRegisterInfo
Definition: CSKYRegisterInfo.h:24
llvm::MachineFrameInfo::setStackSize
void setStackSize(uint64_t Size)
Set the size of the stack.
Definition: MachineFrameInfo.h:580
llvm::reverse
auto reverse(ContainerTy &&C, std::enable_if_t< has_rbegin< ContainerTy >::value > *=nullptr)
Definition: STLExtras.h:380
llvm::MachineFrameInfo::setMaxCallFrameSize
void setMaxCallFrameSize(unsigned S)
Definition: MachineFrameInfo.h:656
llvm::CSKYMachineFunctionInfo::getVarArgsSaveSize
unsigned getVarArgsSaveSize() const
Definition: CSKYMachineFunctionInfo.h:52
llvm::max
Expected< ExpressionValue > max(const ExpressionValue &Lhs, const ExpressionValue &Rhs)
Definition: FileCheck.cpp:337
EstimateFunctionSizeInBytes
static unsigned EstimateFunctionSizeInBytes(const MachineFunction &MF, const CSKYInstrInfo &TII)
Definition: CSKYFrameLowering.cpp:274
llvm::CSKYFrameLowering::emitEpilogue
void emitEpilogue(MachineFunction &MF, MachineBasicBlock &MBB) const override
Definition: CSKYFrameLowering.cpp:223
TRI
unsigned const TargetRegisterInfo * TRI
Definition: MachineSink.cpp:1628
llvm::MachineFrameInfo::getMaxCallFrameSize
unsigned getMaxCallFrameSize() const
Return the maximum size of a call frame that must be allocated for an outgoing function call.
Definition: MachineFrameInfo.h:646
llvm::CSKYFrameLowering::emitPrologue
void emitPrologue(MachineFunction &MF, MachineBasicBlock &MBB) const override
emitProlog/emitEpilog - These methods insert prolog and epilog code into the function.
Definition: CSKYFrameLowering.cpp:78
llvm::ArrayRef::empty
bool empty() const
empty - Check if the array is empty.
Definition: ArrayRef.h:159
LLVM_DEBUG
#define LLVM_DEBUG(X)
Definition: Debug.h:101
llvm::CSKYFrameLowering::getFrameIndexReference
StackOffset getFrameIndexReference(const MachineFunction &MF, int FI, Register &FrameReg) const override
getFrameIndexReference - This method should return the base register and offset used to reference a f...
Definition: CSKYFrameLowering.cpp:580
llvm::MCCFIInstruction::cfiDefCfaOffset
static MCCFIInstruction cfiDefCfaOffset(MCSymbol *L, int Offset)
.cfi_def_cfa_offset modifies a rule for computing CFA.
Definition: MCDwarf.h:540
MachineRegisterInfo.h
llvm::MachineInstr::FrameDestroy
@ FrameDestroy
Definition: MachineInstr.h:86
llvm::MachineBasicBlock::erase
instr_iterator erase(instr_iterator I)
Remove an instruction from the instruction list and delete it.
Definition: MachineBasicBlock.cpp:1299
R2
#define R2(n)
llvm::MachineFunction::getRegInfo
MachineRegisterInfo & getRegInfo()
getRegInfo - Return information about the registers currently in use.
Definition: MachineFunction.h:666
llvm::TargetInstrInfo
TargetInstrInfo - Interface to description of machine instruction set.
Definition: TargetInstrInfo.h:97
llvm::CSKYSubtarget::hasFPUv2SingleFloat
bool hasFPUv2SingleFloat() const
Definition: CSKYSubtarget.h:139
llvm::MutableArrayRef
MutableArrayRef - Represent a mutable reference to an array (0 or more elements consecutively in memo...
Definition: ArrayRef.h:306
CSKYSubtarget.h
llvm::MachineFunction::getInfo
Ty * getInfo()
getInfo - Keep track of various per-function pieces of information for backends that would like to do...
Definition: MachineFunction.h:754
llvm::CSKYFrameLowering::hasReservedCallFrame
bool hasReservedCallFrame(const MachineFunction &MF) const override
hasReservedCallFrame - Under normal circumstances, when a frame pointer is not required,...
Definition: CSKYFrameLowering.cpp:459
llvm::TargetFrameLowering::getStackAlign
Align getStackAlign() const
getStackAlignment - This method returns the number of bytes to which the stack pointer must be aligne...
Definition: TargetFrameLowering.h:100
llvm::Log2
unsigned Log2(Align A)
Returns the log2 of the alignment.
Definition: Alignment.h:209
estimateRSStackSizeLimit
static unsigned estimateRSStackSizeLimit(MachineFunction &MF, const CSKYSubtarget &STI)
Definition: CSKYFrameLowering.cpp:285
llvm::TargetRegisterClass
Definition: TargetRegisterInfo.h:45
llvm::RegState::Kill
@ Kill
The last use of a register.
Definition: MachineInstrBuilder.h:48
llvm::CSKYII::AddrMode16B
@ AddrMode16B
Definition: CSKYBaseInfo.h:33
TII
const HexagonInstrInfo * TII
Definition: HexagonCopyToCombine.cpp:125
llvm::MachineInstr::FrameSetup
@ FrameSetup
Definition: MachineInstr.h:84
llvm::MCID::Flag
Flag
These should be considered private to the implementation of the MCInstrDesc class.
Definition: MCInstrDesc.h:147
llvm::CSKYMachineFunctionInfo::isCRSpilled
bool isCRSpilled() const
Definition: CSKYMachineFunctionInfo.h:47
llvm::MachineFrameInfo::getStackSize
uint64_t getStackSize() const
Return the number of bytes that must be allocated to hold all of the fixed size frame objects.
Definition: MachineFrameInfo.h:577
llvm::BitVector
Definition: BitVector.h:75
llvm::CSKYSubtarget::getRegisterInfo
const CSKYRegisterInfo * getRegisterInfo() const override
Definition: CSKYSubtarget.h:119
llvm::CSKYFrameLowering::determineCalleeSaves
void determineCalleeSaves(MachineFunction &MF, BitVector &SavedRegs, RegScavenger *RS) const override
This method determines which of the registers reported by TargetRegisterInfo::getCalleeSavedRegs() sh...
Definition: CSKYFrameLowering.cpp:357
llvm::Align
This struct is a compact representation of a valid (non-zero power of two) alignment.
Definition: Alignment.h:39
llvm::CSKYFrameLowering::hasBP
bool hasBP(const MachineFunction &MF) const
Definition: CSKYFrameLowering.cpp:45
llvm::CSKYSubtarget
Definition: CSKYSubtarget.h:30
llvm::MCCFIInstruction::createDefCfaRegister
static MCCFIInstruction createDefCfaRegister(MCSymbol *L, unsigned Register)
.cfi_def_cfa_register modifies a rule for computing CFA.
Definition: MCDwarf.h:533
llvm::MachineBasicBlock
Definition: MachineBasicBlock.h:94
llvm::CSKYII::AddrMode16H
@ AddrMode16H
Definition: CSKYBaseInfo.h:34
llvm::CSKYFrameLowering::hasFP
bool hasFP(const MachineFunction &MF) const override
hasFP - Return true if the specified function should have a dedicated frame pointer register.
Definition: CSKYFrameLowering.cpp:36
llvm::TargetOptions::DisableFramePointerElim
bool DisableFramePointerElim(const MachineFunction &MF) const
DisableFramePointerElim - This returns true if frame pointer elimination optimization should be disab...
Definition: TargetOptionsImpl.cpp:23
llvm::TargetRegisterInfo::getSpillAlign
Align getSpillAlign(const TargetRegisterClass &RC) const
Return the minimum required alignment in bytes for a spill slot for a register of this class.
Definition: TargetRegisterInfo.h:289
llvm::MachineFunction::getSubtarget
const TargetSubtargetInfo & getSubtarget() const
getSubtarget - Return the subtarget for which this machine code is being compiled.
Definition: MachineFunction.h:656
llvm::MachineInstrBuilder::setMIFlag
const MachineInstrBuilder & setMIFlag(MachineInstr::MIFlag Flag) const
Definition: MachineInstrBuilder.h:278
llvm::Function::hasFnAttribute
bool hasFnAttribute(Attribute::AttrKind Kind) const
Return true if the function has the attribute.
Definition: Function.cpp:625
llvm::TargetFrameLowering::alignSPAdjust
int alignSPAdjust(int SPAdj) const
alignSPAdjust - This method aligns the stack adjustment to the correct alignment.
Definition: TargetFrameLowering.h:105
llvm::CSKYMachineFunctionInfo::setLRIsSpilled
void setLRIsSpilled(bool s)
Definition: CSKYMachineFunctionInfo.h:56
llvm::TargetRegisterInfo::getSpillSize
unsigned getSpillSize(const TargetRegisterClass &RC) const
Return the size in bytes of the stack slot allocated to hold a spilled copy of a register from class ...
Definition: TargetRegisterInfo.h:283
llvm::CSKYSubtarget::getInstrInfo
const CSKYInstrInfo * getInstrInfo() const override
Definition: CSKYSubtarget.h:118
uint64_t
llvm::CSKYMachineFunctionInfo::getCalleeSaveAreaSize
int getCalleeSaveAreaSize() const
Definition: CSKYMachineFunctionInfo.h:59
llvm::HexagonInstrInfo::storeRegToStackSlot
void storeRegToStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, Register SrcReg, bool isKill, int FrameIndex, const TargetRegisterClass *RC, const TargetRegisterInfo *TRI) const override
Store the specified register of the given register class to the specified stack frame index.
Definition: HexagonInstrInfo.cpp:955
llvm::numbers::e
constexpr double e
Definition: MathExtras.h:57
llvm::MachineRegisterInfo::getCalleeSavedRegs
const MCPhysReg * getCalleeSavedRegs() const
Returns list of callee saved registers.
Definition: MachineRegisterInfo.cpp:617
llvm::RegScavenger
Definition: RegisterScavenging.h:34
MachineConstantPool.h
llvm::MachineBasicBlock::getLastNonDebugInstr
iterator getLastNonDebugInstr(bool SkipPseudoOp=true)
Returns an iterator to the last non-debug instruction in the basic block, or end().
Definition: MachineBasicBlock.cpp:263
llvm::MachineInstr::NoFlags
@ NoFlags
Definition: MachineInstr.h:83
llvm::TargetMachine::Options
TargetOptions Options
Definition: TargetMachine.h:118
assert
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
llvm::MachineBasicBlock::size
unsigned size() const
Definition: MachineBasicBlock.h:248
llvm::MachineFunction::getFrameInfo
MachineFrameInfo & getFrameInfo()
getFrameInfo - Return the frame info object for the current function.
Definition: MachineFunction.h:672
llvm::CSKYII::AddrMode32B
@ AddrMode32B
Definition: CSKYBaseInfo.h:30
CSKYFrameLowering.h
llvm::MachineBasicBlock::getParent
const MachineFunction * getParent() const
Return the MachineFunction containing this basic block.
Definition: MachineBasicBlock.h:234
llvm::RegScavenger::addScavengingFrameIndex
void addScavengingFrameIndex(int FI)
Add a scavenging frame index.
Definition: RegisterScavenging.h:143
llvm::MachineInstrBuilder::addReg
const MachineInstrBuilder & addReg(Register RegNo, unsigned flags=0, unsigned SubReg=0) const
Add a new virtual register operand.
Definition: MachineInstrBuilder.h:97
llvm::MachineInstr::MIFlag
MIFlag
Definition: MachineInstr.h:82
llvm::MachineFunction
Definition: MachineFunction.h:257
llvm::size
auto size(R &&Range, std::enable_if_t< std::is_base_of< std::random_access_iterator_tag, typename std::iterator_traits< decltype(Range.begin())>::iterator_category >::value, void > *=nullptr)
Get the size of a range.
Definition: STLExtras.h:1598
llvm::MachineBasicBlock::getFirstTerminator
iterator getFirstTerminator()
Returns an iterator to the first terminator instruction of this basic block.
Definition: MachineBasicBlock.cpp:238
llvm::ArrayRef
ArrayRef - Represent a constant reference to an array (0 or more elements consecutively in memory),...
Definition: APInt.h:32
llvm::min
Expected< ExpressionValue > min(const ExpressionValue &Lhs, const ExpressionValue &Rhs)
Definition: FileCheck.cpp:357
llvm::MachineFrameInfo::CreateStackObject
int CreateStackObject(uint64_t Size, Align Alignment, bool isSpillSlot, const AllocaInst *Alloca=nullptr, uint8_t ID=0)
Create a new statically sized stack object, returning a nonnegative identifier to represent it.
Definition: MachineFrameInfo.cpp:51
llvm::HexagonInstrInfo::loadRegFromStackSlot
void loadRegFromStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, Register DestReg, int FrameIndex, const TargetRegisterClass *RC, const TargetRegisterInfo *TRI) const override
Load the specified register of the given register class from the specified stack frame index.
Definition: HexagonInstrInfo.cpp:1000
MBBI
MachineBasicBlock MachineBasicBlock::iterator MBBI
Definition: AArch64SLSHardening.cpp:75
llvm_unreachable
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
Definition: ErrorHandling.h:143
llvm::StackOffset
StackOffset is a class to represent an offset with 2 dimensions, named fixed and scalable,...
Definition: TypeSize.h:134
DL
MachineBasicBlock MachineBasicBlock::iterator DebugLoc DL
Definition: AArch64SLSHardening.cpp:76
llvm::Pass::dump
void dump() const
Definition: Pass.cpp:135
llvm::CSKYII::AddrMode32H
@ AddrMode32H
Definition: CSKYBaseInfo.h:31
MRI
unsigned const MachineRegisterInfo * MRI
Definition: AArch64AdvSIMDScalarPass.cpp:105
llvm::MachineFrameInfo::getMaxAlign
Align getMaxAlign() const
Return the alignment in bytes that this function must be aligned to, which is greater than the defaul...
Definition: MachineFrameInfo.h:593
llvm::Register
Wrapper class representing virtual and physical registers.
Definition: Register.h:19
llvm::MachineFrameInfo::isFrameAddressTaken
bool isFrameAddressTaken() const
This method may be called any time after instruction selection is complete to determine if there is a...
Definition: MachineFrameInfo.h:370
llvm::MachineFrameInfo::hasCalls
bool hasCalls() const
Return true if the current function has any function calls.
Definition: MachineFrameInfo.h:605
MBB
MachineBasicBlock & MBB
Definition: AArch64SLSHardening.cpp:74
llvm::BitVector::test
bool test(unsigned Idx) const
Definition: BitVector.h:454
llvm::CSKYMachineFunctionInfo::setCalleeSaveAreaSize
void setCalleeSaveAreaSize(int v)
Definition: CSKYMachineFunctionInfo.h:58
llvm::CSKYII::AddrModeMask
@ AddrModeMask
Definition: CSKYBaseInfo.h:56
llvm::MachineFunction::getFunction
Function & getFunction()
Return the LLVM function that this machine code represents.
Definition: MachineFunction.h:622
llvm::TargetRegisterInfo::getRegSizeInBits
unsigned getRegSizeInBits(const TargetRegisterClass &RC) const
Return the size in bits of a register from class RC.
Definition: TargetRegisterInfo.h:277
uint16_t
llvm::MachineFunction::getTarget
const LLVMTargetMachine & getTarget() const
getTarget - Return the target machine this machine code is compiled with
Definition: MachineFunction.h:652
llvm::AMDGPU::SendMsg::Op
Op
Definition: SIDefines.h:345
MachineFrameInfo.h
llvm::Align::value
uint64_t value() const
This is a hole in the type system and should not be abused.
Definition: Alignment.h:85
DiagnosticInfo.h
llvm::CSKYSubtarget::hasFPUv3SingleFloat
bool hasFPUv3SingleFloat() const
Definition: CSKYSubtarget.h:144
llvm::CSKYSubtarget::hasFPUv2DoubleFloat
bool hasFPUv2DoubleFloat() const
Definition: CSKYSubtarget.h:140
x
TODO unsigned x
Definition: README.txt:10
llvm::CSKYSubtarget::hasFPUv3DoubleFloat
bool hasFPUv3DoubleFloat() const
Definition: CSKYSubtarget.h:145
CSKYMachineFunctionInfo.h
llvm::TargetRegisterInfo::hasStackRealignment
bool hasStackRealignment(const MachineFunction &MF) const
True if stack realignment is required and still possible.
Definition: TargetRegisterInfo.h:947
getFPReg
static Register getFPReg(const CSKYSubtarget &STI)
Definition: CSKYFrameLowering.cpp:30
llvm::MachineFunction::addFrameInst
LLVM_NODISCARD unsigned addFrameInst(const MCCFIInstruction &Inst)
Definition: MachineFunction.cpp:310
llvm::MachineFrameInfo
The MachineFrameInfo class represents an abstract stack frame until prolog/epilog code is inserted.
Definition: MachineFrameInfo.h:105
align
mov r0 ldr L5 sub r0 lr needed for prologue ldmia ip add bx lr r2 The last stmia stores r2 into the address passed in there is one additional stmia that stores and r2 to some stack location The store is dead The llvm gcc generated code looks like align
Definition: README.txt:236
llvm::MachineBasicBlock::begin
iterator begin()
Definition: MachineBasicBlock.h:278
MachineInstrBuilder.h
llvm::BuildMI
MachineInstrBuilder BuildMI(MachineFunction &MF, const DebugLoc &DL, const MCInstrDesc &MCID)
Builder interface. Specify how to create the initial instruction itself.
Definition: MachineInstrBuilder.h:328
llvm::MachineBasicBlock::empty
bool empty() const
Definition: MachineBasicBlock.h:250
llvm::MCCFIInstruction::createOffset
static MCCFIInstruction createOffset(MCSymbol *L, unsigned Register, int Offset)
.cfi_offset Previous value of Register is saved at offset Offset from CFA.
Definition: MCDwarf.h:564
llvm::CSKYSubtarget::hasE2
bool hasE2() const
Definition: CSKYSubtarget.h:187
llvm::TargetFrameLowering::determineCalleeSaves
virtual void determineCalleeSaves(MachineFunction &MF, BitVector &SavedRegs, RegScavenger *RS=nullptr) const
This method determines which of the registers reported by TargetRegisterInfo::getCalleeSavedRegs() sh...
Definition: TargetFrameLoweringImpl.cpp:83
llvm::CSKYISD::NIE
@ NIE
Definition: CSKYISelLowering.h:27
llvm::DebugLoc
A debug info location.
Definition: DebugLoc.h:33
llvm::TargetRegisterInfo::getMinimalPhysRegClass
const TargetRegisterClass * getMinimalPhysRegClass(MCRegister Reg, MVT VT=MVT::Other) const
Returns the Register Class of a physical register of the given type, picking the most sub register cl...
Definition: TargetRegisterInfo.cpp:212
RegisterScavenging.h
MachineFunction.h
llvm::MachineInstrBundleIterator< MachineInstr >
llvm::abs
APFloat abs(APFloat X)
Returns the absolute value of the argument.
Definition: APFloat.h:1282
llvm::CSKYSubtarget::hasHighRegisters
bool hasHighRegisters() const
Definition: CSKYSubtarget.h:168
llvm::MachineBasicBlock::end
iterator end()
Definition: MachineBasicBlock.h:280