LLVM 19.0.0git
CSKYInstrInfo.h
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1//===-- CSKYInstrInfo.h - CSKY Instruction Information --------*- C++ -*---===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8//
9// This file contains the CSKY implementation of the TargetInstrInfo class.
10//
11//===----------------------------------------------------------------------===//
12
13#ifndef LLVM_LIB_TARGET_CSKY_CSKYINSTRINFO_H
14#define LLVM_LIB_TARGET_CSKY_CSKYINSTRINFO_H
15
18
19#define GET_INSTRINFO_HEADER
20#include "CSKYGenInstrInfo.inc"
21
22namespace llvm {
23
24class CSKYSubtarget;
25
27 bool v2sf;
28 bool v2df;
29 bool v3sf;
30 bool v3df;
31
32protected:
34
35public:
37
39 int &FrameIndex) const override;
41 int &FrameIndex) const override;
42
45 bool IsKill, int FrameIndex,
46 const TargetRegisterClass *RC,
48 Register VReg) const override;
49
52 int FrameIndex, const TargetRegisterClass *RC,
54 Register VReg) const override;
55
57 const DebugLoc &DL, MCRegister DestReg, MCRegister SrcReg,
58 bool KillSrc) const override;
59
62 const DebugLoc &DL,
63 int *BytesAdded = nullptr) const override;
64
68 bool AllowModify = false) const override;
69
71 int *BytesRemoved = nullptr) const override;
72
73 bool
75
77
78 unsigned getInstSizeInBytes(const MachineInstr &MI) const override;
79
81
82 // Materializes the given integer Val into DstReg.
84 const DebugLoc &DL, uint64_t Val,
86};
87
88} // namespace llvm
89
90#endif // LLVM_LIB_TARGET_CSKY_CSKYINSTRINFO_H
MachineBasicBlock & MBB
MachineBasicBlock MachineBasicBlock::iterator DebugLoc DL
MachineBasicBlock MachineBasicBlock::iterator MBBI
IRTranslator LLVM IR MI
unsigned const TargetRegisterInfo * TRI
const SmallVectorImpl< MachineOperand > MachineBasicBlock * TBB
const SmallVectorImpl< MachineOperand > & Cond
ArrayRef - Represent a constant reference to an array (0 or more elements consecutively in memory),...
Definition: ArrayRef.h:41
unsigned getInstSizeInBytes(const MachineInstr &MI) const override
void storeRegToStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, Register SrcReg, bool IsKill, int FrameIndex, const TargetRegisterClass *RC, const TargetRegisterInfo *TRI, Register VReg) const override
unsigned removeBranch(MachineBasicBlock &MBB, int *BytesRemoved=nullptr) const override
unsigned insertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB, MachineBasicBlock *FBB, ArrayRef< MachineOperand > Cond, const DebugLoc &DL, int *BytesAdded=nullptr) const override
void loadRegFromStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, Register DestReg, int FrameIndex, const TargetRegisterClass *RC, const TargetRegisterInfo *TRI, Register VReg) const override
const CSKYSubtarget & STI
Definition: CSKYInstrInfo.h:33
MachineBasicBlock * getBranchDestBlock(const MachineInstr &MI) const override
void copyPhysReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, const DebugLoc &DL, MCRegister DestReg, MCRegister SrcReg, bool KillSrc) const override
bool analyzeBranch(MachineBasicBlock &MBB, MachineBasicBlock *&TBB, MachineBasicBlock *&FBB, SmallVectorImpl< MachineOperand > &Cond, bool AllowModify=false) const override
Register movImm(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, const DebugLoc &DL, uint64_t Val, MachineInstr::MIFlag Flag=MachineInstr::NoFlags) const
Register isLoadFromStackSlot(const MachineInstr &MI, int &FrameIndex) const override
Register getGlobalBaseReg(MachineFunction &MF) const
bool reverseBranchCondition(SmallVectorImpl< MachineOperand > &Cond) const override
Register isStoreToStackSlot(const MachineInstr &MI, int &FrameIndex) const override
A debug info location.
Definition: DebugLoc.h:33
Wrapper class representing physical registers. Should be passed by value.
Definition: MCRegister.h:33
Representation of each machine instruction.
Definition: MachineInstr.h:68
Wrapper class representing virtual and physical registers.
Definition: Register.h:19
This class consists of common code factored out of the SmallVector class to reduce code duplication b...
Definition: SmallVector.h:586
TargetRegisterInfo base class - We assume that the target defines a static array of TargetRegisterDes...
This is an optimization pass for GlobalISel generic memory operations.
Definition: AddressRanges.h:18