28#define DEBUG_TYPE "wasm-reg-info"
30#define GET_REGINFO_TARGET_DESC
31#include "WebAssemblyGenRegisterInfo.inc"
38 static const MCPhysReg CalleeSavedRegs[] = {0};
39 return CalleeSavedRegs;
45 for (
auto Reg : {WebAssembly::SP32, WebAssembly::SP64, WebAssembly::FP32,
60 int FrameIndex =
MI.getOperand(FIOperandNum).getIndex();
65 "We assume that variable-sized objects have already been lowered, "
66 "and don't use FrameIndex operands.");
72 MI.getOpcode(), WebAssembly::OpName::addr);
73 if (AddrOperandNum == FIOperandNum) {
75 MI.getOpcode(), WebAssembly::OpName::off);
76 assert(FrameOffset >= 0 &&
MI.getOperand(OffsetOperandNum).getImm() >= 0);
77 int64_t
Offset =
MI.getOperand(OffsetOperandNum).getImm() + FrameOffset;
79 if (
static_cast<uint64_t>(
Offset) <= std::numeric_limits<uint32_t>::max()) {
80 MI.getOperand(OffsetOperandNum).setImm(
Offset);
81 MI.getOperand(FIOperandNum)
82 .ChangeToRegister(FrameRegister,
false);
91 if (OtherMO.
isReg()) {
98 if (Def && Def->getOpcode() ==
100 MRI.hasOneNonDBGUse(Def->getOperand(0).getReg())) {
104 MI.getOperand(FIOperandNum)
105 .ChangeToRegister(FrameRegister,
false);
116 unsigned FIRegOperand = FrameRegister;
120 MRI.getTargetRegisterInfo()->getPointerRegClass(MF);
121 Register OffsetOp =
MRI.createVirtualRegister(PtrRC);
126 FIRegOperand =
MRI.createVirtualRegister(PtrRC);
133 MI.getOperand(FIOperandNum).ChangeToRegister(FIRegOperand,
false);
141 if (MFI->isFrameBaseVirtual())
143 static const unsigned Regs[2][2] = {
145 {WebAssembly::SP32, WebAssembly::SP64},
146 {WebAssembly::FP32, WebAssembly::FP64}};
153 unsigned Kind)
const {
154 assert(Kind == 0 &&
"Only one kind of pointer on WebAssembly");
156 return &WebAssembly::I64RegClass;
157 return &WebAssembly::I32RegClass;
unsigned const MachineRegisterInfo * MRI
const HexagonInstrInfo * TII
uint64_t IntrinsicInst * II
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
This class implements WebAssembly-specific bits of TargetFrameLowering class.
This file contains the WebAssembly implementation of the TargetInstrInfo class.
This file provides WebAssembly-specific target descriptions.
This file declares WebAssembly-specific per-machine-function information.
This file contains the WebAssembly implementation of the WebAssemblyRegisterInfo class.
This file declares the WebAssembly-specific subclass of TargetSubtarget.
const MachineFunction * getParent() const
Return the MachineFunction containing this basic block.
The MachineFrameInfo class represents an abstract stack frame until prolog/epilog code is inserted.
uint64_t getStackSize() const
Return the number of bytes that must be allocated to hold all of the fixed size frame objects.
int64_t getObjectSize(int ObjectIdx) const
Return the size of the specified object.
int64_t getObjectOffset(int ObjectIdx) const
Return the assigned stack offset of the specified object from the incoming stack pointer.
const TargetSubtargetInfo & getSubtarget() const
getSubtarget - Return the subtarget for which this machine code is being compiled.
MachineFrameInfo & getFrameInfo()
getFrameInfo - Return the frame info object for the current function.
MachineRegisterInfo & getRegInfo()
getRegInfo - Return information about the registers currently in use.
Ty * getInfo()
getInfo - Keep track of various per-function pieces of information for backends that would like to do...
const MachineInstrBuilder & addImm(int64_t Val) const
Add a new immediate operand.
const MachineInstrBuilder & addReg(Register RegNo, unsigned flags=0, unsigned SubReg=0) const
Add a new virtual register operand.
Representation of each machine instruction.
MachineOperand class - Representation of each machine instruction operand.
void setImm(int64_t immVal)
bool isReg() const
isReg - Tests if this is a MO_Register operand.
bool isImm() const
isImm - Tests if this is a MO_Immediate operand.
Register getReg() const
getReg - Returns the register number.
MachineRegisterInfo - Keep track of information for virtual and physical registers,...
MachineInstr * getUniqueVRegDef(Register Reg) const
getUniqueVRegDef - Return the unique machine instr that defines the specified virtual register or nul...
Wrapper class representing virtual and physical registers.
constexpr bool isVirtual() const
Return true if the specified register number is in the virtual register namespace.
bool hasFP(const MachineFunction &MF) const
hasFP - Return true if the specified function should have a dedicated frame pointer register.
Triple - Helper class for working with autoconf configuration names.
bool isArch64Bit() const
Test whether the architecture is 64-bit.
static unsigned getOpcAdd(const MachineFunction &MF)
static unsigned getOpcConst(const MachineFunction &MF)
This class is derived from MachineFunctionInfo and contains private WebAssembly-specific information ...
unsigned getFrameBaseVreg() const
bool eliminateFrameIndex(MachineBasicBlock::iterator MI, int SPAdj, unsigned FIOperandNum, RegScavenger *RS=nullptr) const override
WebAssemblyRegisterInfo(const Triple &TT)
Register getFrameRegister(const MachineFunction &MF) const override
BitVector getReservedRegs(const MachineFunction &MF) const override
const MCPhysReg * getCalleeSavedRegs(const MachineFunction *MF) const override
const TargetRegisterClass * getPointerRegClass(const MachineFunction &MF, unsigned Kind=0) const override
int16_t getNamedOperandIdx(uint16_t Opcode, uint16_t NamedIndex)
This is an optimization pass for GlobalISel generic memory operations.
MachineInstrBuilder BuildMI(MachineFunction &MF, const MIMetadata &MIMD, const MCInstrDesc &MCID)
Builder interface. Specify how to create the initial instruction itself.