LLVM 19.0.0git
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1//===-- llvm/CodeGen/AllocationOrder.cpp - Allocation Order ---------------===//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
9// This file implements an allocation order for virtual registers.
11// The preferred allocation order for a virtual register depends on allocation
12// hints and target hooks. The AllocationOrder class encapsulates all of that.
16#include "AllocationOrder.h"
21#include "llvm/Support/Debug.h"
24using namespace llvm;
26#define DEBUG_TYPE "regalloc"
28// Compare VirtRegMap::getRegAllocPref().
30 const RegisterClassInfo &RegClassInfo,
31 const LiveRegMatrix *Matrix) {
32 const MachineFunction &MF = VRM.getMachineFunction();
34 auto Order = RegClassInfo.getOrder(MF.getRegInfo().getRegClass(VirtReg));
36 bool HardHints =
37 TRI->getRegAllocationHints(VirtReg, Order, Hints, MF, &VRM, Matrix);
40 if (!Hints.empty()) {
41 dbgs() << "hints:";
42 for (MCPhysReg Hint : Hints)
43 dbgs() << ' ' << printReg(Hint, TRI);
44 dbgs() << '\n';
45 }
46 });
47 assert(all_of(Hints,
48 [&](MCPhysReg Hint) { return is_contained(Order, Hint); }) &&
49 "Target hint is outside allocation order.");
50 return AllocationOrder(std::move(Hints), Order, HardHints);
#define LLVM_DEBUG(X)
Definition: Debug.h:101
Live Register Matrix
unsigned const TargetRegisterInfo * TRI
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
static AllocationOrder create(unsigned VirtReg, const VirtRegMap &VRM, const RegisterClassInfo &RegClassInfo, const LiveRegMatrix *Matrix)
Create a new AllocationOrder for VirtReg.
MachineRegisterInfo & getRegInfo()
getRegInfo - Return information about the registers currently in use.
const TargetRegisterClass * getRegClass(Register Reg) const
Return the register class of the specified virtual register.
ArrayRef< MCPhysReg > getOrder(const TargetRegisterClass *RC) const
getOrder - Returns the preferred allocation order for RC.
bool empty() const
Definition: SmallVector.h:94
This is a 'vector' (really, a variable-sized array), optimized for the case when the array is small.
Definition: SmallVector.h:1209
TargetRegisterInfo base class - We assume that the target defines a static array of TargetRegisterDes...
MachineFunction & getMachineFunction() const
Definition: VirtRegMap.h:87
const TargetRegisterInfo & getTargetRegInfo() const
Definition: VirtRegMap.h:93
This is an optimization pass for GlobalISel generic memory operations.
Definition: AddressRanges.h:18
bool all_of(R &&range, UnaryPredicate P)
Provide wrappers to std::all_of which take ranges instead of having to pass begin/end explicitly.
Definition: STLExtras.h:1722
bool is_contained(R &&Range, const E &Element)
Returns true if Element is found in Range.
Definition: STLExtras.h:1879