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26 #define DEBUG_TYPE "regalloc"
42 for (unsigned I = 0, E = Hints.size(); I != E; ++I)
43 dbgs() <<
' ' << printReg(Hints[I], TRI);
48 for (
unsigned I = 0,
E = Hints.size();
I !=
E; ++
I)
50 "Target hint is outside allocation order.");
This is an optimization pass for GlobalISel generic memory operations.
ArrayRef< MCPhysReg > getOrder(const TargetRegisterClass *RC) const
getOrder - Returns the preferred allocation order for RC.
This is a 'vector' (really, a variable-sized array), optimized for the case when the array is small.
AllocationOrder(SmallVector< MCPhysReg, 16 > &&Hints, ArrayRef< MCPhysReg > Order, bool HardHints)
Create an AllocationOrder given the Hits, Order, and HardHits values.
TargetRegisterInfo base class - We assume that the target defines a static array of TargetRegisterDes...
MachineFunction & getMachineFunction() const
unsigned const TargetRegisterInfo * TRI
MachineRegisterInfo & getRegInfo()
getRegInfo - Return information about the registers currently in use.
static GCRegistry::Add< CoreCLRGC > E("coreclr", "CoreCLR-compatible GC")
const TargetRegisterClass * getRegClass(Register Reg) const
Return the register class of the specified virtual register.
compiles ldr LCPI1_0 ldr ldr mov lsr tst moveq r1 ldr LCPI1_1 and r0 bx lr It would be better to do something like to fold the shift into the conditional move
virtual bool getRegAllocationHints(Register VirtReg, ArrayRef< MCPhysReg > Order, SmallVectorImpl< MCPhysReg > &Hints, const MachineFunction &MF, const VirtRegMap *VRM=nullptr, const LiveRegMatrix *Matrix=nullptr) const
Get a list of 'hint' registers that the register allocator should try first when allocating a physica...
bool is_contained(R &&Range, const E &Element)
Wrapper function around std::find to detect if an element exists in a container.
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
const TargetRegisterInfo & getTargetRegInfo() const
static AllocationOrder create(unsigned VirtReg, const VirtRegMap &VRM, const RegisterClassInfo &RegClassInfo, const LiveRegMatrix *Matrix)
Create a new AllocationOrder for VirtReg.