#include "llvm/ADT/DenseMap.h"
#include "llvm/ADT/SmallVector.h"
#include "llvm/Analysis/TargetLibraryInfo.h"
#include "llvm/Analysis/VectorUtils.h"
#include "llvm/CodeGen/ISDOpcodes.h"
#include "llvm/CodeGen/SelectionDAG.h"
#include "llvm/CodeGen/SelectionDAGNodes.h"
#include "llvm/CodeGen/TargetLowering.h"
#include "llvm/CodeGen/ValueTypes.h"
#include "llvm/CodeGenTypes/MachineValueType.h"
#include "llvm/IR/DataLayout.h"
#include "llvm/Support/Casting.h"
#include "llvm/Support/Compiler.h"
#include "llvm/Support/Debug.h"
#include "llvm/Support/ErrorHandling.h"
#include <cassert>
#include <cstdint>
#include <iterator>
#include <utility>
#include "llvm/IR/ConstrainedOps.def"
#include "llvm/IR/VPIntrinsics.def"

Macros
#define	DEBUG_TYPE "legalizevectorops"

#define	DAG_INSTRUCTION(NAME, NARG, ROUND_MODE, INTRINSIC, DAGN) case ISD::STRICT_##DAGN:

#define	BEGIN_REGISTER_VP_SDNODE(VPID, LEGALPOS, ...)

#define	DAG_INSTRUCTION(NAME, NARG, ROUND_MODE, INTRINSIC, DAGN) case ISD::STRICT_##DAGN:

Functions
static void	createBSWAPShuffleMask (EVT VT, SmallVectorImpl< int > &ShuffleMask)

Macro Definition Documentation

◆ BEGIN_REGISTER_VP_SDNODE

#define BEGIN_REGISTER_VP_SDNODE	(	VPID,
		LEGALPOS,
		...
	)

Value:

  case ISD::VPID: {                                                            \
    EVT LegalizeVT = LEGALPOS < 0 ? Node->getValueType(-(1 + LEGALPOS))        \
                                  : Node->getOperand(LEGALPOS).getValueType(); \
    if (ISD::VPID == ISD::VP_SETCC) {                                          \
      ISD::CondCode CCCode = cast<CondCodeSDNode>(Node->getOperand(2))->get(); \
      Action = TLI.getCondCodeAction(CCCode, LegalizeVT.getSimpleVT());        \
      if (Action != TargetLowering::Legal)                                     \
        break;                                                                 \
    }                                                                          \
    /* Defer non-vector results to LegalizeDAG. */                             \
    if (!Node->getValueType(0).isVector() &&                                   \
        Node->getValueType(0) != MVT::Other) {                                 \
      Action = TargetLowering::Legal;                                          \
      break;                                                                   \
    }                                                                          \
    Action = TLI.getOperationAction(Node->getOpcode(), LegalizeVT);            \
  } break;

◆ DAG_INSTRUCTION [1/2]

#define DAG_INSTRUCTION	(	NAME,
		NARG,
		ROUND_MODE,
		INTRINSIC,
		DAGN
	)	case ISD::STRICT_##DAGN:

◆ DAG_INSTRUCTION [2/2]

#define DAG_INSTRUCTION	(	NAME,
		NARG,
		ROUND_MODE,
		INTRINSIC,
		DAGN
	)	case ISD::STRICT_##DAGN:

◆ DEBUG_TYPE

#define DEBUG_TYPE "legalizevectorops"

Definition at line 51 of file LegalizeVectorOps.cpp.

Function Documentation

◆ createBSWAPShuffleMask()

static void createBSWAPShuffleMask	(	EVT	VT,
		SmallVectorImpl< int > &	ShuffleMask
	)

static

Definition at line 1412 of file LegalizeVectorOps.cpp.

References llvm::EVT::getScalarSizeInBits(), llvm::EVT::getVectorNumElements(), I, and llvm::SmallVectorTemplateBase< T, bool >::push_back().

Macros