VECustomDAG.cpp File Reference

#include "VECustomDAG.h"
#include "VVPNodes.def"

Go to the source code of this file.

Namespaces
namespace	llvm
	This is an optimization pass for GlobalISel generic memory operations.

Macros
#define	DEBUG_TYPE   "vecustomdag"
#define	HANDLE_VP_TO_VVP(VPOPC, VVPNAME)
#define	ADD_VVP_OP(VVPNAME, SDNAME)
#define	REGISTER_PACKED(VVP_NAME)   case VEISD::VVP_NAME:
#define	ADD_VVP_OP(VVPNAME, ...)   case VEISD::VVPNAME:
#define	ADD_UNARY_VVP_OP(VVPNAME, ...)
#define	ADD_BINARY_VVP_OP(VVPNAME, ...)
#define	ADD_REDUCE_VVP_OP(VVP_NAME, SDNAME)   case VEISD::VVP_NAME:
#define	ADD_BINARY_VVP_OP(VVP_NAME, ...)   case VEISD::VVP_NAME:
#define	HANDLE_VVP_REDUCE_TO_SCALAR(VVP_RED_ISD, REDUCE_ISD)

Functions
bool	llvm::isPackedVectorType (EVT SomeVT)
MVT	llvm::splitVectorType (MVT VT)
MVT	llvm::getLegalVectorType (Packing P, MVT ElemVT)
Packing	llvm::getTypePacking (EVT VT)
bool	llvm::isMaskType (EVT SomeVT)
bool	llvm::isMaskArithmetic (SDValue Op)
std::optional< unsigned >	llvm::getVVPOpcode (unsigned Opcode)
bool	llvm::maySafelyIgnoreMask (SDValue Op)
bool	llvm::supportsPackedMode (unsigned Opcode, EVT IdiomVT)
bool	llvm::isPackingSupportOpcode (unsigned Opc)
bool	llvm::isVVPOrVEC (unsigned Opcode)
bool	llvm::isVVPUnaryOp (unsigned VVPOpcode)
bool	llvm::isVVPBinaryOp (unsigned VVPOpcode)
bool	llvm::isVVPReductionOp (unsigned Opcode)
std::optional< int >	llvm::getAVLPos (unsigned)
	The VE backend uses a two-staged process to lower and legalize vector instructions:
std::optional< int >	llvm::getMaskPos (unsigned Opc)
bool	llvm::isLegalAVL (SDValue AVL)
SDValue	llvm::getNodeChain (SDValue Op)
	Node Properties {.
SDValue	llvm::getMemoryPtr (SDValue Op)
std::optional< EVT >	llvm::getIdiomaticVectorType (SDNode *Op)
	} AVL Functions
SDValue	llvm::getLoadStoreStride (SDValue Op, VECustomDAG &CDAG)
SDValue	llvm::getGatherScatterIndex (SDValue Op)
SDValue	llvm::getGatherScatterScale (SDValue Op)
SDValue	llvm::getStoredValue (SDValue Op)
SDValue	llvm::getNodePassthru (SDValue Op)
bool	llvm::hasReductionStartParam (unsigned OPC)
unsigned	llvm::getScalarReductionOpcode (unsigned VVPOC, bool IsMask)
SDValue	llvm::getNodeAVL (SDValue Op)
	} Node Properties
SDValue	llvm::getNodeMask (SDValue Op)
std::pair< SDValue, bool >	llvm::getAnnotatedNodeAVL (SDValue Op)

Macro Definition Documentation

ADD_BINARY_VVP_OP [1/2]

#define ADD_BINARY_VVP_OP	(		VVP_NAME,
			...
	)		case VEISD::VVP_NAME:

ADD_BINARY_VVP_OP [2/2]

#define ADD_BINARY_VVP_OP	(		VVPNAME,
			...
	)

Value:

  case VEISD::VVPNAME:                                                         \
    return true;

ADD_REDUCE_VVP_OP

#define ADD_REDUCE_VVP_OP	(		VVP_NAME,
			SDNAME
	)		case VEISD::VVP_NAME:

ADD_UNARY_VVP_OP

#define ADD_UNARY_VVP_OP	(		VVPNAME,
			...
	)

Value:

  case VEISD::VVPNAME:                                                         \
    return true;

ADD_VVP_OP [1/2]

#define ADD_VVP_OP	(		VVPNAME,
			SDNAME
	)

Value:

  case VEISD::VVPNAME:                                                         \
  case ISD::SDNAME:                                                            \
    return VEISD::VVPNAME;

ADD_VVP_OP [2/2]

#define ADD_VVP_OP	(		VVPNAME,
			...
	)		case VEISD::VVPNAME:

DEBUG_TYPE

#define DEBUG_TYPE   "vecustomdag"

Definition at line 17 of file VECustomDAG.cpp.

HANDLE_VP_TO_VVP

#define HANDLE_VP_TO_VVP	(		VPOPC,
			VVPNAME
	)

Value:

  case ISD::VPOPC:                                                             \
    return VEISD::VVPNAME;

HANDLE_VVP_REDUCE_TO_SCALAR

#define HANDLE_VVP_REDUCE_TO_SCALAR	(		VVP_RED_ISD,
			REDUCE_ISD
	)

Value:

  case VEISD::VVP_RED_ISD:                                                     \
    return ISD::REDUCE_ISD;

REGISTER_PACKED

#define REGISTER_PACKED

(

VVP_NAME

)

case VEISD::VVP_NAME: