LLVM 20.0.0git
Macros | Functions | Variables
ScheduleDAGSDNodes.cpp File Reference
#include "ScheduleDAGSDNodes.h"
#include "InstrEmitter.h"
#include "SDNodeDbgValue.h"
#include "llvm/ADT/DenseMap.h"
#include "llvm/ADT/SmallPtrSet.h"
#include "llvm/ADT/SmallSet.h"
#include "llvm/ADT/SmallVector.h"
#include "llvm/ADT/Statistic.h"
#include "llvm/CodeGen/MachineInstrBuilder.h"
#include "llvm/CodeGen/MachineRegisterInfo.h"
#include "llvm/CodeGen/SelectionDAG.h"
#include "llvm/CodeGen/TargetInstrInfo.h"
#include "llvm/CodeGen/TargetLowering.h"
#include "llvm/CodeGen/TargetRegisterInfo.h"
#include "llvm/CodeGen/TargetSubtargetInfo.h"
#include "llvm/Config/llvm-config.h"
#include "llvm/IR/MemoryModelRelaxationAnnotations.h"
#include "llvm/MC/MCInstrItineraries.h"
#include "llvm/Support/CommandLine.h"
#include "llvm/Support/Debug.h"
#include "llvm/Support/raw_ostream.h"
#include "llvm/Target/TargetMachine.h"

Go to the source code of this file.

Macros

#define DEBUG_TYPE   "pre-RA-sched"
 

Functions

 STATISTIC (LoadsClustered, "Number of loads clustered together")
 
static void CheckForPhysRegDependency (SDNode *Def, SDNode *User, unsigned Op, const TargetRegisterInfo *TRI, const TargetInstrInfo *TII, const TargetLowering &TLI, unsigned &PhysReg, int &Cost)
 CheckForPhysRegDependency - Check if the dependency between def and use of a specified operand is a physical register dependency.
 
static void CloneNodeWithValues (SDNode *N, SelectionDAG *DAG, ArrayRef< EVT > VTs, SDValue ExtraOper=SDValue())
 
static bool AddGlue (SDNode *N, SDValue Glue, bool AddGlue, SelectionDAG *DAG)
 
static void RemoveUnusedGlue (SDNode *N, SelectionDAG *DAG)
 
static void ProcessSDDbgValues (SDNode *N, SelectionDAG *DAG, InstrEmitter &Emitter, SmallVectorImpl< std::pair< unsigned, MachineInstr * > > &Orders, InstrEmitter::VRBaseMapType &VRBaseMap, unsigned Order)
 ProcessSDDbgValues - Process SDDbgValues associated with this node.
 
static void ProcessSourceNode (SDNode *N, SelectionDAG *DAG, InstrEmitter &Emitter, InstrEmitter::VRBaseMapType &VRBaseMap, SmallVectorImpl< std::pair< unsigned, MachineInstr * > > &Orders, SmallSet< Register, 8 > &Seen, MachineInstr *NewInsn)
 

Variables

static cl::opt< int > HighLatencyCycles ("sched-high-latency-cycles", cl::Hidden, cl::init(10), cl::desc("Roughly estimate the number of cycles that 'long latency'" "instructions take for targets with no itinerary"))
 

Macro Definition Documentation

◆ DEBUG_TYPE

#define DEBUG_TYPE   "pre-RA-sched"

Definition at line 38 of file ScheduleDAGSDNodes.cpp.

Function Documentation

◆ AddGlue()

static bool AddGlue ( SDNode N,
SDValue  Glue,
bool  AddGlue,
SelectionDAG DAG 
)
static

◆ CheckForPhysRegDependency()

static void CheckForPhysRegDependency ( SDNode Def,
SDNode User,
unsigned  Op,
const TargetRegisterInfo TRI,
const TargetInstrInfo TII,
const TargetLowering TLI,
unsigned PhysReg,
int &  Cost 
)
static

CheckForPhysRegDependency - Check if the dependency between def and use of a specified operand is a physical register dependency.

If so, returns the register and the cost of copying the register.

Definition at line 111 of file ScheduleDAGSDNodes.cpp.

References llvm::TargetLowering::checkForPhysRegDependency(), llvm::ISD::CopyFromReg, llvm::ISD::CopyToReg, llvm::TargetRegisterClass::getCopyCost(), llvm::User::getOperand(), II, llvm::Register::isVirtualRegister(), TII, and TRI.

◆ CloneNodeWithValues()

static void CloneNodeWithValues ( SDNode N,
SelectionDAG DAG,
ArrayRef< EVT VTs,
SDValue  ExtraOper = SDValue() 
)
static

◆ ProcessSDDbgValues()

static void ProcessSDDbgValues ( SDNode N,
SelectionDAG DAG,
InstrEmitter Emitter,
SmallVectorImpl< std::pair< unsigned, MachineInstr * > > &  Orders,
InstrEmitter::VRBaseMapType VRBaseMap,
unsigned  Order 
)
static

ProcessSDDbgValues - Process SDDbgValues associated with this node.

Returns true if DV has any VReg operand locations which don't exist in VRBaseMap.

Definition at line 738 of file ScheduleDAGSDNodes.cpp.

References llvm::ScheduleDAGSDNodes::BB, llvm::DenseMapBase< DerivedT, KeyT, ValueT, KeyInfoT, BucketT >::count(), llvm::ScheduleDAGSDNodes::DAG, Emitter, llvm::SelectionDAG::GetDbgValues(), llvm::MachineBasicBlock::insert(), N, and llvm::SDDbgOperand::SDNODE.

Referenced by ProcessSourceNode().

◆ ProcessSourceNode()

static void ProcessSourceNode ( SDNode N,
SelectionDAG DAG,
InstrEmitter Emitter,
InstrEmitter::VRBaseMapType VRBaseMap,
SmallVectorImpl< std::pair< unsigned, MachineInstr * > > &  Orders,
SmallSet< Register, 8 > &  Seen,
MachineInstr NewInsn 
)
static

◆ RemoveUnusedGlue()

static void RemoveUnusedGlue ( SDNode N,
SelectionDAG DAG 
)
static

Definition at line 190 of file ScheduleDAGSDNodes.cpp.

References assert(), CloneNodeWithValues(), and N.

◆ STATISTIC()

STATISTIC ( LoadsClustered  ,
"Number of loads clustered together"   
)

Variable Documentation

◆ HighLatencyCycles

cl::opt< int > HighLatencyCycles("sched-high-latency-cycles", cl::Hidden, cl::init(10), cl::desc("Roughly estimate the number of cycles that 'long latency'" "instructions take for targets with no itinerary")) ( "sched-high-latency-cycles"  ,
cl::Hidden  ,
cl::init(10)  ,
cl::desc("Roughly estimate the number of cycles that 'long latency'" "instructions take for targets with no itinerary")   
)
static