Go to the source code of this file.
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namespace | llvm |
| This is an optimization pass for GlobalISel generic memory operations.
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◆ DEBUG_TYPE
#define DEBUG_TYPE "asm-printer" |
◆ LLVMInitializeRISCVAsmPrinter()
◆ lowerRISCVVMachineInstrToMCInst()
Definition at line 1055 of file RISCVAsmPrinter.cpp.
References llvm::MCInst::addOperand(), assert(), contains(), llvm::MCOperand::createImm(), llvm::MCOperand::createReg(), llvm::MachineOperand::getImm(), llvm::RISCVSubtarget::getInstrInfo(), llvm::MCInst::getNumOperands(), llvm::MCInstrDesc::getNumOperands(), llvm::MCInst::getOpcode(), llvm::MCInstrDesc::getOperandConstraint(), llvm::MachineBasicBlock::getParent(), llvm::MachineOperand::getReg(), llvm::RISCVSubtarget::getRegisterInfo(), llvm::MachineFunction::getSubtarget(), llvm::MachineOperand::getType(), llvm::RISCVII::hasRoundModeOp(), llvm::RISCVII::hasSEWOp(), llvm::RISCVII::hasVecPolicyOp(), llvm::RISCVII::hasVLOp(), llvm::RISCV::isFaultFirstLoad(), llvm::MachineOperand::isReg(), llvm::MachineOperand::isTied(), llvm::RISCVII::isTiedPseudo(), llvm_unreachable, MBB, MI, llvm::MachineOperand::MO_Immediate, llvm::MachineOperand::MO_Register, llvm::MCInstrDesc::operands(), llvm::RVV, llvm::MCInst::setOpcode(), llvm::MCOI::TIED_TO, TII, TRI, and llvm::MCInstrDesc::TSFlags.
◆ lowerSymbolOperand()
Definition at line 941 of file RISCVAsmPrinter.cpp.
References llvm::RISCVMCExpr::create(), llvm::MCSymbolRefExpr::create(), llvm::MCConstantExpr::create(), llvm::MCBinaryExpr::createAdd(), llvm::MCOperand::createExpr(), llvm::MachineOperand::getOffset(), llvm::MachineOperand::getTargetFlags(), llvm::MachineOperand::isJTI(), llvm::MachineOperand::isMBB(), llvm_unreachable, llvm::RISCVII::MO_CALL, llvm::RISCVII::MO_GOT_HI, llvm::RISCVII::MO_HI, llvm::RISCVII::MO_LO, llvm::RISCVII::MO_None, llvm::RISCVII::MO_PCREL_HI, llvm::RISCVII::MO_PCREL_LO, llvm::RISCVII::MO_TLS_GD_HI, llvm::RISCVII::MO_TLS_GOT_HI, llvm::RISCVII::MO_TLSDESC_ADD_LO, llvm::RISCVII::MO_TLSDESC_CALL, llvm::RISCVII::MO_TLSDESC_HI, llvm::RISCVII::MO_TLSDESC_LOAD_LO, llvm::RISCVII::MO_TPREL_ADD, llvm::RISCVII::MO_TPREL_HI, llvm::RISCVII::MO_TPREL_LO, llvm::AsmPrinter::OutContext, Sym, llvm::MCSymbolRefExpr::VK_None, llvm::RISCVMCExpr::VK_RISCV_CALL_PLT, llvm::RISCVMCExpr::VK_RISCV_GOT_HI, llvm::RISCVMCExpr::VK_RISCV_HI, llvm::RISCVMCExpr::VK_RISCV_LO, llvm::RISCVMCExpr::VK_RISCV_None, llvm::RISCVMCExpr::VK_RISCV_PCREL_HI, llvm::RISCVMCExpr::VK_RISCV_PCREL_LO, llvm::RISCVMCExpr::VK_RISCV_TLS_GD_HI, llvm::RISCVMCExpr::VK_RISCV_TLS_GOT_HI, llvm::RISCVMCExpr::VK_RISCV_TLSDESC_ADD_LO, llvm::RISCVMCExpr::VK_RISCV_TLSDESC_CALL, llvm::RISCVMCExpr::VK_RISCV_TLSDESC_HI, llvm::RISCVMCExpr::VK_RISCV_TLSDESC_LOAD_LO, llvm::RISCVMCExpr::VK_RISCV_TPREL_ADD, llvm::RISCVMCExpr::VK_RISCV_TPREL_HI, and llvm::RISCVMCExpr::VK_RISCV_TPREL_LO.
◆ STATISTIC()
STATISTIC |
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RISCVNumInstrsCompressed |
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"Number of RISC-V Compressed instructions emitted" |
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